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6 Commits

Author SHA1 Message Date
David Blaikie
7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-02-27 21:17:42 +00:00
Vincent Lejeune
bb25a01d23 R600: Non vector only instruction can be scheduled on trans unit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189980 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-04 19:53:46 +00:00
Tom Stellard
6b3f6a744a Revert "R600: Non vector only instruction can be scheduled on trans unit" 
This reverts commit 98ce62780e.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187526 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-31 20:43:27 +00:00
Vincent Lejeune
98ce62780e R600: Non vector only instruction can be scheduled on trans unit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187514 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-31 19:31:56 +00:00
Vincent Lejeune
92f24d403f R600: Prettier asmPrint of Alu 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180956 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-05-02 21:52:30 +00:00
Tom Stellard
3abd23bac5 R600: Reorganize lit tests and document how they should be organized 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179828 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-19 02:10:53 +00:00