Commit Graph

22 Commits

Author SHA1 Message Date
Dan Gohman
707e018423 Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49572 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-12 04:36:06 +00:00
Chris Lattner
d27c991ceb Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48963 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-30 18:22:13 +00:00
Chris Lattner
e0b1215a92 minor cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48448 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-17 06:57:02 +00:00
Evan Cheng
d2cde68855 Default ISD::PREFETCH to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:38:10 +00:00
Scott Michel
5b8f82e35b Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 15:42:14 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:58:38 +00:00
Andrew Lenharth
d497d9fab6 I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
2008-02-16 14:46:26 +00:00
Chris Lattner
ddf89566a9 This commit changes:
1. Legalize now always promotes truncstore of i1 to i8. 
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
   X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
   safe.

The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:

_foo:
	fldt	20(%esp)
	fldt	4(%esp)
	faddp	%st(1)
	movl	36(%esp), %eax
	fstps	(%eax)
	ret

instead of:

_foo:
	subl	$4, %esp
	fldt	24(%esp)
	fldt	8(%esp)
	faddp	%st(1)
	fstps	(%esp)
	movl	40(%esp), %eax
	movss	(%esp), %xmm0
	movss	%xmm0, (%eax)
	addl	$4, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
2008-01-17 19:59:44 +00:00
Chris Lattner
84bc5427d6 Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-31 04:13:23 +00:00
Chris Lattner
4ee451de36 Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-29 20:36:04 +00:00
Bill Wendling
0f8d9c04d9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 00:44:25 +00:00
Bruno Cardoso Lopes
753a98740b Added JumpTable support
Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44024 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 19:49:57 +00:00
Bruno Cardoso Lopes
c7db5618f9 Added support for PIC code with "explicit relocations" *only*.
Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43697 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 03:02:32 +00:00
Bruno Cardoso Lopes
8262df3aa4 Position Independent Code (PIC) support [3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42780 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-09 03:15:11 +00:00
Duncan Sands
f7331b3dd7 Fold the adjust_trampoline intrinsic into
init_trampoline.  There is now only one
trampoline intrinsic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41841 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 14:10:23 +00:00
Bruno Cardoso Lopes
a2b1bb5296 Changed stack allocation On LowerFORMAL_ARGUMENTS.
Added comments about new stack allocation.
Expand SelectCC for i32 results


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41527 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-28 05:08:16 +00:00
Bruno Cardoso Lopes
84f47c52fd InlineAsm asm support for integer registers added
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41225 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-21 16:09:25 +00:00
Bruno Cardoso Lopes
7ff6fa2503 Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress
fixed to generate instructions (add, lui) glued!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41158 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-18 02:16:30 +00:00
Duncan Sands
36397f5034 Support for trampolines, except for X86 codegen which is
still under discussion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40549 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-27 12:58:54 +00:00
Bruno Cardoso Lopes
2ab22d1b93 Fixed AddLiveOut issues
FI's created the write way to represent Mips stack


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39760 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 23:16:16 +00:00
Lauro Ramos Venancio
75ce010f7b Assert when TLS is not implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39737 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-11 17:19:51 +00:00
Bruno Cardoso Lopes
972f5896e4 Initial Mips support, here we go! =)
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 07:42:06 +00:00