Commit Graph

17 Commits

Author SHA1 Message Date
Chris Lattner
55b5481255 Rename the IMULri* instructions to IMULrri, as they are actually three address
instructions.  Add forms of these instructions that read from memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11518 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-17 04:26:43 +00:00
Alkis Evlogimenos
31bbb5190b Add peephole optimizations for ADD [MEM], IMM8 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11511 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-16 23:50:18 +00:00
Alkis Evlogimenos
859a18b583 Make dense maps keyed on physical registers smallerusing
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.

Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11477 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-15 21:37:17 +00:00
Alkis Evlogimenos
f81af21caf Use newly added next() and prior() utility functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11430 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-14 01:18:34 +00:00
Alkis Evlogimenos
c0b9dc5be7 Change MachineBasicBlock's vector of MachineInstr pointers into an
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11340 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-12 02:27:10 +00:00
Chris Lattner
61b08f193a Add #include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11285 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10 21:18:55 +00:00
Chris Lattner
c31ecb9aae Remove uses of MachineOperand::isVirtualRegister
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11281 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-10 20:55:47 +00:00
Alkis Evlogimenos
14be64018f Modify the two address instruction pass to remove the duplicate
operand of the instruction and thus simplify the register allocation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11124 91177308-0d34-0410-b5e6-96231b3b80d8
2004-02-04 22:17:40 +00:00
Alkis Evlogimenos
4d7af65903 Change interface of MachineOperand as follows:
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10461 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-14 13:24:17 +00:00
Chris Lattner
4537076ee8 Add a new SSA-based peephole optimizer which includes copy propagation and
folding of instructions into addressing modes.  This creates lots of dead
instructions, which are currently not deleted.  It also creates a lot of
instructions that the X86 backend currently cannot handle.  :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10275 91177308-0d34-0410-b5e6-96231b3b80d8
2003-12-01 05:15:28 +00:00
Chris Lattner
e1cc79f1cf Finegrainify namespacification
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10270 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-30 06:13:25 +00:00
Brian Gaeke
d0fde30ce8 Put all LLVM code into the llvm namespace, as per bug 109.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9903 91177308-0d34-0410-b5e6-96231b3b80d8
2003-11-11 22:41:34 +00:00
John Criswell
b576c94c15 Added LLVM project notice to the top of every C++ source file.
Header files will be on the way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9298 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-20 19:43:21 +00:00
Chris Lattner
43a5ff8d40 Emit x86 instructions for: A = B op C, where A and B are 16-bit registers,
C is a constant which can be sign-extended from 8 bits without value loss,
and op is one of: add, sub, imul, and, or, xor.

This allows the JIT to emit the one byte version of the constant instead of
the two or 4 byte version.  Because these instructions are very common, this
can save a LOT of code space.  For example, I sampled two benchmarks, 176.gcc
and 254.gap.

BM        Old     New    Reduction
176.gcc 2673621 2548962  4.89%
254.gap  498261  475104  4.87%

Note that while the percentage is not spectacular, this did eliminate
124.6 _KILOBYTES_ of codespace from gcc.  Not bad.

Note that this doesn't effect the llc version at all, because the assembler
already does this optimization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9284 91177308-0d34-0410-b5e6-96231b3b80d8
2003-10-20 05:53:31 +00:00
Brian Gaeke
19df3876e6 Factory methods for FunctionPasses now return type FunctionPass *.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7823 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-13 18:18:15 +00:00
Chris Lattner
ee3e4356fc Fix problem with invalidated iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5327 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-16 18:07:13 +00:00
Chris Lattner
a960d95253 New files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5260 91177308-0d34-0410-b5e6-96231b3b80d8
2003-01-13 01:01:59 +00:00