Commit Graph

84369 Commits

Author SHA1 Message Date
Akira Hatanaka
72e9b6aeb4 Add stub methods for mips assembly matcher.
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:16:42 +00:00
Benjamin Kramer
168843c013 MemoryBuiltins: Properly guard ObjectSizeOffsetVisitor against cycles in the IR.
The previous fix only checked for simple cycles, use a set to catch longer
cycles too.

Drop the broken check from the ObjectSizeOffsetEvaluator. The BoundsChecking
pass doesn't have to deal with invalid IR like InstCombine does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 19:26:41 +00:00
Bill Wendling
32811bef95 Change the linker_private_weak_def_auto' linkage to linkonce_odr_auto_hide' to
make it more consistent with its intended semantics.

The `linker_private_weak_def_auto' linkage type was meant to automatically hide
globals which never had their addresses taken. It has nothing to do with the
`linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix
among other things.

The intended semantic is more like the `linkonce_odr' linkage type.

Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore
changing the semantics so that it produces the correct output for the linker.

Note: The old linkage name `linker_private_weak_def_auto' will still parse but
is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0.
<rdar://problem/11754934>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 18:33:14 +00:00
Rafael Espindola
d5118c8f78 Assert that dominates is not given a multiple edge. Finding out if we have
multiple edges between two blocks is linear. If the caller is iterating all
edges leaving a BB that would be a square time algorithm. It is more efficient
to have the callers handle that case.

Currently the only callers are:
* GVN: already avoids the multiple edge case.
* Verifier: could only hit this assert when looking at an invalid invoke. Since
it already rejects the invoke, just avoid computing the dominance for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162113 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 18:21:28 +00:00
Jakob Stoklund Olesen
1f1ab3e9c4 Add comment, clean up code. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162107 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 16:59:09 +00:00
Benjamin Kramer
b97cebdfcc TargetLowering: Use the large shift amount during legalize types. The legalizer may call us with an overly large type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162101 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 15:54:21 +00:00
Jakob Stoklund Olesen
cabc0699ea Use standard pattern for iterate+erase.
Increment the MBB iterator at the top of the loop to properly handle the
current (and previous) instructions getting erased.

This fixes PR13625.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162099 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 14:38:59 +00:00
Benjamin Kramer
823573a381 Guard MemoryBuiltins against self-looping GEPs, which can occur in unreachable code due to constant propagation.
Fixes PR13621.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162098 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 14:16:37 +00:00
Benjamin Kramer
4e81d40545 Fix broken check lines.
I really need to find a way to automate this, but I can't come up with a regex
that has no false positives while handling tricky cases like custom check
prefixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 12:28:26 +00:00
Tim Northover
3c8ad92455 Implement NEON domain switching for scalar <-> S-register vmovs on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 11:32:52 +00:00
Jin-Gu Kang
734fd27647 Insertion of NoFolder functions to avoid ambiguous overload warnings or errors about whether to convert Idx to ArrayRef<Constant *> or ArrayRef<Value *> like ConstantFolder and TargetFolder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 08:54:57 +00:00
Craig Topper
63a99ff53a Use nested switch to select arguments to reduce calls to EmitPCMP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162089 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 07:15:56 +00:00
Craig Topper
c087870c47 Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162088 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:55:11 +00:00
Pranav Bhandarkar
3ec64468b0 Test commit.
include/llvm/IntrinsicsHexagon.td: Hexagon_Intrinsic is the base class
for all Hexagon intrinsics and not altivec intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:36:26 +00:00
Craig Topper
960fb74370 Remove unnecessary include of ARMGenInstrInfo.inc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 06:21:09 +00:00
Craig Topper
8cd9eaef01 Declare some for loop indices inside the for loop statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162085 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 05:42:16 +00:00
Craig Topper
c056483fc6 Fix up indentation of outputted decode function for readability.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 05:16:15 +00:00
NAKAMURA Takumi
c797f2e9c7 lit: Show actually created count of threads. The incorrect threads count is printed if the number of tests are less than the number of default threads.
Thanks to Vinson Lee, reported in PR13620.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 04:15:41 +00:00
Chandler Carruth
cbeb8d9869 Flatten the aligned-char-array utility template to be a directly
templated union at the request of Richard Smith. This makes it
substantially easier to type. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 01:47:25 +00:00
Jakob Stoklund Olesen
083b48af14 Add ADD and SUB to the predicable ARM instructions.
It is not my plan to duplicate the entire ARM instruction set with
predicated versions. We need a way of representing predicated
instructions in SSA form without requiring a separate opcode.

Then the pseudo-instructions can go away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:21:55 +00:00
Jakob Stoklund Olesen
053b5b0b3c Handle ARM MOVCC optimization in PeepholeOptimizer.
Use the target independent select analysis hooks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:14:20 +00:00
Jakob Stoklund Olesen
f2c64ef519 Add an MCID::Select flag and TII hooks for optimizing selects.
Select instructions pick one of two virtual registers based on a
condition, like x86 cmov. On targets like ARM that support predication,
selects can sometimes be eliminated by predicating the instruction
defining one of the operands.

Teach PeepholeOptimizer to recognize select instructions, and ask the
target to optimize them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 23:11:47 +00:00
Roman Divacky
05b2bc8781 Revert r162034, r162035 and r162037.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162039 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 19:07:59 +00:00
Roman Divacky
e88d17de99 Define and handle additional fixup kinds. By Adhemerval Zanella.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162037 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:37:52 +00:00
Roman Divacky
dd4b9f3fe9 Add PPC64 relocations definitions, by Adhemerval Zanella.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162035 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:31:29 +00:00
Roman Divacky
745d94d29f Handle PowerPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:30:03 +00:00
Roman Divacky
0016f73ae5 Fix typo and grammar. By Adhemerval Zanella.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 18:19:29 +00:00
Rafael Espindola
0513059726 Teach GVN to reason about edges dominating uses. This allows it to handle cases
where some fact lake a=b dominates a use in a phi, but doesn't dominate the
basic block itself.

This feature could also be implemented by splitting critical edges, but at least
with the current algorithm reasoning about the dominance directly is faster.

The time for running "opt -O2" in the testcase in pr10584 is 1.003 times slower
and on gcc as a single file it is 1.0007 times faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 15:09:43 +00:00
Nadav Rotem
52b7ec68d2 Add dump/dumpr methods to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162014 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 07:39:52 +00:00
Jush Lu
2ff4e9d5af [arm-fast-isel] Add support for fastcc.
Without fastcc support, the caller just falls through to CallingConv::C
for fastcc, but callee still uses fastcc, this inconsistency of calling
convention is a problem, and fastcc support can fix it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162013 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 05:15:53 +00:00
Anitha Boyapati
9418f17652 Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162012 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 04:04:02 +00:00
Anitha Boyapati
2e7a01cb42 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162010 91177308-0d34-0410-b5e6-96231b3b80d8 2012-08-16 03:50:04 +00:00
Akira Hatanaka
a75e1a4d36 Test case for r162008.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162009 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 03:48:41 +00:00
Akira Hatanaka
bb2e1b581a Add Android ABI to Mips backend to handle functions returning vectors of four
floats.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162008 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-16 03:48:05 +00:00
Victor Oliveira
385401a325 bug in experimental targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161995 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 22:35:36 +00:00
Jakob Stoklund Olesen
2860b7ea3a Fold predicable instructions into MOVCC / t2MOVCC.
The ARM select instructions are just predicated moves. If the select is
the only use of an operand, the instruction defining the operand can be
predicated instead, saving one instruction and decreasing register
pressure.

This implementation can turn AND/ORR/EOR instructions into their
corresponding ANDCC/ORRCC/EORCC variants. Ideally, we should be able to
predicate any instruction, but we don't yet support predicated
instructions in SSA form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161994 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 22:16:39 +00:00
Bill Wendling
8dd2e5bf83 Remove dead flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161990 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 21:18:10 +00:00
Bill Wendling
1e0b864d23 Rework test so that it reproduces the error without the horrible flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161989 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 21:10:18 +00:00
Bill Wendling
9c0f0dc7b2 Remove invalid test. This test requires that dead basic blocks be kept
around. That's not how we do things. Besides, the commit message tells us that
it is covered by the GCC test suite.

------------------------------------------------------------------------
r127497 | zwarich | 2011-03-11 13:51:56 -0800 (Fri, 11 Mar 2011) | 3 lines

Fix the GCC test suite issue exposed by r127477, which was caused by stack
protector insertion not working correctly with unreachable code. Since that
revision was rolled out, this test doesn't actual fail before this fix.
------------------------------------------------------------------------



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 20:54:09 +00:00
Sean Callanan
f92bbcd1ce Fixed a problem in the JIT memory allocator where
allocations of executable memory would not be padded
to account for the size of the allocation header.
This resulted in undersized allocations, meaning that
when the allocation was written to later the next
allocation's header would be corrupted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 20:53:52 +00:00
Jakob Stoklund Olesen
d024a20bf7 Add a CoveringSubRegIndices field to SubRegIndex records.
This can be used to tell TableGen to use a specific SubRegIndex instead
of synthesizing one when discovering all sub-registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 20:15:48 +00:00
Michael J. Spencer
3651e7dfec Properly test the LLVM_USE_RVALUE_REFERENCES macro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 19:21:42 +00:00
Michael J. Spencer
118f194966 Properly test the LLVM_USE_RVALUE_REFERENCES macro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 19:16:27 +00:00
Michael J. Spencer
1ebd25e438 [PathV2] Add mapped_file_region. Implementation for Windows and POSIX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 19:05:47 +00:00
Michael J. Spencer
b9d565ac99 Add LLVM_DELETED_FUNCTION compatibility macro.
This should replace uses of:

class A {
  A(const &A); // DO NOT IMPLEMENT
public:
  ...
};

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161975 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 18:54:36 +00:00
Chad Rosier
58aae3841c Fix a typo in VariadicFunction.h that leads to invalid code in macro expansion.
Patch by Andy Gibbs <andyg1001@hotmail.co.uk>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161973 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 18:48:14 +00:00
Owen Anderson
c82cc587a4 Fix another roundToIntegral bug where very large values could become infinity. Problem and solution identified by Steve Canon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161969 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 18:28:45 +00:00
Jakob Stoklund Olesen
c97eda2c9e Make synthesized sub-register indexes available in the target namespace.
TableGen sometimes synthesizes missing sub-register indexes. Emit these
indexes as enumerators in the target namespace along with the
user-defined ones.

Also take this opportunity to stop creating new Record objects for
synthetic indexes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161964 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 18:00:55 +00:00
Evan Cheng
a99c508c8d Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows unaligned access. rdar://12091029
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161962 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 17:44:53 +00:00
Owen Anderson
7c28978618 Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-15 16:42:53 +00:00