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Author SHA1 Message Date
Evan Cheng
9763f709e2 Rename -machine-cse to -enable-machine-cse. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97713 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 02:08:04 +00:00
Chris Lattner
97d853451e add a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 01:43:43 +00:00
Chris Lattner
57fcd03611 so hey, it turns out that the histogram was completely wrong, because 
we sometimes emit nodes multiple times to string buffers to size them.
Compute the histogram correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97708 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 01:34:29 +00:00
Evan Cheng
b3958e8032 Look ahead a bit to determine if a physical register def that is not marked dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97706 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 01:33:55 +00:00
Chris Lattner
6b4ae71725 zap fixme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 01:26:00 +00:00
Chris Lattner
9752fb10a4 now that complexpatterns are all emitted at the end of the match 
sequence, just emit instruction predicates right before them.  This
exposes yet more factoring opportunitites, shrinking the X86 table 
to 79144 bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97704 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 01:25:36 +00:00
Chris Lattner
57bf8a483e change the new isel matcher to emit ComplexPattern matches 
as the very last thing before node emission.  This should
dramatically reduce the number of times we do 'MatchAddress'
on X86, speeding up compile time.  This also improves comments
in the tables and shrinks the table a bit, now down to 
80506 bytes for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97703 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 01:23:08 +00:00
Jeffrey Yasskin
8e98d1299d Make sure JITResolvers don't leave any stubs behind. When a JITResolver was 
destroyed, it could leave stubs in the StubToResolverMap, which would confuse
the lookup for subsequent lazy compilations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97698 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 00:32:33 +00:00
Chris Lattner
d1aca7c8b4 enhance comment output to specify what recorded slot 
numbers a ComplexPat will match into.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97696 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 00:28:05 +00:00
Dan Gohman
6900a39d28 Fix more code to work properly with vector operands. Based on 
a patch my Micah Villmow for PR6465.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97692 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 00:23:16 +00:00
John McCall
992e61992c Teach the pic16 target to recognize pic16-*-* triples. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97691 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 00:21:47 +00:00
Chris Lattner
2c4afd1d8e inline CannotYetSelectIntrinsic into CannotYetSelect and simplify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-04 00:21:16 +00:00
Evan Cheng
67bda7215b Fix a logic error. An instruction that has a live physical register def cannot be CSE'ed, but it *can* be used to replace a common subexpression. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:59:08 +00:00
Evan Cheng
a92dced4a1 Remove PHINodeTraits and use MachineInstrExpressionTrait instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97687 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:55:49 +00:00
Erick Tryzelaar
7eb4beb4cd Expose the rest of the llvm-c scalar opts to ocaml. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:51:34 +00:00
Erick Tryzelaar
9c7c566efe Rename some ocaml functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:51:30 +00:00
Erick Tryzelaar
7b3afb4547 Expose the external functions for ocaml's execution engine as an optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:51:28 +00:00
Erick Tryzelaar
4ad188ba8d Expose alignment and stack alignment attributes to llvm-c and ocaml. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97682 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:51:25 +00:00
Evan Cheng
67eaa08f2b Move MachineInstrExpressionTrait::getHashValue() out of line so it can skip over only virtual register defs. This matches what isEqual() is doing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97680 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:37:30 +00:00
Evan Cheng
05bdcbb1ae Re-apply r97667 but with a little bit of thought put into the patch. This implements a special DenseMapInfo trait for DenseMap<MachineInstr*> that compare the value of the MachineInstr rather than the pointer value. Since the hashing and equality test functions ignore defs it's useful for doing CSE kind optimization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:27:36 +00:00
Johnny Chen
cb721da4c6 Modified the asm string of 16-bit Thumb MUL instruction so that it prints: 
MULS <Rdm>, <Rn>, <Rdm>

according to A8.6.105 MUL Encoding T1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97675 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 23:15:43 +00:00
Dan Gohman
319dfa3fb3 Revert 97667. It broke a bunch of tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97673 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 22:40:03 +00:00
Evan Cheng
34cdf6edf5 Fix funky indentation and add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 21:54:14 +00:00
Evan Cheng
a054ae02fd Move DenseMapInfo for MachineInstr* to MachineInstr.h 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 21:47:16 +00:00
Dan Gohman
a72d2a210c Fix a bug in SelectionDAG's ReplaceAllUsesWith in the case where 
CSE and recursive RAUW calls delete a node from the use list,
invalidating the use list iterator. There's currently no known
way to reproduce this in an unmodified LLVM, however there's no
fundamental reason why a SelectionDAG couldn't be formed which
would trigger this case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97665 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 21:33:37 +00:00
Evan Cheng
16b48b8a05 Machine CSE work in progress. It's doing some CSE now. But implicit def of physical registers are getting in the way. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97664 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 21:20:05 +00:00
Evan Cheng
1423c70b8f Add MachineRegisterInfo::hasOneUse and hasOneNonDBGUse. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97663 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 21:18:38 +00:00
Chris Lattner
14c85cbf54 don't use always_inline with gcc 3.4, it has some unimplemented features 
and is too old to really care about the performance of the generated 
compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97662 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 20:47:12 +00:00
Evan Cheng
a84f3d9a97 TopLevelMap[] reference is a pointer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97661 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 20:46:48 +00:00
Andrew Lenharth
aedc3ec1e2 Fix PR6444, note still doesn't compile libgcc2 all the way, but fixes that error. May not fix it in an ABI complient way. It wasn't clear what gcc does 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 20:15:31 +00:00
Chris Lattner
c8e14b3d37 fix incorrect folding of icmp with undef, PR6481. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97659 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 19:46:03 +00:00
Bill Wendling
fec8657351 Revert... 
--- Reverse-merging r97592 into '.':
U    lib/CodeGen/TargetLoweringObjectFileImpl.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97657 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 19:31:05 +00:00
Johnny Chen
e54a3ef087 Added 32-bit Thumb instructions LDRT, LDRBT, LDRHT,,LDRSBT, LDRSHT, STRT, STRBT, 
and STRHT for disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97655 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 18:45:36 +00:00
Chris Lattner
da828e3c8c add some of the more obscure predicate types to the 
Scope accelerator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 07:46:25 +00:00
Chris Lattner
f1b7c7d476 speed up scope node processing: if the first element of a scope 
entry we're about to process is obviously going to fail, don't
bother pushing a scope only to have it immediately be popped.
This avoids a lot of scope stack traffic in common cases.

Unfortunately, this requires duplicating some of the predicate
dispatch.  To avoid duplicating the actual logic I pulled each
predicate out to its own static function which gets used in
both places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 07:31:15 +00:00
Chris Lattner
cfe2eab744 introduce a new SwitchTypeMatcher node (which is analogous to 
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it.  This
speeds up selection, particularly for X86 which has lots of 
variants of instructions with only type differences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97645 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 06:28:15 +00:00
Bill Wendling
30174be37a Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97644 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 05:40:40 +00:00
Dan Gohman
087bd1e3a1 Make SCEVExpander and LSR more aggressive about hoisting expressions out 
of loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 05:29:13 +00:00
Dan Gohman
ed78dbafd0 Revert r97580; that's not the right way to fix this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97639 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 04:36:42 +00:00
Evan Cheng
6ba9554988 Work in progress. Finding some cse now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97635 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 02:48:20 +00:00
Chris Lattner
99fe641325 remove nvload and two patterns that use it which are 
better done by dag combine.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97633 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 02:14:54 +00:00
Johnny Chen
0f7866e796 Added 32-bit Thumb instructions t2NOP, t2YIELD, t2WFE, t2WFI, t2SEV, and t2DBG 
for disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97632 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 02:09:43 +00:00
Bill Wendling
32f9eb2bc3 Use APInt instead of zext value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97631 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 01:58:01 +00:00
Chris Lattner
f85eff76b2 factor the 'in the default address space' check out to a single 
'dsload' pattern.  tblgen doesn't check patterns to see if they're
textually identical.  This allows better factoring.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97630 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 01:52:59 +00:00
Chris Lattner
1840991d54 factor the 'sign extended from 8 bit' patterns better so 
that they are not destination type specific.  This allows
tblgen to factor them and the type check is redundant with
what the isel does anyway.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97629 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 01:45:01 +00:00
Evan Cheng
506049f29f - Change MachineInstr::isIdenticalTo to take a new option that determines whether it should skip checking defs or at least virtual register defs. This subsumes part of the TargetInstrInfo::isIdentical functionality. 
- Eliminate TargetInstrInfo::isIdentical and replace it with produceSameValue. In the default case, produceSameValue just checks whether two machine instructions are identical (except for virtual register defs). But targets may override it to check for unusual cases (e.g. ARM pic loads from constant pools).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97628 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 01:44:33 +00:00
Evan Cheng
d89347cb49 Add an option to enable machine cse (it's not doing anything yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97627 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 01:38:35 +00:00
Evan Cheng
9066f4c6fc Ordering forward declarations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 01:37:50 +00:00
Bill Wendling
fbe8eab37e Don't turn assertions on by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97623 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 01:13:55 +00:00
Evan Cheng
bc9d22c99a Eliminate unused instruction classes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97617 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-03-03 00:43:15 +00:00