Commit Graph

51686 Commits

Author SHA1 Message Date
Stepan Dyatkovskiy
8c0b807e8f Fixed bug 9905: Failure in code selection for llvm intrinsics sqrt/exp (fix for FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2). Second attempt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 08:42:24 +00:00
Hal Finkel
fed4d19edd Make CR spill and restore use a reserved register. These operations cannot use the register scavenger because the scavenger can only scavenge one register and frame-index elimination may have already grabbed it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 04:50:53 +00:00
Jakob Stoklund Olesen
77caaf0fc0 Try to align the point where a large basic block is split.
The split point is picked such that the newly created water has the same
alignment as the function. This makes the island suitable for constant
pool entries with potentially higher alignment.

This also fixes an issue where the basic block was split one instruction
too late, causing nonconvergence of the algorithm.

<rdar://problem/10550705>

There is still an issue with correctly packing differently aligned
entries in the island.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146314 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 02:55:10 +00:00
Jakob Stoklund Olesen
2d5023bbcf More debug output formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 02:55:06 +00:00
Rafael Espindola
f3aefb56de Handle expressions of the form _GLOBAL_OFFSET_TABLE_-symbol the same way gas
does. The _GLOBAL_OFFSET_TABLE_ is still magical in that we get a R_386_GOTPC,
but it doesn't change the immediate in the same way as when the expression
has no right hand side symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 02:28:43 +00:00
Andrew Trick
fa1948a40f LSR: ignore strides in outer loops.
Since we're not rewriting IVs in other loops, there's not much reason
to consider their stride when generating formulae.
This should reduce the number of useless formulas considered by LSR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 00:25:00 +00:00
Jim Grosbach
48171e7fbe ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-10 00:01:02 +00:00
Eli Friedman
effab8fa24 Splats can contain undef's; make sure to handle them correctly. PR11526.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 23:54:42 +00:00
Jim Grosbach
21d7fb814a ARM add some pre-UAL VFP mnemonics for convenience when porting old code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146296 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 23:34:09 +00:00
Bill Wendling
f4374e46fd Add dump method for debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 23:18:34 +00:00
Jim Grosbach
8a12e3b5df ARM allows '' syntax, not just '#imm' for assembly.
Backwards compatibility with 'gas'. #imm is the preferered and documented
syntax, but lots of existing code uses the '$' prefix, so we should
support it if we can.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146285 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 22:25:03 +00:00
Kostya Serebryany
25a8b809a0 [asan] call __asan_init from .preinit_array. This simplifies __asan_init vs malloc chicken-and-egg situation on Android and probably on other flavours of Linux. Patch by eugenis@google.com.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146284 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 22:09:32 +00:00
Jim Grosbach
840bf7eda7 ARM assembly aliases for BIC<-->AND (immediate).
When the immediate operand of an AND or BIC instruction isn't representable
in the immediate field of the instruction, but the bitwise negation of the
immediate is, assemble the instruction as the inverse operation instead
with the inverted immediate as the operand.

rdar://10550057


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 22:02:17 +00:00
Jim Grosbach
4332983e77 ARM NEON data type aliases for VBIC(register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146281 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 21:46:04 +00:00
Jim Grosbach
a4e3c7fc4b ARM assembly parsing and encoding for VLD2 with writeback.
Refactor the instructions into fixed writeback and register-stride
writeback variants to simplify the offset operand (no more optional
register operand using reg0). This is a simpler representation and allows
the assembly parser to more easily handle these instructions.

Add tests for the instruction variants now supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146278 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 21:28:25 +00:00
Jakub Staszak
2fac1d5d61 SplitBlockPredecessors uses ArrayRef instead of Data and Size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146277 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 21:19:53 +00:00
Chad Rosier
cd462d055f [fast-isel] Add support for selecting insertvalue.
rdar://10530851

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 20:09:54 +00:00
Rafael Espindola
3c68acd202 Handle reloc_signed_4byte in here. Not doing so was a regression from my
previous commit. It is strange that we see it in 32 bits. We already
have a fixme about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146273 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 19:57:29 +00:00
Jakob Stoklund Olesen
493ad6b95d User a helper overload for a common pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146270 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 19:44:39 +00:00
Jim Grosbach
2af50d981d Tidy up. Better base class factoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146267 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 19:07:20 +00:00
Jim Grosbach
1f94ec7b59 Tidy up. Better base class factoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 18:54:11 +00:00
Jakob Stoklund Olesen
3c4615eef2 Tweak debugging output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 18:20:35 +00:00
Kevin Enderby
94c2e85bea The second part of support for generating dwarf for assembly source files. This
generates the dwarf Compile Unit DIE and a dwarf subprogram DIE for each
non-temporary label.

The next part will be to get the clang driver to enable this when assembling
a .s file.  rdar://9275556


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146262 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 18:09:40 +00:00
Benjamin Kramer
bf67a99c35 This is now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 15:45:57 +00:00
Benjamin Kramer
b653397dcd X86: Add patterns for the various rounding ops for SSE4.1 and AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 15:44:03 +00:00
Benjamin Kramer
a73fb9adbb X86: Split (v)rounds[sd] into a normal and an intrinsic version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146256 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 15:43:55 +00:00
Evan Cheng
32f9763017 Move isUnpredicatedTerminator() default implementation to TargetInstrInfoImpl to break Target's dependency on CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146247 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 06:41:08 +00:00
Evan Cheng
85abb2700d Remove hasSSE1orAVX(). It's the same as hasXMM().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 06:32:46 +00:00
Andrew Trick
5d73448bb7 Add -unroll-runtime for unrolling loops with run-time trip counts.
Patch by Brendon Cahoon!

This extends the existing LoopUnroll and LoopUnrollPass. Brendon
measured no regressions in the llvm test suite with -unroll-runtime
enabled. This implementation works by using the existing loop
unrolling code to unroll the loop by a power-of-two (default 8). It
generates an if-then-else sequence of code prior to the loop to
execute the extra iterations before entering the unrolled loop.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 06:19:40 +00:00
Rafael Espindola
1d5969d839 Handle the case of the magical _GLOBAL_OFFSET_TABLE_ showing up in a
symbol difference. This matches gas behavior and fixes PR11513.

We still don't handle _GLOBAL_OFFSET_TABLE_ in data sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 03:03:58 +00:00
Akira Hatanaka
6df7e23f0c Rename WrapperPIC. It is now used for both pic and static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:53:17 +00:00
Akira Hatanaka
0dca9456c5 jalr should use t9 ($25) for indirect calls regardless of the relocation model
specified.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:45:12 +00:00
Devang Patel
f5b9a74f0a Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:25:04 +00:00
Devang Patel
2b1d77355b Update stale comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146220 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:18:48 +00:00
Eli Friedman
2dd0353fec Fix a couple of logic bugs in TargetLowering::SimplifyDemandedBits. PR11514.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146219 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:16:26 +00:00
Devang Patel
7f7f0902a6 Revert r146184. I am seeing performance regression cause by this patch in one test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 23:52:00 +00:00
Jim Grosbach
976c0da213 ARM convenience aliases for VSQRT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:51:25 +00:00
Michael J. Spencer
a81ac8f2b5 Support/FileSystem: Implement recursive_directory_iterator and make
directory_iterator preserve InputIterator semantics on copy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146200 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:50:09 +00:00
Nick Lewycky
c9b98ad7a7 Fix infinite loop in DSE when deleting a free in a reachable loop that's also
trivially infinite.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:36:35 +00:00
Evan Cheng
e955726a0e Add 256-bit variant vmovss and vmovsd patterns. rdar://10538417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:30:45 +00:00
Jim Grosbach
8759c3f548 ARM 64-bit VEXT assembly uses a .64 suffix, not .32, amazingly enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:19:04 +00:00
Owen Anderson
243eb9ecbb Enhance both TargetLibraryInfo and SelectionDAGBuilder so that the latter can use the former to prevent the formation of libm SDNode's when -fno-builtin is passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:15:21 +00:00
Jim Grosbach
6b044c2609 ARM VSHR implied destination operand form aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:06:06 +00:00
Evan Cheng
13d2ba34f2 Add various missing AVX patterns which was causing crashes. Sadly, the generated
code looks pretty bad compared to SSE.

rdar://10538793


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146191 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 22:05:28 +00:00
Devang Patel
e265bcf1a6 Refactor. No intentional functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146187 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 21:48:01 +00:00
Chad Rosier
73e08d3507 Add rather verbose stats for fast-isel failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 21:37:10 +00:00
Jim Grosbach
a62d11ea94 ARM asm parser, just issue a warning for a duplicate reg in a list.
For better 'gas' compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146185 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 21:34:20 +00:00
Devang Patel
cf405ba7a6 Filter "sink to" candidate blocks sooner. This avoids unnecessary computation to determine whether the block dominates all uses or not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 21:33:23 +00:00
Akira Hatanaka
7a7194b529 Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo in
MipsTargetLowering::LowerGlobalTLSAddress. This is necessary to have
call16(__tls_get_addr) emitted instead of got_disp(__tls_get_addr) when the
target is Mips64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 21:05:38 +00:00
Jim Grosbach
120313435d ARM VSUB implied destination operand form aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 20:56:26 +00:00