Andrew Trick
79f0bfcc20
Fix SCEV overly optimistic back edge taken count for multi-exit loops.
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Fixes PR11375: Different results for 'clang++ huh.cpp'...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 00:52:40 +00:00
Chad Rosier
f56c60b571
Add FIXME comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-16 00:32:20 +00:00
Jakob Stoklund Olesen
3805d85e38
Enable -widen-vmovs by default.
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This will widen 32-bit register vmov instructions to 64-bit when
possible. The 64-bit vmovd instructions can then be translated to NEON
vorr instructions by the execution dependency fix pass.
The copies are only widened if they are marked as clobbering the whole
D-register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144734 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 23:53:18 +00:00
Eric Christopher
8368f74c43
Stabilize the output of the dwarf accelerator tables. Fixes a comparison
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failure during bootstrap with it turned on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144731 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 23:37:17 +00:00
Chad Rosier
22b34cce4d
GEPs with all zero indices are trivially coalesced by fast-isel. For example,
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%arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0
%arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134
Prior to this commit, the GEP instruction that defines %arrayidx136 thought that
%arrayidx135 was a trivial kill. The GEP that defines %arrayidx135 doesn't
generate any code and thus %M0 gets folded into the second GEP. Thus, we need
to look through GEPs with all zero indices.
rdar://10443319
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 23:34:05 +00:00
Jim Grosbach
e43862b6a6
ARM assembly parsing for register range syntax for VLD/VST register lists.
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For example,
vld1.f64 {d2-d5}, [r2,:128]!
Should be equivalent to:
vld1.f64 {d2,d3,d4,d5}, [r2,:128]!
It's not documented syntax in the ARM ARM, but it is consistent with what's
accepted for VLDM/VSTM and is unambiguous in meaning, so it's a good thing to
support.
rdar://10451128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144727 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 23:19:15 +00:00
Devang Patel
6ac5b165d4
Merge ObjCPropertyDebugInfo.html into SourceLevelDebugging.html
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:59:54 +00:00
Jim Grosbach
5b2fb2083c
ARM assembly parsing for data type suffices on NEON VMOV aliases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:54:42 +00:00
Nadav Rotem
de631128d6
Fix MSVC warnings by adding a cast.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144721 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:54:21 +00:00
Nadav Rotem
f8c10e5cb1
AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vbroadcast code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144720 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:50:37 +00:00
Chris Lattner
62f009af41
jakob fixed X87 inline asm!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144719 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:48:24 +00:00
Chris Lattner
2fdd005d97
add ImmutableSet/Map dox, patch by Caitlin Sadowski!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144716 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:40:14 +00:00
NAKAMURA Takumi
ec0af2f4e1
test/CodeGen/X86/dec-eflags-lower.ll: Relax expression for win32 x64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:30:37 +00:00
Jim Grosbach
9f302c4fb3
ARM assembly parsing two operand forms for shift instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144713 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:27:54 +00:00
Chris Lattner
7b95c38813
add PTX backend info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:23:46 +00:00
Jim Grosbach
88d012a9c3
ARM VFP assembly parsing for VADD and VSUB two-operand forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144710 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:15:10 +00:00
Jim Grosbach
6cb4b08182
ARM accept an immediate offset in memory operands w/o the '#'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:14:41 +00:00
Chris Lattner
dec23b679e
some notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 22:13:27 +00:00
Pete Cooper
2d49689793
Added custom lowering for load->dec->store sequence in x86 when the EFLAGS registers is used
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by later instructions.
Only done for DEC64m right now.
Fixes <rdar://problem/6172640>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:57:53 +00:00
Jim Grosbach
5c984e451d
ARM enclosing curly braces optional on one-register VLD/VST instruction lists.
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'vld1.f32 d4, [r7]' should be parsed as equivalent to 'vld1.f32 {d4}, [r7]'
rdar://10450488.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144701 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:45:55 +00:00
Akira Hatanaka
5381cbf4f4
Update section "MIPS Target Improvements" in the llvm 3.0 release notes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144699 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:33:05 +00:00
Jim Grosbach
eaf2056709
ARM size suffix on VFP single-precision 'vmov' is optional.
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rdar://10435114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144698 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:18:35 +00:00
Devang Patel
d2df64f569
Insert modified DBG_VALUE into LiveDbgValueMap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:03:58 +00:00
Jim Grosbach
25e0a87e91
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144695 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 21:01:30 +00:00
Jim Grosbach
19885de61d
ARM alternate size suffices for VTRN instructions.
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rdar://10435076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144694 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 20:49:46 +00:00
Owen Anderson
22925d93e9
Fix a misplaced paren bug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144692 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 20:30:41 +00:00
Jim Grosbach
a68e90c36e
ARM assembly parsing for optional datatype suffix on VFP VMOV GPR<->VFP insns.
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Yet more of rdar://10435076.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 20:29:42 +00:00
Jim Grosbach
bfb0a1717b
ARM assembly parsing for two-operand form of 'mul' instruction.
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rdar://10449856.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 20:14:51 +00:00
Jim Grosbach
d2586daf06
ARM assembly parsing for two-operand form of 'mul' instruction.
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Ongoing rdar://10435114.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144688 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 20:02:06 +00:00
Jim Grosbach
908f923cfc
Testcase for r144684.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144685 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 19:56:17 +00:00
Jim Grosbach
7f1ec9570d
Thumb2 two-operand 'mul' instruction wide encoding parsing.
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rdar://10449724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 19:55:16 +00:00
Owen Anderson
b589be9334
Fix an ambiguous decoding where we failed to properly decode VMOVv2f32 and VMOVv4f32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 19:55:00 +00:00
Jim Grosbach
1de0bd1945
Thumb2 assembly parsing for mul.w in IT block fix.
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When the 3rd operand is not a low-register, and the first two operands are
the same low register, the parser was incorrectly trying to use the 16-bit
instruction encoding.
rdar://10449281
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 19:29:45 +00:00
Benjamin Kramer
b5ccb25bc2
StringRefize and simplify.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 19:12:09 +00:00
Rafael Espindola
6c5b2dcd83
We currently use a callback to handle an IL pass deleting a BB that still
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has a reference to it. Unfortunately, that doesn't work for codegen passes
since we don't get notified of MBB's being deleted (the original BB stays).
Use that fact to our advantage and after printing a function, check if
any of the IL BBs corresponds to a symbol that was not printed. This fixes
pr11202.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144674 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 19:08:46 +00:00
Akira Hatanaka
1b71950812
Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bit
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registers and instructions when ABI is N64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144666 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:53:55 +00:00
Akira Hatanaka
ac20aad81c
Set nomacro before emitting the sequence of instructions that set global pointer
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register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:44:44 +00:00
Akira Hatanaka
160408546c
Simplify function PassByValArg64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:42:25 +00:00
Akira Hatanaka
00e1fa499d
Remove function printMipsSymbolRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144663 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:38:35 +00:00
Benjamin Kramer
2bbb7e3ca6
Remove Value::getNameStr. It has been deprecated for a while and provides no additional value over getName().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:30:12 +00:00
Benjamin Kramer
2774dc085d
Missed some users of Value::getNameStr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:30:06 +00:00
Akira Hatanaka
870b3b2dd4
Delete files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144655 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:22:48 +00:00
Akira Hatanaka
73c38f0aa2
Remove MipsMCSymbolRefExpr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:20:08 +00:00
Jim Grosbach
c5a6a687fd
ARM parsing datatype suffix variants for register-writeback VLD1/VST1 instructions.
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rdar://10435076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144650 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 17:49:59 +00:00
Jim Grosbach
946227d64a
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 16:46:22 +00:00
Benjamin Kramer
a7b0cb7594
Remove all remaining uses of Value::getNameStr().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 16:27:03 +00:00
Benjamin Kramer
25ad1cc32a
Twinify GraphWriter a little bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 16:26:38 +00:00
Jakob Stoklund Olesen
d1bfc30198
Check all overlaps when looking for used registers.
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A function using any RC alias is enough to enable the ExeDepsFix pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 08:20:43 +00:00
Jay Foad
f4a5084d06
Make use of MachinePointerInfo::getFixedStack.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 07:51:13 +00:00
Jay Foad
8c2e35269c
Remove some unnecessary includes of PseudoSourceValue.h.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 07:50:46 +00:00