Commit Graph

109767 Commits

Author SHA1 Message Date
Chad Rosier
7ad8db4cbb [Reassociate] Canonicalize negative constants out of expressions.
Add support for FDiv, which was regressed by the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221738 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:36:42 +00:00
Philip Reames
a03cda02ab Canonicalize an assume(load != null) into !nonnull metadata
We currently have two ways of informing the optimizer that the result of a load is never null: metadata and assume. This change converts the second in to the former. This avoids a need to implement optimizations using both forms.

We should probably extend this basic idea to metadata of other forms; in particular, range metadata. We view is that assumes should be considered a "last resort" for when there isn't a more canonical way to represent something.

Reviewed by: Hal
Differential Revision: http://reviews.llvm.org/D5951



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221737 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:33:19 +00:00
Duncan P. N. Exon Smith
4f897091e4 libLTO: Allow linker to choose context of modules and codegen
Add API for specifying which `LLVMContext` each `lto_module_t` and
`lto_code_gen_t` is in.

In particular, this enables the following flow:

    for (auto &File : Files) {
      lto_module_t M = lto_module_create_in_local_context(File...);
      querySymbols(M);
      lto_module_dispose(M);
    }

    lto_code_gen_t CG = lto_codegen_create_in_local_context();
    for (auto &File : FilesToLink) {
      lto_module_t M = lto_module_create_in_codegen_context(File..., CG);
      lto_codegen_add_module(CG, M);
      lto_module_dispose(M);
    }
    lto_codegen_compile(CG);
    lto_codegen_write_merged_modules(CG, ...);
    lto_codegen_dispose(CG);

This flow has a few benefits.

  - Only one module (two if you count the combined module in the code
    generator) is in memory at a time.

  - Metadata (and constants) from files that are parsed to query symbols
    but not linked into the code generator don't pollute the global
    context.

  - The first for loop can be parallelized, since each module is in its
    own context.

  - When the code generator is disposed, the memory from LTO gets freed.

rdar://problem/18767512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221733 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:19:23 +00:00
Sanjay Patel
4e9c3e9cee Initialize new subtarget feature variable for generating reciprocal estimate instructions.
This was missed in r221706.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221731 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:13:15 +00:00
Duncan P. N. Exon Smith
ab75fd0694 libLTO: Assert if LTOCodeGenerator and LTOModule are from different contexts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221730 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:13:10 +00:00
Juergen Ributzka
4f0d671b97 [FastISel][AArch64] Add support for fabs intrinsic.
Lower the llvm.fabs intrinsic to the 'fabs' MI instruction.

This fixes rdar://problem/18946552.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221729 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:10:44 +00:00
Duncan P. N. Exon Smith
18a16fd279 libLTO: Allow LTOModule to own a context
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221728 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:08:05 +00:00
Duncan P. N. Exon Smith
bce40075a9 libLTO: Allow LTOCodeGenerator to own a context
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221726 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:03:29 +00:00
Kostya Serebryany
d54a2bf8e1 [asan] adding ShadowOffset64 for mips64, patch by Kumar Sukhani
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221725 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 23:02:57 +00:00
Chad Rosier
2244d9a5d2 [Reassociate] Canonicalize negative constants out of expressions.
This is a reapplication of r221171, but we only perform the transformation
on expressions which include a multiplication.  We do not transform rem/div
operations as this doesn't appear to be safe in all cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221721 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 22:58:35 +00:00
Kostya Serebryany
abb3335f6d Move asan-coverage into a separate phase.
Summary:
This change moves asan-coverage instrumentation
into a separate Module pass.
The other part of the change in clang introduces a new flag
-fsanitize-coverage=N.
Another small patch will update tests in compiler-rt.

With this patch no functionality change is expected except for the flag name.
The following changes will make the coverage instrumentation work with tsan/msan

Test Plan: Run regression tests, chromium.

Reviewers: nlewycky, samsonov

Reviewed By: nlewycky, samsonov

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6152

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221718 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 22:14:37 +00:00
Duncan P. N. Exon Smith
5bf8ade9d0 Revert "IR: MDNode => Value"
Instead, we're going to separate metadata from the Value hierarchy.  See
PR21532.

This reverts commit r221375.
This reverts commit r221373.
This reverts commit r221359.
This reverts commit r221167.
This reverts commit r221027.
This reverts commit r221024.
This reverts commit r221023.
This reverts commit r220995.
This reverts commit r220994.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221711 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:30:22 +00:00
Tom Roeder
15d6f7c3cc Fix build break: remove unused variable in FCFI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221710 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:26:33 +00:00
Frederic Riss
6eb7964b7d Totally forget deallocated SDNodes in SDDbgInfo.
What would happen before that commit is that the SDDbgValues associated with
a deallocated SDNode would be marked Invalidated, but SDDbgInfo would keep
a map entry keyed by the SDNode pointer pointing to this list of invalidated
SDDbgNodes. As the memory gets reused, the list might get wrongly associated
with another new SDNode. As the SDDbgValues are cloned when they are transfered,
this can lead to an exponential number of SDDbgValues being produced during
DAGCombine like in http://llvm.org/bugs/show_bug.cgi?id=20893

Note that the previous behavior wasn't really buggy as the invalidation made
sure that the SDDbgValues won't be used. This commit can be considered a
memory optimization and as such is really hard to validate in a unit-test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221709 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:21:08 +00:00
Tom Roeder
63dea2c952 Add Forward Control-Flow Integrity.
This commit adds a new pass that can inject checks before indirect calls to
make sure that these calls target known locations. It supports three types of
checks and, at compile time, it can take the name of a custom function to call
when an indirect call check fails. The default failure function ignores the
error and continues.

This pass incidentally moves the function JumpInstrTables::transformType from
private to public and makes it static (with a new argument that specifies the
table type to use); this is so that the CFI code can transform function types
at call sites to determine which jump-instruction table to use for the check at
that site.

Also, this removes support for jumptables in ARM, pending further performance
analysis and discussion.

Review: http://reviews.llvm.org/D4167



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221708 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:08:02 +00:00
Colin LeMahieu
6d093fd78a [llvm-mc] Fixing case where if a file ended with non-newline whitespace or a comma it would access invalid memory.
Cleaned up parse loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221707 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 21:03:09 +00:00
Sanjay Patel
e7c966f067 Use rcpss/rcpps (X86) to speed up reciprocal calcs (PR21385).
This is a first step for generating SSE rcp instructions for reciprocal
calcs when fast-math allows it. This is very similar to the rsqrt optimization
enabled in D5658 ( http://reviews.llvm.org/rL220570 ).

For now, be conservative and only enable this for AMD btver2 where performance
improves significantly both in terms of latency and throughput.

We may never enable this codegen for Intel Core* chips because the divider circuits
are just too fast. On SandyBridge, divss can be as fast as 10 cycles versus the 21
cycle critical path for the rcp + mul + sub + mul + add estimate.

Follow-on patches may allow configuration of the number of Newton-Raphson refinement
steps, add AVX512 support, and enable the optimization for more chips.

More background here: http://llvm.org/bugs/show_bug.cgi?id=21385

Differential Revision: http://reviews.llvm.org/D6175



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 20:51:00 +00:00
Rafael Espindola
612f7d7e00 Simplify testcase. NFC.
Thanks to Filipe Cabecinhas for the tip.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221705 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 20:49:16 +00:00
Bill Schmidt
10161a0cce [PowerPC] Replace foul hackery with real calls to __tls_get_addr
My original support for the general dynamic and local dynamic TLS
models contained some fairly obtuse hacks to generate calls to
__tls_get_addr when lowering a TargetGlobalAddress.  Rather than
generating real calls, special GET_TLS_ADDR nodes were used to wrap
the calls and only reveal them at assembly time.  I attempted to
provide correct parameter and return values by chaining CopyToReg and
CopyFromReg nodes onto the GET_TLS_ADDR nodes, but this was also not
fully correct.  Problems were seen with two back-to-back stores to TLS
variables, where the call sequences ended up overlapping with unhappy
results.  Additionally, since these weren't real calls, the proper
register side effects of a call were not recorded, so clobbered values
were kept live across the calls.

The proper thing to do is to lower these into calls in the first
place.  This is relatively straightforward; see the changes to
PPCTargetLowering::LowerGlobalTLSAddress() in PPCISelLowering.cpp.
The changes here are standard call lowering, except that we need to
track the fact that these calls will require a relocation.  This is
done by adding a machine operand flag of MO_TLSLD or MO_TLSGD to the
TargetGlobalAddress operand that appears earlier in the sequence.

The calls to LowerCallTo() eventually find their way to
LowerCall_64SVR4() or LowerCall_32SVR4(), which call FinishCall(),
which calls PrepareCall().  In PrepareCall(), we detect the calls to
__tls_get_addr and immediately snag the TargetGlobalTLSAddress with
the annotated relocation information.  This becomes an extra operand
on the call following the callee, which is expected for nodes of type
tlscall.  We change the call opcode to CALL_TLS for this case.  Back
in FinishCall(), we change it again to CALL_NOP_TLS for 64-bit only,
since we require a TOC-restore nop following the call for the 64-bit
ABIs.

During selection, patterns in PPCInstrInfo.td and PPCInstr64Bit.td
convert the CALL_TLS nodes into BL_TLS nodes, and convert the
CALL_NOP_TLS nodes into BL8_NOP_TLS nodes.  This replaces the code
removed from PPCAsmPrinter.cpp, as the BL_TLS or BL8_NOP_TLS
nodes can now be emitted normally using their patterns and the
associated printTLSCall print method.

Finally, as a result of these changes, all references to get-tls-addr
in its various guises are no longer used, so they have been removed.

There are existing TLS tests to verify the changes haven't messed
anything up).  I've added one new test that verifies that the problem
with the original code has been fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221703 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 20:44:09 +00:00
Rafael Espindola
71c70733b7 Use a 8 bit immediate when possible.
This fixes pr21529.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 19:46:36 +00:00
Kevin Enderby
5cebd7cd1f Fix a warning about ‘r_type’ may be used uninitialized.
Thanks to Aaron Ballman for noticing this!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221696 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 19:16:45 +00:00
Dario Domizioli
949d328bee [X86][ELF] Fix PR20243 - leaf frame pointer bug with TLS access
The ISel lowering for global TLS access in PIC mode was creating a pseudo 
instruction that is later expanded to a call, but the code was not 
setting the hasCalls flag in the MachineFrameInfo alongside the adjustsStack 
flag. This caused some functions to be mistakenly recognized as leaf functions,
and this in turn affected the decision to eliminate the frame pointer.

With the fix, hasCalls is properly set and the leaf frame pointer is correctly
preserved.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221695 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 18:44:49 +00:00
Oliver Stannard
659b1491b8 LLVM incorrectly folds xor into select
LLVM replaces the SelectionDAG pattern (xor (set_cc cc x y) 1) with
(set_cc !cc x y), which is only correct when the xor has type i1.
Instead, we should check that the constant operand to the xor is all
ones.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221693 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 17:36:01 +00:00
Vasileios Kalintiris
328bc2f89e [mips] Add preliminary support for the MIPS II target.
Summary:
This patch enables code generation for the MIPS II target. Pre-Mips32
targets don't have the MUL instruction, so we add the correspondent
pattern that uses the MULT/MFLO combination in order to retrieve the
product.

This is WIP as we don't support code generation for select nodes due to
the lack of conditional-move instructions.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221686 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 11:43:55 +00:00
Vasileios Kalintiris
b001cb6423 [mips] Add hardware register name "hwr_ulr" ($29)
The canonical name when printing assembly is still $29. The reason is that
GAS does not accept "$hwr_ulr" at the moment.

This addresses the comments from r221307, which reverted the original
commit r221299.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221685 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 11:22:39 +00:00
Andrea Di Biagio
d6548ad013 [X86] Add missing check for 'isINSERTPSMask' in method 'isShuffleMaskLegal'.
This helps the DAGCombiner to identify more opportunities to fold shuffles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 11:20:31 +00:00
Vasileios Kalintiris
d3da72c5b3 Recommit "[mips] Add names and tests for the hardware registers"
The original commit r221299 was reverted in r221307.  I removed the name
"hrw_ulr" ($29) from the original commit because two tests were failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221681 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 10:31:31 +00:00
David Majnemer
1dd631fe02 llvm-objdump: Skip empty sections when dumping contents
Empty sections are just noise when using objdump.
This is similar to what binutils does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221680 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 09:58:25 +00:00
Manuel Klimek
dd848e93cc Was convinced in commit comments that requiring a specific python version is the wrong approach; reverting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221679 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 08:53:18 +00:00
David Majnemer
16d8031f94 MC, COFF: Use relocations for function references inside the section
Referencing one symbol from another in the same section does not
generally require a relocation.  However, the MS linker has a feature
called /INCREMENTAL which enables incremental links.  It achieves this
by creating thunks to the actual function and redirecting all
relocations to point to the thunk.

This breaks down with the old scheme if you have a function which
references, say, itself.  On x86_64, we would use %rip relative
addressing to reference the start of the function from out current
position.  This would lead to miscompiles because other references might
reference the thunk instead, breaking function pointer equality.

This fixes PR21520.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221678 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 08:43:57 +00:00
NAKAMURA Takumi
fdf59619d2 [CMake] llvm-shlib: Prune redundant components, AsmPrinter, MC, and SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221675 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 07:57:25 +00:00
Suyog Sarda
e190f77f91 Addition to r216371 (SLP and Loop Vectorization) and r218607 where
cost model for signed division by power of 2 was improved for AArch64.
The revision r218607 missed test case for Loop Vectorization.
Adding it in this revision.

Differential Revision: http://reviews.llvm.org/D6181



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221674 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 07:39:27 +00:00
Craig Topper
20d2a260c9 Use uint64_t as the type for the X86 TSFlag format enum. Allows removal of the VEXShift hack that was used to access the higher bits of TSFlags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221673 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 07:32:32 +00:00
Michael Kuperstein
f2fe3b72a9 [X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSext
This fixes an issue with matching trunc -> assertsext -> zext on x86-64, which would not zero the high 32-bits. See PR20494 for details.
Recommitting - This time, with a hopefully working test.

Differential Revision: http://reviews.llvm.org/D6128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221672 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 07:07:40 +00:00
Rafael Espindola
bc64560aed Only run the gold plugin tests if gold supports the targets we test with.
This fixes pr21345.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221669 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 05:27:12 +00:00
Jingyue Wu
7b901e3907 [NVPTX] Remove dead code in NVPTXTargetTransformInfo (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221668 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 05:24:04 +00:00
Rafael Espindola
9272305648 MCAsmParserExtension has a copy of the MCAsmParser. Use it.
Base classes were storing a second copy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221667 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 05:18:41 +00:00
Rafael Espindola
26dd2205ba Add const. NFC.
This adds const to a few methods that already return const references or
creates a const version when they reterun non-const references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221666 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 05:11:47 +00:00
Rafael Espindola
6d5452d2d6 Don't duplicate names in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221665 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 04:58:32 +00:00
Rafael Espindola
3959002c51 Don't repeat name in comment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221664 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 04:49:14 +00:00
Quentin Colombet
8201185d61 [X86] Custom lower UINT_TO_FP from v4f32 to v4i32, and for v8f32 to v8i32 if
AVX2 is available.
According to IACA, the new lowering has a throughput of 8 cycles instead of 13
with the previous one.

Althought this lowering kicks in some SPECs benchmarks, the performance
improvement was within the noise.

Correctness testing has been done for the whole range of uint32_t with the
following program:
    uint4 v = (uint4) {0,1,2,3};
    uint32_t i;
    
    //Check correctness over entire range for uint4 -> float4 conversion
    for( i = 0; i < 1U << (32-2); i++ )
    {
        float4 t = test(v);
        float4 c = correct(v);
        
        if( 0xf != _mm_movemask_ps( t == c ))
        {
            printf( "Error @ %vx: %vf vs. %vf\n", v, c, t);
            return -1;
        }
        
        v += 4;
    }
Where "correct" is the old lowering and "test" the new one.

The patch adds a test case for the two custom lowering instruction.
It also modifies the vector cost model, which is why cast.ll and uitofp.ll are
modified.
2009-02-26-MachineLICMBug.ll is also modified because we now hoist 7
instructions instead of 4 (3 more constant loads).

rdar://problem/18153096>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221657 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 02:23:47 +00:00
Nico Weber
bc741c1c42 speling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221652 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-11 01:13:42 +00:00
Chad Rosier
daeae53efc [yaml2obj] Support AArch64 relocations.
Patch by Daniel Stewart <stewartd@codeaurora.org>!
Phabricator Revision: http://reviews.llvm.org/D6192

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221639 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 23:02:03 +00:00
Rafael Espindola
dc0f7dfd86 configure.ac lives in autoconf/, not autotools/
Patch by Palmer Dabbelt!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221638 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 22:36:04 +00:00
Michael Kuperstein
dee48e7ad4 Reverting r221626 due to a too-strict test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221629 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 21:07:41 +00:00
Juergen Ributzka
1b9706b8c6 [AArch64][FastISel] Fix kill flags for integer extends.
In the case we optimize an integer extend away and replace it directly with the
source register, we also have to clear all kill flags at all its uses.
This is necessary, because the orignal IR instruction might be trivially dead,
but we replaced it with a nop at MI level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221628 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 21:05:31 +00:00
Juergen Ributzka
d0995fb982 [SwitchLowering] Fix the "fixPhis" function.
Switch statements may have more than one incoming edge into the same BB if they
all have the same value. When the switch statement is converted these incoming
edges are now coming from multiple BBs. Updating all incoming values to be from
a single BB is incorrect and would generate invalid LLVM IR.

The fix is to only update the first occurrence of an incoming value. Switch
lowering will perform subsequent calls to this helper function for each incoming
edge with a new basic block - updating all edges in the process.

This fixes rdar://problem/18916275.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221627 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 21:05:27 +00:00
Michael Kuperstein
1a66dc7468 [X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSext
This fixes an issue with matching trunc -> assertsext -> zext on x86-64, which would not zero the high 32-bits.
See PR20494 for details.

Differential Revision: http://reviews.llvm.org/D6128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221626 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 20:40:21 +00:00
Rafael Espindola
b3da08deb3 Copy externally_initialized in GlobalVariable::copyAttributesFrom.
Patch by Kevin Frei!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221620 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 18:41:59 +00:00
Jingyue Wu
26e0544c0a [NVPTX] Add an NVPTX-specific TargetTransformInfo
Summary:
It currently only implements hasBranchDivergence, and will be extended
in later diffs.

Split from D6188.

Test Plan: make check-all

Reviewers: jholewinski

Reviewed By: jholewinski

Subscribers: llvm-commits, meheff, eliben, jholewinski

Differential Revision: http://reviews.llvm.org/D6195

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221619 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-10 18:38:25 +00:00