Commit Graph

1366 Commits

Author SHA1 Message Date
Yaron Keren
7bc835b7bf Cleaning up two more pre-Visual C++ 2012 build hacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203093 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 08:05:43 +00:00
Venkatraman Govindaraju
c594f39acb [Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202670 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 23:39:07 +00:00
Venkatraman Govindaraju
75bff895e4 [Sparc] Add return/rett instruction to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202666 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 22:55:53 +00:00
Venkatraman Govindaraju
c4b0eecd83 [Sparc] Add support for decoding jmpl/retl/ret instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202663 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 21:17:44 +00:00
Venkatraman Govindaraju
833687be0e [Sparc] Add fcmpe* instructions to Sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202661 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 19:56:19 +00:00
Venkatraman Govindaraju
cf06410678 [Sparc] Add VIS instructions to sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202660 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 19:31:21 +00:00
Benjamin Kramer
d628f19f5d [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
Remove the old functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202636 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 12:27:27 +00:00
Venkatraman Govindaraju
2871375882 [SparcV9] Adds support for branch on integer register instructions (BPr) and conditional moves on integer register (MOVr/FMOVr).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202628 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 09:46:56 +00:00
Craig Topper
629b96cb4f Switch all uses of LLVM_OVERRIDE to just use 'override' directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202621 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 09:09:27 +00:00
Venkatraman Govindaraju
a21b315a06 [Sparc] Add support for parsing branches and conditional move instructions with %fcc1-%fcc3 conditional registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202616 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 06:28:15 +00:00
Venkatraman Govindaraju
18fe44cb05 [Sparc] Make floating point branch instruction formats to accept %fcc0-%fcc1 conditional registers as input.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202614 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 04:43:45 +00:00
Venkatraman Govindaraju
afad335cae [Sparc] Add support for parsing fcmp with %fcc registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202610 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 03:39:39 +00:00
Venkatraman Govindaraju
243491693b [Sparc] Add register class for floating point conditional flags (%fcc0 - %fcc3).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-02 02:12:33 +00:00
Venkatraman Govindaraju
628886b1d2 [SparcV9] Add support for parsing branch instructions with prediction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202602 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 22:03:07 +00:00
Venkatraman Govindaraju
e4c88dd909 [Sparc] Add support for parsing annulled branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202599 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 20:08:48 +00:00
Venkatraman Govindaraju
d4dafd17e1 [Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202598 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 18:54:52 +00:00
Venkatraman Govindaraju
e1f5cd3002 [Sparc] Add missing ALU instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202597 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 17:51:00 +00:00
Venkatraman Govindaraju
9314308db1 [Sparc] Add support to decode unimp instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202581 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 09:28:18 +00:00
Venkatraman Govindaraju
61f5c0a065 [Sparc] Add support to decode negative simm13 operands in the sparc disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202578 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 09:11:57 +00:00
Venkatraman Govindaraju
830156c660 [Sparc] Add support for decoding call instructions in the sparc disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202577 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 08:30:58 +00:00
Venkatraman Govindaraju
06f2e69c2f [Sparc] Add support to disassemble sparc memory instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202575 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 07:46:33 +00:00
Venkatraman Govindaraju
5ddaa6dcf4 [Sparc] Implement writeNopData. Emit actual NOP instruction instead of just filling with zeroes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202572 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 05:45:09 +00:00
Venkatraman Govindaraju
e0c7e3d139 [Sparc] Teach SparcAsmParser to emit correct relocations for PIC code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202571 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 05:07:21 +00:00
Venkatraman Govindaraju
f06322b3ef [Sparc] 80 column rule. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202565 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 02:28:34 +00:00
Venkatraman Govindaraju
17e9537004 [Sparc] Add support for parsing directives in SparcAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202564 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 02:18:04 +00:00
Venkatraman Govindaraju
c9bf74fdc5 [Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202563 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 01:04:26 +00:00
Roman Divacky
14551f041b Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding
expensive libcall. Also, Qp_neg is not implemented on at least
FreeBSD. This is also what gcc is doing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202422 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-27 19:26:29 +00:00
Roman Divacky
68e1531d39 Add a dwarf number to the Y register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202057 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-24 18:41:31 +00:00
Benjamin Kramer
570d544799 SPARC: Implement TRAP lowering. Matches what GCC emits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201994 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-23 21:43:52 +00:00
Roman Divacky
3bd3f426a5 Expand 64bit {SHL,SHR,SRA}_PARTS on sparcv9.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201718 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 21:35:39 +00:00
Rafael Espindola
b4aaffffd3 move getNameWithPrefix and getSymbol to TargetMachine.
TargetLoweringBase is implemented in CodeGen, so before this patch we had
a dependency fom Target to CodeGen. This would show up as a link failure of
llvm-stress when building with -DBUILD_SHARED_LIBS=ON.

This fixes pr18900.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201711 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 20:30:41 +00:00
Rafael Espindola
737c9f6005 Add back r201608, r201622, r201624 and r201625
r201608 made llvm corretly handle private globals with MachO. r201622 fixed
a bug in it and r201624 and r201625 were changes for using private linkage,
assuming that llvm would do the right thing.

They all got reverted because r201608 introduced a crash in LTO. This patch
includes a fix for that. The issue was that TargetLoweringObjectFile now has
to be initialized before we can mangle names of private globals. This is
trivially true during the normal codegen pipeline (the asm printer does it),
but LTO has to do it manually.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201700 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 17:23:20 +00:00
Daniel Jasper
9a92586114 Revert r201622 and r201608.
This causes the LLVMgold plugin to segfault. More information on the
replies to r201608.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201669 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 12:26:01 +00:00
Rafael Espindola
6880f0e19f Fix PR18743.
The IR
@foo = private constant i32 42

is valid, but before this patch we would produce an invalid MachO from it. It
was invalid because it would use an L label in a section where the liker needs
the labels in order to atomize it.

One way of fixing it would be to just reject this IR in the backend, but that
would not be very front end friendly.

What this patch does is use an 'l' prefix in sections that we know the linker
requires symbols for atomizing them. This allows frontends to just use
private and not worry about which sections they go to or how the linker handles
them.

One small issue with this strategy is that now a symbol name depends on the
section, which is not available before codegen. This is not a problem in
practice. The reason is that it only happens with private linkage, which will
be ignored by the non codegen users (llvm-nm and llvm-ar).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201608 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-18 22:24:57 +00:00
Daniel Sanders
38c6b58eec Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for
targets with mature MC support. Such targets will always parse the inline
assembly (even when emitting assembly). Targets without mature MC support
continue to use EmitRawText() for assembly output.

The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced
with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler
to parse inline assembly (even when emitting assembly output). UseIntegratedAs
is set to true for targets that consider any failure to parse valid assembly
to be a bug. Target specific subclasses generally enable the integrated
assembler in their constructor. The default value can be overridden with
-no-integrated-as.

All tests that rely on inline assembly supporting invalid assembly (for example,
those that use mnemonics such as 'foo' or 'hello world') have been updated to
disable the integrated assembler.

Changes since review (and last commit attempt):
- Fixed test failures that were missed due to configuration of local build.
  (fixes crash.ll and a couple others).
- Fixed tests that happened to pass because the local build was on X86
  (should fix 2007-12-17-InvokeAsm.ll)
- mature-mc-support.ll's should no longer require all targets to be compiled.
  (should fix ARM and PPC buildbots)
- Object output (-filetype=obj and similar) now forces the integrated assembler
  to be enabled regardless of default setting or -no-integrated-as.
  (should fix SystemZ buildbots)

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2686



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201333 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-13 14:44:26 +00:00
Daniel Sanders
7580df334e Revert r201237+r201238: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
It introduced multiple test failures in the buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201241 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 15:39:20 +00:00
Daniel Sanders
57edb9588b Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output.

The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as.

All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler.

Reviewers: rafael

Reviewed By: rafael

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2686

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201237 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-12 14:44:54 +00:00
Rafael Espindola
965e3bc5ff Use a consistent argument order in TargetLoweringObjectFile.
These methods normally call each other and it is really annoying if the
arguments are in different order. The more common rule was that the arguments
specific to call are first (GV, Encoding, Suffix) and the auxiliary objects
(Mang, TM) come after. This patch changes the exceptions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201044 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-09 14:50:44 +00:00
Rafael Espindola
e09411dd68 Pass the Mangler by reference.
It is never null and it is not used in casts, so there is no reason to use a
pointer. This matches how we pass TM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201025 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-08 14:53:28 +00:00
Rafael Espindola
3f2e9e5e79 Add LLVM_OVERRIDE to a few declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201022 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-08 06:07:27 +00:00
Venkatraman Govindaraju
1826a52645 [Sparc] Add support for parsing synthetic instruction 'mov'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200965 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 09:06:52 +00:00
Venkatraman Govindaraju
464d664971 [Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200963 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 07:34:49 +00:00
Venkatraman Govindaraju
fabdd6632a [Sparc] Emit relocations for Thread Local Storage (TLS) when integrated assembler is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200962 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 05:54:20 +00:00
Venkatraman Govindaraju
44ad4d00b4 [Sparc] Emit correct relocations for PIC code when integrated assembler is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200961 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 04:24:35 +00:00
Venkatraman Govindaraju
f2f6d44f43 [Sparc] Use SparcMCExpr::VariantKind itself as MachineOperand's target flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200960 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 02:36:06 +00:00
Rafael Espindola
b725815069 Just returning false is the default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-06 00:03:15 +00:00
Rafael Espindola
f39297678b Remove support for not using .loc directives.
Clang itself was not using this. The only way to access it was via llc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200862 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 18:00:21 +00:00
Venkatraman Govindaraju
eb97c0499b [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200617 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-01 18:54:16 +00:00
Venkatraman Govindaraju
9026e07000 [Sparc] Save and restore float registers that may be used for parameter passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200509 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 01:53:08 +00:00
Jakob Stoklund Olesen
17ca0f8f80 Implement SPARCv9 atomic_swap_64 with a pseudo.
The SWAP instruction only exists in a 32-bit variant, but the 64-bit
atomic swap can be implemented in terms of CASX, like the other atomic
rmw primitives.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200453 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-30 04:48:46 +00:00