Commit Graph

93820 Commits

Author SHA1 Message Date
Bill Schmidt
7c2d8f7b5e [PowerPC] Better fix for PR16556.
A more complete example of the bug in PR16556 was recently provided,
showing that the previous fix was not sufficient.  The previous fix is
reverted herein.

The real problem is that ReplaceNodeResults() uses LowerFP_TO_INT as
custom lowering for FP_TO_SINT during type legalization, without
checking whether the input type is handled by that routine.
LowerFP_TO_INT requires the input to be f32 or f64, so we fail when
the input is ppcf128.

I'm leaving the test case from the initial fix (r185821) in place, and
adding the new test as another crash-only check.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185959 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 18:50:20 +00:00
Stephen Lin
36f6df78ad Attempt to appease buildbot after r185956 by explicitly turning setting -fma,-fma4 attrs (I'm assuming they're set because the bot is running on machine that has one or the other.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185958 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 18:41:43 +00:00
Stephen Lin
e54885af9b AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all
in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in
order to resolve the following issues with fmuladd (i.e. optional FMA)
intrinsics:

1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd
intrinsics even if the subtarget does not support FMA instructions, leading
to laughably bad code generation in some situations.

2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128,
resulting in a call to a software fp128 FMA implementation.

3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types
like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize,
etc. to types that support hardware FMAs.

The function has also been slightly renamed for consistency and to force a
merge/build conflict for any out-of-tree target implementing it. To resolve,
see comments and fixed in-tree examples.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 18:16:56 +00:00
Hal Finkel
033e0a94cb Don't crash in SE dealing with ashr x, -1
ScalarEvolution::getSignedRange uses ComputeNumSignBits from ValueTracking on
ashr instructions. ComputeNumSignBits can return zero, but this case was not
handled correctly by the code in getSignedRange which was calling:
  APInt::getSignedMinValue(BitWidth).ashr(NS - 1)
with NS = 0, resulting in an assertion failure in APInt::ashr.

Now, we just return the conservative result (as with NS == 1).

Another bug found by llvm-stress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 18:16:16 +00:00
David Majnemer
ab6ceab8a6 ValueTracking: Fix bugs in isKnownToBeAPowerOfTwo
(add nsw x, (and x, y)) isn't a power of two if x is zero, it's zero
(add nsw x, (xor x, y)) isn't a power of two if y has bits set that aren't set in x


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 18:11:10 +00:00
Nadav Rotem
29b7419428 Set the default insert point to the first instruction, and not to end()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185953 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 17:55:36 +00:00
Nadav Rotem
bcd5a0f7ef IRBuilder: add an assertion that checks if we try to get a debug loc from ->end();
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 17:54:22 +00:00
Hal Finkel
bd6f1f6896 DAGCombine tryFoldToZero cannot create illegal types after type legalization
When folding sub x, x (and other similar constructs), where x is a vector, the
result is a vector of zeros. After type legalization, make sure that the input
zero elements have a legal type. This type may be larger than the result's
vector element type.

This was another bug found by llvm-stress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185949 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 17:02:45 +00:00
Ulrich Weigand
7a34599db0 [PowerPC] Revert r185476 and fix up TLS variant kinds
In the commit message to r185476 I wrote:

>The PowerPC-specific modifiers VK_PPC_TLSGD and VK_PPC_TLSLD
>correspond exactly to the generic modifiers VK_TLSGD and VK_TLSLD.
>This causes some confusion with the asm parser, since VK_PPC_TLSGD
>is output as @tlsgd, which is then read back in as VK_TLSGD.
>
>To avoid this confusion, this patch removes the PowerPC-specific
>modifiers and uses the generic modifiers throughout.  (The only
>drawback is that the generic modifiers are printed in upper case
>while the usual convention on PowerPC is to use lower-case modifiers.
>But this is just a cosmetic issue.)

This was unfortunately incorrect, there is is fact another,
serious drawback to using the default VK_TLSLD/VK_TLSGD
variant kinds: using these causes ELFObjectWriter::RelocNeedsGOT
to return true, which in turn causes the ELFObjectWriter to emit
an undefined reference to _GLOBAL_OFFSET_TABLE_.

This is a problem on powerpc64, because it uses the TOC instead
of the GOT, and the linker does not provide _GLOBAL_OFFSET_TABLE_,
so the symbol remains undefined.  This means shared libraries
using TLS built with the integrated assembler are currently
broken.

While the whole RelocNeedsGOT / _GLOBAL_OFFSET_TABLE_ situation
probably ought to be properly fixed at some point, for now I'm
simply reverting the r185476 commit.  Now this in turn exposes
the breakage of handling @tlsgd/@tlsld in the asm parser that
this check-in was originally intended to fix.

To avoid this regression, I'm also adding a different fix for
this problem: while common code now parses @tlsgd as VK_TLSGD,
a special hack in the asm parser translates this code to the
platform-specific VK_PPC_TLSGD that the back-end now expects.
While this is not really pretty, it's self-contained and
shouldn't hurt anything else for now.  One the underlying
problem is fixed, this hack can be reverted again.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185945 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 16:41:09 +00:00
Vincent Lejeune
f2cfef8172 R600: Do not predicated basic block with multiple alu clause
Test is not included as it is several 1000 lines long.
To test this functionnality, a test case must generate at least 2 ALU clauses,
where an ALU clause is ~110 instructions long.

NOTE: This is a candidate for the stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185943 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 15:03:33 +00:00
Vincent Lejeune
f4bdec2ebe R600: Fix a rare bug where swizzle optimization returns wrong values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185942 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 15:03:25 +00:00
Vincent Lejeune
07bb3f1d0a R600: Fix wrong export reswizzling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185941 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 15:03:19 +00:00
Vincent Lejeune
c6f13db656 R600: Use DAG lowering pass to handle fcos/fsin
NOTE: This is a candidate for the stable branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 15:03:11 +00:00
Vincent Lejeune
f79b9b8593 R600: Print Export Swizzle
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 15:03:03 +00:00
Rafael Espindola
9941bdd1fe Add missing getters. They will be used in llvm-ar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185937 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 12:49:24 +00:00
Rafael Espindola
2012593f18 Archive members cannot be larger than 4GB. Return a uint32_t.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185936 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 12:45:11 +00:00
Rafael Espindola
92f7386cae We never compare iterators from two archives. Assert that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 12:30:10 +00:00
Rafael Espindola
c5f8757c72 Add getHeader helper and move ToHeader to the cpp file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 12:22:05 +00:00
Joey Gouly
12f45c3782 Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 11:26:18 +00:00
Joey Gouly
8dc741d29f Add MC assembly/disassembly support for VRINT{Z, X, R} to V8FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 11:03:21 +00:00
Alexey Samsonov
f27b46b26f Document LLVM_USE_SANITIZER CMake option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 10:56:13 +00:00
Ulrich Weigand
b2713e018e [PowerPC] Support ".machine any"
The PowerPC assembler is supposed to provide a directive .machine
that allows switching the supported CPU instruction set on the fly.
Since we do not yet check CPU feature sets at all and always accept
any available instruction, this is not really useful at this point.

However, it makes sense to accept (and ignore) ".machine any" to
avoid spuriously rejecting existing assembler files that use this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 10:00:34 +00:00
Alexander Potapenko
9467b3e0ac Revert r185872 - "Stop emitting weak symbols into the "coal" sections"
This patch broke `make check-asan` on Mac, causing ld warnings like the following one:

ld: warning: direct access in __GLOBAL__I_a to global weak symbol
___asan_mapping_scale means the weak symbol cannot be overridden at
runtime. This was likely caused by different translation units being
compiled with different visibility settings.

The resulting test binaries crashed with incorrect ASan warnings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 10:00:16 +00:00
Joey Gouly
9fb5a6588b Add MC assembly/disassembly support for VCVT{A, N, P, M} to V8FP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185922 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:59:04 +00:00
Richard Sandiford
2e015ef9bb [SystemZ] Use MVC for simple load/store pairs
Look for patterns of the form (store (load ...), ...) in which the two
locations are known not to partially overlap.  (Identical locations are OK.)
These sequences are better implemented by MVC unless either the load or
the store could use RELATIVE LONG instructions.

The testcase showed that we weren't using LHRL and LGHRL for extload16,
only sextloadi16.  The patch fixes that too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:46:39 +00:00
Richard Sandiford
f6ea5e0d80 [SystemZ] Use "STC;MVC" for memset
Use "STC;MVC" for memsets that are too big for two STCs or MV...Is yet
small enough for a single MVC.  As with memcpy, I'm leaving longer cases
till later.

The number of tests might seem excessive, but f33 & f34 from memset-04.ll
failed the first cut because I'd not added the "?:" on the calculation
of Size1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185918 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:32:42 +00:00
David Majnemer
fcb7b97892 InstCombine: Fix typo in comment for visitICmpInstWithInstAndIntCst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185916 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:24:35 +00:00
David Majnemer
fecf0d7a01 InstCombine: variations on 0xffffffff - x >= 4
The following transforms are valid if -C is a power of 2:
(icmp ugt (xor X, C), ~C) -> (icmp ult X, C)
(icmp ult (xor X, C), -C) -> (icmp uge X, C)

These are nice, they get rid of the xor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 09:20:58 +00:00
David Majnemer
36b6f7409d InstCombine: X & -C != -C -> X <= u ~C
Tests were added in r185910 somehow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 08:09:32 +00:00
Ulrich Weigand
ff16df71f5 [PowerPC] Support .llong and fix .word
This adds support for the .llong PowerPC-specifc assembler directive.
In doing so, I notices that .word is currently incorrect: it is
supposed to define a 2-byte data element, not a 4-byte one.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 07:59:25 +00:00
David Majnemer
11c29bafd5 Commit r185909 was a misapplied patch, fix it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 07:58:32 +00:00
David Majnemer
377a5c1a87 InstCombine: add more transforms
C1-X <u C2 -> (X|(C2-1)) == C1
C1-X >u C2 -> (X|C2) == C1
X-C1 <u C2 -> (X & -C2) == C1
X-C1 >u C2 -> (X & ~C2) == C1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185909 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 07:50:59 +00:00
Hal Finkel
fa55969acb PPC: Allocate RS spill slot for unaligned i64 load/store
This fixes another bug found by llvm-stress!

If we happen to be doing an i64 load or store into a stack slot that has less
than a 4-byte alignment, then the frame-index elimination may need to use an
indexed load or store instruction (because the offset may not be a multiple of
4, a requirement of the STD/LD instructions). The extra register needed to hold
the offset comes from the register scavenger, and it is possible that the
scavenger will need to use an emergency spill slot. As a result, we need to
make sure that a spill slot is allocated when doing an i64 load/store into a
less-than-4-byte-aligned stack slot.

Because test cases for things like this tend to be fairly fragile, I've
concatenated a few small bugpoint-reduced test cases together to form the
regression test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 06:34:51 +00:00
Rafael Espindola
be6b9101d4 Compute the size of an archive member in the constructor.
It is always computed the same way (by parsing the header). Doing it in the
constructor simplifies the callers a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 05:26:25 +00:00
Rafael Espindola
3d84b07f95 Remove declare but not implemented methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185904 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 05:09:08 +00:00
Rafael Espindola
5263d0aa6a Move some code out of line. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185901 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 03:39:35 +00:00
Jim Grosbach
842b1bdd94 X86: Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185900 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 02:07:28 +00:00
Jim Grosbach
cc64dc66e7 X86 fast-isel: Avoid explicit AH subreg reference for [SU]Rem.
Explicit references to %AH for an i8 remainder instruction can lead to
references to %AH in a REX prefixed instruction, which causes things to
blow up. Do the same thing in FastISel as we do for DAG isel and instead
shift %AX right by 8 bits and then extract the 8-bit subreg from that
result.

rdar://14203849
http://llvm.org/bugs/show_bug.cgi?id=16105

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185899 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 02:07:25 +00:00
Sean Silva
845e196a52 Make BinaryRef output correctly in case of empty data.
Previously, it would simply output nothing, but it should output an
empty string `""`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 00:54:46 +00:00
Stephen Lin
b494015330 Style fixes: remove unnecessary braces for one-statement if blocks, no else after return, etc. No funcionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185893 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 00:44:49 +00:00
Eric Christopher
7bb386a299 Revert "DebugInfo: remove unused helper function getDICompositeType."
This reverts commit r185876 as the functions appear to still be used
by dragonegg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185890 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-09 00:16:56 +00:00
Eli Bendersky
201cdb1004 Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 23:57:07 +00:00
Nadav Rotem
f564efa591 This patch changes the saved IRBuilder insert point from BasicBlock::iterator to AssertingVH.
Commit 185883 fixes a bug in the IRBuilder that should fix the ASan bot. AssertingVH can help in exposing some RAUW problems.

Thanks Ben and Alexey!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 23:31:13 +00:00
Michael Gottesman
a75b293e4f [objc-arc] Fix assertion in EraseInstruction so that noop on null calls when passed null do not trigger the assert.
The specific case of interest is when objc_retainBlock is passed null.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 23:30:23 +00:00
Nadav Rotem
7b934079c0 Fix a bug in IRBuilder::ClearInsertionPoint. The IR Builder needs to reset both the BB and the insert point inside the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185883 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 23:27:43 +00:00
Bill Wendling
c6fbaa9701 Don't run internalize if we're outputing bit-code and not an object file.
The problem with running internalize before we're ready to output an object file
is that it may change a 'weak' symbol into an internal one, but that symbol
could be needed by an external object file --- e.g. with arclite.

<rdar://problem/14334895>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185882 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 23:23:03 +00:00
Manman Ren
6cf7246eca DebugInfo: remove unused helper function getDICompositeType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185876 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 21:55:46 +00:00
Eric Christopher
01e4509972 CEHCK->CHECK typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185875 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 21:47:33 +00:00
Eric Christopher
193a2da6d1 Fix up whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185874 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 21:47:31 +00:00
Bill Wendling
8722e25715 Stop emitting weak symbols into the "coal" sections.
The Mach-O linker has been able to support the weak-def bit on any symbol for
quite a while now. The compiler however continued to place these symbols into a
"coal" section, which required the linker to map them back to the base section
name.

Replace the sections like this:

  __TEXT/__textcoal_nt   instead use  __TEXT/__text
  __TEXT/__const_coal    instead use  __TEXT/__const
  __DATA/__datacoal_nt   instead use  __DATA/__data

<rdar://problem/14265330>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185872 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-08 21:34:52 +00:00