Commit Graph

74409 Commits

Author SHA1 Message Date
Bill Wendling
726f1b90a9 Use the correct for for the version. It's little endian and my brain is
obviously big endian. :-)
PR10502


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:31:41 +00:00
Jim Grosbach
189610f946 ARM diagnostics for ldrexd/stredx out of order paired register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:25:39 +00:00
Bruno Cardoso Lopes
cf128eab90 Remove now unused patterns. 0 insertions(+), 98 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:39 +00:00
Bruno Cardoso Lopes
5e3267dac9 Cleanup old matching for PUNPCK* variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:27 +00:00
Devang Patel
a671a3092a While extracting lexical scopes from machine instruction stream, work on one machine basic block at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:09:53 +00:00
Jim Grosbach
36711e4a3c ARM parsing and encoding tests for load/store exclusive instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:07:21 +00:00
Jim Grosbach
dfdf02dbad ARM fix for LDREX source register encoding.
rdar://9842203


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:44:46 +00:00
Andrew Trick
5116ff671f SCEV: Added a data structure for storing not-taken info per loop
exit. Added an interfaces for querying either the loop's exact/max
backedge taken count or a specific loop exit's not-taken count.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:19:55 +00:00
Duncan Sands
b08904093a Strip trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:19:30 +00:00
Jim Grosbach
4f6f13db1a ARM assembly parsing and encoding for SWP[B] instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:15:11 +00:00
Jim Grosbach
1ef91417bd ARM SWP instructions store, too, not just load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:11:05 +00:00
Jim Grosbach
1355cf1f76 Clean up the ARM asm parser a bit.
No intendeded functional change. Just cleaning up a bit to make things more
self-consistent in layout and style.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:10:22 +00:00
Jim Grosbach
3d5ab367b6 ARM fix asm parsing range check for [0,31] immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136091 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 16:44:05 +00:00
Jim Grosbach
ed8384806e ARM parsing and encoding for SVC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 16:24:27 +00:00
Jim Grosbach
873db3eeba ARM assembly parsing and encoding tests for SUB instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136089 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:44:05 +00:00
Jim Grosbach
a46c658c66 Update ARM STM tests. Fix check: prefix for diagnostic tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:41:22 +00:00
Duncan Sands
652b48bf23 Teach the Triple class about kfreebsd (FreeBSD kernel with
a GNU userspace).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136085 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:30:04 +00:00
Rafael Espindola
3d72290ecb Add LLVMAddAlwaysInlinerPass to the C API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:23:23 +00:00
Rafael Espindola
a03084d86e LLVM 3.0 is here, remove old do nothing method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:17:32 +00:00
Duncan Sands
7becbc41ab SrcDef is only written and never read. Remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:05:06 +00:00
Duncan Sands
f56138d4ae Add helper function for getting true/false constants in a uniform
way for i1 and vector of i1 types.  Use these to make some code
more self-documenting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:03:53 +00:00
Bill Wendling
b3aa4715c1 Clean up the HTML here a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 10:41:15 +00:00
Jay Foad
8aa695dc6f Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 09:36:52 +00:00
Nick Lewycky
5e0ac58bef Don't try to dereference syms[0] on an empty vector. Reported by Todd Jackson
and Jeffrey Bosboom!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 08:40:36 +00:00
Bill Wendling
de77055a68 The compact unwinding offsets are divided by 8 on 64-bit machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 08:03:49 +00:00
Bill Wendling
75471d698f Describe the reasoning for compact unwind in better terms. Thanks to Nick Kledzik for the description.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 07:58:09 +00:00
Bruno Cardoso Lopes
5d348b4dc4 Add 256-bit isel for movsldup/movshdup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:32 +00:00
Bruno Cardoso Lopes
9123c6fea0 More movsldup/movshdup cleanup. Rewrite the mask matching function and add
support for 256-bit versions (but no instruction selection yet, coming next).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:28 +00:00
Bruno Cardoso Lopes
5f6c440e53 More cleanup, subtarget info isn't used here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:25 +00:00
Bruno Cardoso Lopes
cc1c3526a7 Add 128-bit AVX versions of movshdup/mosldup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:23 +00:00
Bruno Cardoso Lopes
3e9235c720 Cleanup movsldup/movshdup matching.
27 insertions(+), 62 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:13 +00:00
Jakob Stoklund Olesen
165e231c42 Revert to RA_Assign when a virtreg separates into components.
When dead code elimination deletes a PHI value, the virtual register may
split into multiple connected components. In that case, revert each
component to the RS_Assign stage.

The new components are guaranteed to be smaller (the original value
numbers are distributed among the components), so this will always be
making progress. The components are now allowed to evict other live
ranges or be split again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:54:56 +00:00
Evan Cheng
28c85a81a1 Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to createMCObjectStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:42:34 +00:00
Chandler Carruth
0682597817 Remove a file from CMakeLists.txt that Evan removed in r136027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:30:33 +00:00
Evan Cheng
94b9550a32 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:24:13 +00:00
Chandler Carruth
fcf5a8341f Still more library dependency updates. This reflects the ever decreasing
dependence on CodeGen layers and backends from the MC layers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:09:11 +00:00
Chandler Carruth
b35552d440 Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:09:08 +00:00
Jim Grosbach
185f92e7d0 ARM assembly parsing and encoding for SSAX, SSUB16 and SSUB8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:32:14 +00:00
Evan Cheng
c9a7c8dd1e TargetAsmBackend has been renamed to MCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136012 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:28:36 +00:00
Evan Cheng
78c10eeaa5 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:24:55 +00:00
Eli Friedman
47f3513dd5 Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier.
This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:16:38 +00:00
Nick Lewycky
5a1cb644c9 Finish adding support for lifetime intrinsics to SROA. Fixes PR10121!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:14:22 +00:00
Benjamin Kramer
dbc46d7dd8 I will save before I commit.
I will save before I commit.
I will save before I commit.
I will save before I commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:10:23 +00:00
Jim Grosbach
f49433523e ARM assembly parsing and encoding for SSAT16 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:09:14 +00:00
Bruno Cardoso Lopes
863bd9d5cf Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128
This also fixes PR10452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:32 +00:00
Bruno Cardoso Lopes
51e92e8e41 Add remaining 256-bit vector bitcasts. This also fixes PR10451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:28 +00:00
Bruno Cardoso Lopes
6a32adc4e5 - Handle special scalar_to_vector case: splats. Using a native 128-bit
shuffle before inserting on a 256-bit vector.
- Add AVX versions of movd/movq instructions
- Introduce a few COPY patterns to match insert_subvector instructions.
This turns a trivial insert_subvector instruction into a register copy,
coalescing the xmm into a ymm and avoid emiting on more instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136002 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:25 +00:00
Bruno Cardoso Lopes
233fa39245 Reintroduce r135730, this is indeed the right approach, there is no
native 256-bit vector instruction to do scalar_to_vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:16 +00:00
Benjamin Kramer
853b0fd623 llvm-objdump: Ignore unreachable blocks when printing the CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:04:36 +00:00
Evan Cheng
f0080016c6 Fix include guards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 22:52:04 +00:00