6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-04 09:30:13 +00:00
Code Issues Projects Releases Wiki Activity
60,839 Commits 39 Branches 0 Tags 277 MiB
7ebc4d63db
Commit Graph

3135 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
7ebc4d63db Add MachineInstr::readsVirtualRegister() in preparation for proper handling of 
partial redefines.

We are going to treat a partial redefine of a virtual register as a
read-modify-write:

  %reg1024:6 = OP

Unless the register is fully clobbered:

  %reg1024:6 = OP, %reg1024<imp-def>

MachineInstr::readsVirtualRegister() knows the difference. The first case is a
read, the second isn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104149 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 20:36:22 +00:00
mike-m
eb75870206 Fix enum to address array bounds regression. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104058 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 21:22:12 +00:00
Eric Christopher
c6177a4531 More data/parsing support for tls directives. Add a few more testcases 
and cleanup comments as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103985 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 22:53:55 +00:00
Eric Christopher
423c9e3e58 Add some section and constant support for darwin TLS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103974 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 21:02:07 +00:00
Zhongxing Xu
bae5210321 Remove unused member variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103936 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-17 09:47:55 +00:00
Jakob Stoklund Olesen
c66c78c684 Add reg_nodbg_iterator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103856 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-15 02:52:58 +00:00
Bill Wendling
b92187a410 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what 
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103802 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 21:14:32 +00:00
Evan Cheng
dbf67fefea Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 23:55:47 +00:00
Dan Gohman
e6cd757e68 Teach MachineLICM and MachineSink how to clear kill flags conservatively 
when they move instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103737 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 20:34:42 +00:00
Dan Gohman
49b4589978 Add a utility function for conservatively clearing kill flags, and make 
use of it in MachineCSE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 19:24:00 +00:00
Dan Gohman
a6cb641f48 Add initial kill flag support to FastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-11 23:54:07 +00:00
Jakob Stoklund Olesen
82b07dc499 Simplify the tracking of used physregs to a bulk bitor followed by a transitive 
closure after allocating all blocks.

Add a few more test cases for -regalloc=fast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103500 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-11 20:30:28 +00:00
Dan Gohman
ff7a562751 Implement a bunch more TargetSelectionDAGInfo infrastructure. 
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103481 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-11 17:31:57 +00:00
Chris Lattner
7505faf225 remove a dead file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103383 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-09 17:34:13 +00:00
Dale Johannesen
0a406ae0d9 Fix PR 7087, and probably other things, by extending 
getConstantFP to accept the two supported long double
target types.  This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103299 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-07 21:35:53 +00:00
Chris Lattner
eb40a0fd98 switch MCSectionCOFF from a syntactic to semantic representation, 
patch by Peter Housel!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103267 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-07 17:17:41 +00:00
Dan Gohman
a7a0ed7901 Add an "IsBottomUp" member function to FastISel, which will be used to 
support a new bottom-up mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103138 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 23:58:35 +00:00
Evan Cheng
3d720fbc6a Move REG_SEQUENCE removal to 2addr pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103109 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 18:45:40 +00:00
Evan Cheng
3749943648 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g. 
80      %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120     %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103102 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-05 18:27:40 +00:00
Bob Wilson
4aad88d1fd Combine the implementations of the core part of the SSAUpdater and 
MachineSSAUpdater to avoid duplicating all the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103060 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-04 23:18:19 +00:00
Dan Gohman
1fdc614bee Factor out FastISel's code for materializing constants and other values 
in registers into a separate function to de-couple it from the
top-down-specific logic in getRegForValue.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102975 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-03 23:36:34 +00:00
Dan Gohman
af1d8ca44a Get rid of the EdgeMapping map. Instead, just check for BasicBlock 
changes before doing phi lowering for switches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-01 00:01:06 +00:00
Dan Gohman
5768ea9ca1 Elaborate on a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102637 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 16:57:54 +00:00
Evan Cheng
2ad0fcf794 Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 23:08:54 +00:00
Chris Lattner
e87f7bb50e Rework global alignment computation again. Now we do round up 
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 19:58:07 +00:00
Devang Patel
28ff35d030 Emit debug info for byval parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102486 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:39:28 +00:00
Chris Lattner
a7b611c10d further simplify EmitAlignment by eliminating the 
ForcedAlignBits argument, tweaking the single client of it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102484 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:08:40 +00:00
Chris Lattner
755824756c remove a dead argument to EmitAlignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102483 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:06:02 +00:00
Dale Johannesen
fdb42fa5fe Add DBG_VALUE handling for byval parameters; this 
produces a comment on targets that support it, but
the Dwarf writer is not hooked up yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102372 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-26 20:06:49 +00:00
Bob Wilson
211678a0d7 Update MachineSSAUpdater with the same changes I made for the IR-level 
SSAUpdater.  I'm going to try to refactor this to share most of the code
between them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102353 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-26 17:40:49 +00:00
Dan Gohman
e8c92dd439 Move FastISel's HandlePHINodesInSuccessorBlocks call down into FastISel 
itself too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102176 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-23 15:29:50 +00:00
Dan Gohman
f81eca0ab9 Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel 
and into SelectionDAGBuilder and FastISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102123 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-22 20:46:50 +00:00
Jakob Stoklund Olesen
00207237dd Add fast register allocator, enabled with -regalloc=fast. 
So far this is just a clone of -regalloc=local that has been lobotomized to run
25% faster. It drops the least-recently-used calculations, and is just plain
stupid when it runs out of registers.

The plan is to make this go even faster for -O0 by taking advantage of the short
live intervals in unoptimized code. It should not be necessary to calculate
liveness when most virtual registers are killed 2-3 instructions after they are
born.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-21 18:02:42 +00:00
Dan Gohman
f0757b0edc Add more const qualifiers on TargetMachine and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-21 01:34:56 +00:00
Dan Gohman
5eb6d65a27 Move several SelectionDAG-independent utility functions out of the 
SelectionDAG directory and into a new Analysis.cpp file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101975 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-21 01:22:34 +00:00
Evan Cheng
30fdb5c2ac - Clean up some crappy code which deals with coalescing of copies which look at 
extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101971 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-21 00:44:22 +00:00
Dan Gohman
8ba3aa7f9c Sink DebugLoc handling out of SelectionDAGISel into FastISel and 
SelectionDAGBuilder, where it doesn't have to be as complicated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101848 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-20 00:48:35 +00:00
Dan Gohman
084751cd16 Remove MachineFunction's DefaultDebugLoc member, and make DwarfDebug.cpp 
responsible for figuring out what that's supposed to be on its own.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101844 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-20 00:37:27 +00:00
Dan Gohman
a9a3321938 Reapply the removal of SelectionDAGISel's BB, with a fix for the case 
where multiple blocks are emitted; functions which do this need to return
the new BB so that their callers can stay current.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101843 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-20 00:29:35 +00:00
Dan Gohman
68b7960c1a Revert 101825, which is causing trouble. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101832 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-19 23:34:15 +00:00
Dan Gohman
35bb85b7ee Eliminate SelectionDAGISel's "current block" member. Just pass it as 
an argument to things that need it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101825 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-19 22:51:14 +00:00
Dan Gohman
50d2b1ac02 Give SelectionDAG a TargetMachine too, rather than having it 
fetch one from the MachineFunction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101807 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-19 19:22:07 +00:00
Dan Gohman
55e59c1863 Code that needs a TargetMachine should have access to one directly, rather 
than just getting one through a TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101802 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-19 19:05:59 +00:00
Bill Wendling
21739c1c72 Add a "PadTo" field to the emitULEB128Bytes method. This will pad out to the 
indicated number of bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-18 00:51:49 +00:00
Dan Gohman
0d805c33d1 Add const qualifiers to TargetLoweringObjectFile usage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101640 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 16:44:48 +00:00
Dan Gohman
d858e90f03 Use const qualifiers with TargetLowering. This eliminates several 
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101635 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-17 15:26:15 +00:00
Devang Patel
f2548caaa8 Add support to emit dwarf ranges. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101575 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 23:33:45 +00:00
Bill Wendling
47639fc5be The JIT calls TidyLandingPads to tidy up the landing pads. However, because the 
JIT doesn't use the MC back-end asm printer to emit labels that it uses, the
section for the MCSymbol is never set. And thus the MCSymbol for the EH label
isn't marked as "defined". Because of that, TidyLandingPads removes the needed
landing pads from the JIT output. This breaks EH for every JIT program.

This is a work-around for this limitation. We pass in the label locations
map. If the label has a non-zero value, then it was "emitted" by the JIT and
TidyLandingPads shouldn't remove that label.

A nicer solution would be to mark the MCSymbol as "used" by the JIT and not rely
upon the section being set to determine if it's defined or not.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-16 08:46:10 +00:00
Dan Gohman
ae541aad5c Add more const qualifiers for LLVM IR pointers in CodeGen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 04:33:49 +00:00
Dan Gohman
46510a73e9 Add const qualifiers to CodeGen's use of LLVM IR constructs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-15 01:51:59 +00:00