Commit Graph

1518 Commits

Author SHA1 Message Date
Benjamin Kramer
7ec7c7d865 Replace custom fixed endian to raw_ostream emission with EndianStream.
Less code, clearer and more efficient. No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239040 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 15:03:02 +00:00
Daniel Sanders
6ff6fc6055 Replace string GNU Triples with llvm::Triple in MCAsmInfo subclasses and create*AsmInfo(). NFC.
Summary:
This is the first of several patches to eliminate StringRef forms of GNU
triples from the internals of LLVM. After this is complete, GNU triples
will be replaced by a more authoratitive representation in the form of
an LLVM TargetTuple.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: ted, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10236


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 13:12:25 +00:00
Rafael Espindola
569f382a46 Merge MCELF.h into MCSymbolELF.h.
Now that we have a dedicated type for ELF symbol, these helper functions can
become member function of MCSymbolELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238864 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-02 20:38:46 +00:00
Jim Grosbach
586c0042da MC: Clean up MCExpr naming. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-30 01:25:56 +00:00
Rafael Espindola
5b68a837c7 Pass MCSymbols to the helper functions in MCELF.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238596 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 18:47:23 +00:00
Michael Kuperstein
d714fcf5c8 Use std::bitset for SubtargetFeatures.
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures.
Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. 
This should now be fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-26 10:47:10 +00:00
Rafael Espindola
7521964d28 Move alignment from MCSectionData to MCSection.
This starts merging MCSection and MCSectionData.

There are a few issues with the current split between MCSection and
MCSectionData.

* It optimizes the the not as important case. We want the production
of .o files to be really fast, but the split puts the information used
for .o emission in a separate data structure.

* The ELF/COFF/MachO hierarchy is not represented in MCSectionData,
leading to some ad-hoc ways to represent the various flags.

* It makes it harder to remember where each item is.

The attached patch starts merging the two by moving the alignment from
MCSectionData to MCSection.

Most of the patch is actually just dropping 'const', since
MCSectionData is mutable, but MCSection was not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237936 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 19:20:38 +00:00
Jim Grosbach
19696daa21 MC: Clean up method names in MCContext.
The naming was a mish-mash of old and new style. Update to be consistent
with the new. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237594 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 18:43:14 +00:00
James Y Knight
ccafe05df1 Sparc: support the "set" synthetic instruction.
This pseudo-instruction expands into 'sethi' and 'or' instructions,
or, just one of them, if the other isn't necessary for a given value.

Differential Revision: http://reviews.llvm.org/D9089

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237585 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:43:33 +00:00
James Y Knight
1467a41471 Sparc: Support PSR, TBR, WIM read/write instructions.
Differential Revision: http://reviews.llvm.org/D8971

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237582 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:38:47 +00:00
James Y Knight
ee058202fa Sparc: Add the "alternate address space" load/store instructions.
- Adds support for the asm syntax, which has an immediate integer
  "ASI" (address space identifier) appearing after an address, before
  a comma.

- Adds the various-width load, store, and swap in alternate address
  space instructions. (ldsba, ldsha, lduba, lduha, lda, stba, stha,
  sta, swapa)

This does not attempt to hook these instructions up to pointer address
spaces in LLVM, although that would probably be a reasonable thing to
do in the future.

Differential Revision: http://reviews.llvm.org/D8904

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237581 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:35:04 +00:00
James Y Knight
f272788a95 Add support for the Sparc implementation-defined "ASR" registers.
(Note that register "Y" is essentially just ASR0).

Also added some test cases for divide and multiply, which had none before.

Differential Revision: http://reviews.llvm.org/D8670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237580 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:29:48 +00:00
Pete Cooper
39aa893201 Remove 3 includes from MCInstrDesc.h and explicitly include them where needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-15 21:58:42 +00:00
Jim Grosbach
21a996a0e3 MC: MCCodeGenInfo naming update. NFC.
s/InitMCCodeGenInfo/initMCCodeGenInfo/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237471 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-15 19:13:31 +00:00
Jim Grosbach
251a66ec37 MC: Update MCCodeEmitter naming. NFC.
s/EncodeInstruction/encodeInstruction/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237469 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-15 19:13:16 +00:00
Jim Grosbach
8b22e9c00a MC: Update MCFixup naming. NFC.
s/MCFixup::Create/MCFixup::create/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-15 19:13:05 +00:00
Jim Grosbach
db703aaedd MC: Modernize MCOperand API naming. NFC.
MCOperand::Create*() methods renamed to MCOperand::create*().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237275 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 18:37:00 +00:00
Michael Kuperstein
66112dd7f8 Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237245 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 10:28:46 +00:00
Michael Kuperstein
1336daad86 Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first two times this was committed (r229831, r233055), it caused several buildbot failures. 
At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237234 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 08:27:08 +00:00
Matthias Braun
bbff669c18 Change getTargetNodeName() to produce compiler warnings for missing cases, fix them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-07 21:33:59 +00:00
Quentin Colombet
2f7322b348 [ShrinkWrap] Add (a simplified version) of shrink-wrapping.
This patch introduces a new pass that computes the safe point to insert the
prologue and epilogue of the function.
The interest is to find safe points that are cheaper than the entry and exits
blocks.

As an example and to avoid regressions to be introduce, this patch also
implements the required bits to enable the shrink-wrapping pass for AArch64.


** Context **

Currently we insert the prologue and epilogue of the method/function in the
entry and exits blocks. Although this is correct, we can do a better job when
those are not immediately required and insert them at less frequently executed
places.
The job of the shrink-wrapping pass is to identify such places.


** Motivating example **

Let us consider the following function that perform a call only in one branch of
a if:
define i32 @f(i32 %a, i32 %b)  {
 %tmp = alloca i32, align 4
 %tmp2 = icmp slt i32 %a, %b
 br i1 %tmp2, label %true, label %false

true:
 store i32 %a, i32* %tmp, align 4
 %tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
 br label %false

false:
 %tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
 ret i32 %tmp.0
}

On AArch64 this code generates (removing the cfi directives to ease
readabilities):
_f:                                     ; @f
; BB#0:
  stp x29, x30, [sp, #-16]!
  mov  x29, sp
  sub sp, sp, #16             ; =16
  cmp  w0, w1
  b.ge  LBB0_2
; BB#1:                                 ; %true
  stur  w0, [x29, #-4]
  sub x1, x29, #4             ; =4
  mov  w0, wzr
  bl  _doSomething
LBB0_2:                                 ; %false
  mov  sp, x29
  ldp x29, x30, [sp], #16
  ret

With shrink-wrapping we could generate:
_f:                                     ; @f
; BB#0:
  cmp  w0, w1
  b.ge  LBB0_2
; BB#1:                                 ; %true
  stp x29, x30, [sp, #-16]!
  mov  x29, sp
  sub sp, sp, #16             ; =16
  stur  w0, [x29, #-4]
  sub x1, x29, #4             ; =4
  mov  w0, wzr
  bl  _doSomething
  add sp, x29, #16            ; =16
  ldp x29, x30, [sp], #16
LBB0_2:                                 ; %false
  ret

Therefore, we would pay the overhead of setting up/destroying the frame only if
we actually do the call.


** Proposed Solution **

This patch introduces a new machine pass that perform the shrink-wrapping
analysis (See the comments at the beginning of ShrinkWrap.cpp for more details).
It then stores the safe save and restore point into the MachineFrameInfo
attached to the MachineFunction.
This information is then used by the PrologEpilogInserter (PEI) to place the
related code at the right place. This pass runs right before the PEI.

Unlike the original paper of Chow from PLDI’88, this implementation of
shrink-wrapping does not use expensive data-flow analysis and does not need hack
to properly avoid frequently executed point. Instead, it relies on dominance and
loop properties.

The pass is off by default and each target can opt-in by setting the
EnableShrinkWrap boolean to true in their derived class of TargetPassConfig.
This setting can also be overwritten on the command line by using
-enable-shrink-wrap.

Before you try out the pass for your target, make sure you properly fix your
emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not
necessarily the entry block.


** Design Decisions **

1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but
for debugging and clarity I thought it was best to have its own file.
2. Right now, we only support one save point and one restore point. At some
point we can expand this to several save point and restore point, the impacted
component would then be:
- The pass itself: New algorithm needed.
- MachineFrameInfo: Hold a list or set of Save/Restore point instead of one
  pointer.
- PEI: Should loop over the save point and restore point.
Anyhow, at least for this first iteration, I do not believe this is interesting
to support the complex cases. We should revisit that when we motivating
examples.

Differential Revision: http://reviews.llvm.org/D9210

<rdar://problem/3201744>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236507 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-05 17:38:16 +00:00
James Y Knight
a2dd41dead [Sparc] Repair fixups in little endian mode.
Differential Revision: http://reviews.llvm.org/D9434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236324 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-01 17:13:02 +00:00
Douglas Katzman
1b88927253 [Sparc] Really add sparcel architecture support.
Mostly copy-and-paste from Sparc v8 architecture.

Differential Revision: http://reviews.llvm.org/D8741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236146 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 20:30:57 +00:00
Douglas Katzman
484da4100d Make Sparc assembler accept parenthesized constant expressions.
Differential Revision: http://reviews.llvm.org/D9087

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 18:48:29 +00:00
James Y Knight
0e13ba8208 Sparc: Prefer reg+reg address encoding when only one register used.
Reg+%g0 is preferred to Reg+imm0 by the manual, and is what GCC produces.

Futhermore, reg+imm is invalid for the (not yet supported) "alternate
address space" instructions.

Differential Revision: http://reviews.llvm.org/D8753

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236107 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 14:54:44 +00:00
James Y Knight
642098ac59 Sparc: Add alternate aliases for conditional branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:27:31 +00:00
Sergey Dmitrouk
1f7a90d793 Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"
[DebugInfo] Add debug locations to constant SD nodes

This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235989 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:05:47 +00:00
Daniel Jasper
515cc265c9 Revert "[DebugInfo] Add debug locations to constant SD nodes"
This breaks a test:
http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/23870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235987 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 13:38:35 +00:00
Sergey Dmitrouk
716c5d8a30 [DebugInfo] Add debug locations to constant SD nodes
This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 11:56:37 +00:00
Lang Hames
579cebfb15 [AsmPrinter] Make AsmPrinter's OutStreamer member a unique_ptr.
AsmPrinter owns the OutStreamer, so an owning pointer makes sense here. Using a
reference for this is crufty.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235752 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-24 19:11:51 +00:00
Rafael Espindola
c98092e28d Use raw_pwrite_stream in the object writer/streamer.
The ELF object writer will take advantage of that in the next commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234950 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-14 22:14:34 +00:00
Krzysztof Parzyszek
fcc330abfe Allow memory intrinsics to be tail calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234764 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 17:16:45 +00:00
Alexander Kornienko
c16fc54851 Use 'override/final' instead of 'virtual' for overridden methods
The patch is generated using clang-tidy misc-use-override check.

This command was used:

  tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py \
    -checks='-*,misc-use-override' -header-filter='llvm|clang' \
    -j=32 -fix -format

http://reviews.llvm.org/D8925



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234679 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-11 02:11:45 +00:00
Rafael Espindola
7e0993d377 clang-format bits of code to make a followup patch easy to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-09 18:32:58 +00:00
Rafael Espindola
838c24a7c8 Refactor a lot of duplicated code for stub output.
This also moves it earlier so that it they are produced before we print
an end symbol for the data section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-07 13:42:44 +00:00
Eric Christopher
e2424b02b2 Replace the MCSubtargetInfo parameter with a Triple when creating
an MCInstPrinter. Update all callers and use where we wanted a Triple
previously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233648 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-31 00:10:04 +00:00
Eric Christopher
5bd9d1e811 Remove unused MCSubtargetInfo argument from the Sparc MCInstPrinter ctors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233612 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 22:09:43 +00:00
Eric Christopher
1c60a4e36b Remove unused Target argument from MCInstPrinter ctor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233607 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 21:52:21 +00:00
Akira Hatanaka
2841bc6858 [SparcInstPrinter] Use the subtarget that is passed to the print function
instead of the one passed to the constructor.

Unfortunately, I don't have a test case for this change. In order to test my
change, I will have to run the code after line 90 in printSparcAliasInstr. I
couldn't make that happen because printAliasInstr would always handle the
printing of fcmp instructions that the code after line 90 is supposed to handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233471 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-28 04:03:51 +00:00
Akira Hatanaka
f09378397e [MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
per-function subtarget.

Currently, code-gen passes the default or generic subtarget to the constructors
of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which
enables some targets (AArch64, ARM, and X86) to change their instprinter's
behavior based on the subtarget feature bits. Since the backend can now use
different subtargets for each function, instprinter has to be changed to use the
per-function subtarget rather than the default subtarget.

This patch takes the first step towards enabling instprinter to change its
behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to
AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the
various print methods table-gen auto-generates. 

I will follow up with changes to instprinters of AArch64, ARM, and X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-27 20:36:02 +00:00
Michael Kuperstein
765aab84d6 Revert "Use std::bitset for SubtargetFeatures"
This reverts commit r233055.

It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233068 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 12:56:59 +00:00
Michael Kuperstein
d3ab717935 Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. 
Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset.
No functional change.

The first time this was committed (r229831), it caused several buildbot failures. 
At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed.

Differential Revision: http://reviews.llvm.org/D8542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233055 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 09:17:25 +00:00
Eric Christopher
4638c99333 Remove the target independent TargetMachine::getSubtarget and
TargetMachine::getSubtargetImpl routines.

This keeps the target independent code free of bare subtarget
calls while the remainder of the backends are migrated, or not
if they don't wish to support per-function subtargets as would
be needed for function multiversioning or LTO of disparate
cpu subarchitecture types, e.g.

clang -msse4.2 -c foo.c -emit-llvm -o foo.bc
clang -c bar.c -emit-llvm -o bar.bc
llvm-link foo.bc bar.bc -o baz.bc
llc baz.bc

and get appropriate code for what the command lines requested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-21 04:22:23 +00:00
Daniel Sanders
d30081aaa7 [sparc] Small fix to r232719 to make 2007-12-17-InvokeAsm.ll pass on the buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232720 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 11:27:23 +00:00
Daniel Sanders
334291cfb6 [sparc] Only support the 'm' inline assembly memory constraint. NFC.
Summary:
SPARC doesn't seem to support any additional constraints. Therefore remove
the target hook.

No functional change intended.

Reviewers: venkatra

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8214


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232719 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 11:26:05 +00:00
Rafael Espindola
c7c4c36694 Split the object streamer callback in one per file format.
There are two main advantages to doing this

* Targets that only need to handle one of the formats specially don't have
  to worry about the others. For example, x86 now only registers a
  constructor for the COFF streamer.

* Changes to the arguments passed to one format constructor will not impact
  the other formats.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-19 01:50:16 +00:00
Rafael Espindola
64d662ba93 two or more, use a for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232688 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-18 23:15:49 +00:00
Rafael Espindola
7b8bb89ecd Pass in a "const Triple &T" instead of a raw StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232429 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:29:29 +00:00
Rafael Espindola
63641de2e6 Remove unused argument. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232428 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:06:15 +00:00
Rafael Espindola
9130d115d6 There is only one Asm streamer, there is no need for targets to register it.
Instead, have the targets register a TargetStreamer to be use with the
asm streamer (if any).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232423 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:43:42 +00:00