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Author SHA1 Message Date
Craig Topper
80a1caa5cb Convert windows line endings to linux/unix line endings. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179995 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-22 05:38:01 +00:00
Craig Topper
955d1e984c Fix indentation. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179994 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-22 04:24:02 +00:00
Craig Topper
efa703dace Put 'else' on same line as preceding curly brace per coding standards. No functional change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179993 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-22 04:22:40 +00:00
Craig Topper
007b40ff9f Remove an unreachable 'break' following a 'return'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179991 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-22 04:06:59 +00:00
Jim Grosbach
0cb1019e9c Legalize vector truncates by parts rather than just splitting. 
Rather than just splitting the input type and hoping for the best, apply
a bit more cleverness. Just splitting the types until the source is
legal often leads to an illegal result time, which is then widened and a
scalarization step is introduced which leads to truly horrible code
generation. With the loop vectorizer, these sorts of operations are much
more common, and so it's worth extra effort to do them well.

Add a legalization hook for the operands of a TRUNCATE node, which will
be encountered after the result type has been legalized, but if the
operand type is still illegal. If simple splitting of both types
ends up with the result type of each half still being legal, just
do that (v16i16 -> v16i8 on ARM, for example). If, however, that would
result in an illegal result type (v8i32 -> v8i8 on ARM, for example),
we can get more clever with power-two vectors. Specifically,
split the input type, but also widen the result element size, then
concatenate the halves and truncate again.  For example on ARM,
To perform a "%res = v8i8 trunc v8i32 %in" we transform to:
  %inlo = v4i32 extract_subvector %in, 0
  %inhi = v4i32 extract_subvector %in, 4
  %lo16 = v4i16 trunc v4i32 %inlo
  %hi16 = v4i16 trunc v4i32 %inhi
  %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
  %res = v8i8 trunc v8i16 %in16

This allows instruction selection to generate three VMOVN instructions
instead of a sequences of moves, stores and loads.

Update the ARMTargetTransformInfo to take this improved legalization
into account.

Consider the simplified IR:

define <16 x i8> @test1(<16 x i32>* %ap) {
  %a = load <16 x i32>* %ap
  %tmp = trunc <16 x i32> %a to <16 x i8>
  ret <16 x i8> %tmp
}

define <8 x i8> @test2(<8 x i32>* %ap) {
  %a = load <8 x i32>* %ap
  %tmp = trunc <8 x i32> %a to <8 x i8>
  ret <8 x i8> %tmp
}

Previously, we would generate the truly hideous:
	.syntax unified
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_test1
	.align	2
_test1:                                 @ @test1
@ BB#0:
	push	{r7}
	mov	r7, sp
	sub	sp, sp, #20
	bic	sp, sp, #7
	add	r1, r0, #48
	add	r2, r0, #32
	vld1.64	{d24, d25}, [r0:128]
	vld1.64	{d16, d17}, [r1:128]
	vld1.64	{d18, d19}, [r2:128]
	add	r1, r0, #16
	vmovn.i32	d22, q8
	vld1.64	{d16, d17}, [r1:128]
	vmovn.i32	d20, q9
	vmovn.i32	d18, q12
	vmov.u16	r0, d22[3]
	strb	r0, [sp, #15]
	vmov.u16	r0, d22[2]
	strb	r0, [sp, #14]
	vmov.u16	r0, d22[1]
	strb	r0, [sp, #13]
	vmov.u16	r0, d22[0]
	vmovn.i32	d16, q8
	strb	r0, [sp, #12]
	vmov.u16	r0, d20[3]
	strb	r0, [sp, #11]
	vmov.u16	r0, d20[2]
	strb	r0, [sp, #10]
	vmov.u16	r0, d20[1]
	strb	r0, [sp, #9]
	vmov.u16	r0, d20[0]
	strb	r0, [sp, #8]
	vmov.u16	r0, d18[3]
	strb	r0, [sp, #3]
	vmov.u16	r0, d18[2]
	strb	r0, [sp, #2]
	vmov.u16	r0, d18[1]
	strb	r0, [sp, #1]
	vmov.u16	r0, d18[0]
	strb	r0, [sp]
	vmov.u16	r0, d16[3]
	strb	r0, [sp, #7]
	vmov.u16	r0, d16[2]
	strb	r0, [sp, #6]
	vmov.u16	r0, d16[1]
	strb	r0, [sp, #5]
	vmov.u16	r0, d16[0]
	strb	r0, [sp, #4]
	vldmia	sp, {d16, d17}
	vmov	r0, r1, d16
	vmov	r2, r3, d17
	mov	sp, r7
	pop	{r7}
	bx	lr

	.globl	_test2
	.align	2
_test2:                                 @ @test2
@ BB#0:
	push	{r7}
	mov	r7, sp
	sub	sp, sp, #12
	bic	sp, sp, #7
	vld1.64	{d16, d17}, [r0:128]
	add	r0, r0, #16
	vld1.64	{d20, d21}, [r0:128]
	vmovn.i32	d18, q8
	vmov.u16	r0, d18[3]
	vmovn.i32	d16, q10
	strb	r0, [sp, #3]
	vmov.u16	r0, d18[2]
	strb	r0, [sp, #2]
	vmov.u16	r0, d18[1]
	strb	r0, [sp, #1]
	vmov.u16	r0, d18[0]
	strb	r0, [sp]
	vmov.u16	r0, d16[3]
	strb	r0, [sp, #7]
	vmov.u16	r0, d16[2]
	strb	r0, [sp, #6]
	vmov.u16	r0, d16[1]
	strb	r0, [sp, #5]
	vmov.u16	r0, d16[0]
	strb	r0, [sp, #4]
	ldm	sp, {r0, r1}
	mov	sp, r7
	pop	{r7}
	bx	lr

Now, however, we generate the much more straightforward:
	.syntax unified
	.section	__TEXT,__text,regular,pure_instructions
	.globl	_test1
	.align	2
_test1:                                 @ @test1
@ BB#0:
	add	r1, r0, #48
	add	r2, r0, #32
	vld1.64	{d20, d21}, [r0:128]
	vld1.64	{d16, d17}, [r1:128]
	add	r1, r0, #16
	vld1.64	{d18, d19}, [r2:128]
	vld1.64	{d22, d23}, [r1:128]
	vmovn.i32	d17, q8
	vmovn.i32	d16, q9
	vmovn.i32	d18, q10
	vmovn.i32	d19, q11
	vmovn.i16	d17, q8
	vmovn.i16	d16, q9
	vmov	r0, r1, d16
	vmov	r2, r3, d17
	bx	lr

	.globl	_test2
	.align	2
_test2:                                 @ @test2
@ BB#0:
	vld1.64	{d16, d17}, [r0:128]
	add	r0, r0, #16
	vld1.64	{d18, d19}, [r0:128]
	vmovn.i32	d16, q8
	vmovn.i32	d17, q9
	vmovn.i16	d16, q8
	vmov	r0, r1, d16
	bx	lr

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179989 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 23:47:41 +00:00
Jim Grosbach
5eabdf2601 ARM: Split out cost model vcvt testcases. 
They had a separate RUN line already, so may as well be in a separate file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179988 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 23:47:37 +00:00
Jakob Stoklund Olesen
ddb14ce76c Passing arguments to varags functions under the SPARC v9 ABI. 
Arguments after the fixed arguments never use the floating point
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179987 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 21:36:49 +00:00
Jim Grosbach
1e48093df8 Tidy up comment grammar. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179986 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 21:23:01 +00:00
Jakob Stoklund Olesen
2c6b5a8d33 Fix the SETHIimm pattern for 64-bit code. 
Don't ignore the high 32 bits of the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179985 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 21:18:03 +00:00
Stephen Lin
94a720c73e Remove unused, undefined ArgFlagsTy::getArgFlagsString; add a comment about 'returned' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179983 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 18:05:20 +00:00
Benjamin Kramer
d81a0dee5b SROA: Don't crash on a select with two identical operands. 
This is an edge case that can happen if we modify a chain of multiple selects.
Update all operands in that case and remove the assert. PR15805.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179982 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 17:48:39 +00:00
Arnold Schwaighofer
54d9a3e2df Revert "SimplifyCFG: If convert single conditional stores" 
There is the temptation to make this tranform dependent on target information as
it is not going to be beneficial on all (sub)targets. Therefore, we should
probably do this in MI Early-Ifconversion.

This reverts commit r179957. Original commit message:

"SimplifyCFG: If convert single conditional stores

This transformation will transform a conditional store with a preceeding
uncondtional store to the same location:

a[i] =
may-alias with a[i] load
if (cond)
    a[i] = Y
into an unconditional store.

a[i] = X
may-alias with a[i] load
tmp = cond ? Y : X;
a[i] = tmp

We assume that on average the cost of a mispredicted branch is going to be
higher than the cost of a second store to the same location, and that the
secondary benefits of creating a bigger basic block for other optimizations to
work on outway the potential case were the branch would be correctly predicted
and the cost of the executing the second store would be noticably reflected in
performance.

hmmer's execution time improves by 30% on an imac12,2 on ref data sets. With
this change we are on par with gcc's performance (gcc also performs this
transformation). There was a 1.2 % performance improvement on a ARM swift chip.
Other tests in the test-suite+external seem to be mostly uninfluenced in my
experiments:
This optimization was triggered on 41 tests such that the executable was
different before/after the patch. Only 1 out of the 40 tests (dealII) was
reproducable below 100% (by about .4%). Given that hmmer benefits so much I
believe this to be a fair trade off.

I am going to watch performance numbers across the builtbots and will revert
this if anything unexpected comes up."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179980 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 13:09:04 +00:00
Tim Northover
c3a93013bc ARM: fix part of test which actually needed an asserts build 
This should fix a buildbot failure that occurred after r179977.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179978 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 12:20:19 +00:00
Tim Northover
4cc1407b84 ARM: Use ldrd/strd to spill 64-bit pairs when available. 
This allows common sp-offsets to be part of the instruction and is
probably faster on modern CPUs too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179977 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 11:57:07 +00:00
Sylvestre Ledru
7aad829243 Remove the executable bit on cmake files 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179976 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 09:04:59 +00:00
Nadav Rotem
b86dff862f SLPVectorize: Add support for vectorization of casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179975 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 08:05:59 +00:00
Nadav Rotem
bd65805016 SLPVectorizer: Fix a bug in the code that scans the tree in search of nodes with multiple users. 
We did not terminate the switch case and we executed the search routine twice.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179974 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 07:37:56 +00:00
Michael Gottesman
899b2f9d0b [objc-arc] Cleaned up tail-call-invariant-enforcement.ll. 
Specifically:

1. Added checks that unwind is being properly added to various instructions.
2. Fixed the declaration/calling of objc_release to have a return type of void.
3. Moved all checks to precede the functions and added checks to ensure that the
checks would only match inside the specific function that we are attempting to
check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179973 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 02:59:44 +00:00
Michael Gottesman
bf9cac7ebb [objc-arc] Check that objc-arc-expand properly handles all strictly forwarding calls and does not touch calls which are not strictly forwarding (i.e. objc_retainBlock). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179972 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 01:57:46 +00:00
Michael Gottesman
755aabc04e [objc-arc] Renamed the test file clang-arc-used-intrinsic-removed-if-isolated.ll -> intrinsic-use-isolated.ll to match the other test file intrinsic-use.ll. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179971 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 01:42:24 +00:00
Bill Wendling
d868af77df Remove tbaa metadata. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179970 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 01:38:25 +00:00
Michael Gottesman
fca9d95523 When we strength reduce an objc_retainBlock call to objc_retain, increment NumPeeps and make sure that Changed is set to true. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179968 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 00:50:27 +00:00
Michael Gottesman
8c87177f2c Fixed comment typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179967 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 00:44:46 +00:00
Michael Gottesman
d4adf8a886 [objc-arc] Fixed typo in debug message. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179966 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 00:30:50 +00:00
Michael Gottesman
ee37359762 [objc-arc] Fixed comment typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179965 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 00:25:04 +00:00
Michael Gottesman
9f2b618ac5 [objc-arc] Refactored OptimizeReturns so that it uses continue instead of a large multi-level nested if statement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179964 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-21 00:25:01 +00:00
Michael Gottesman
7e48a92829 [objc-arc] Added debug statement saying when we are resetting a sequence's progress. 
This will make it clearer when we are actually resetting a sequence's progress
vs just changing state. This is an important distinction because the former case
clears any pointers that we are tracking while the later does not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179963 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 23:36:57 +00:00
Jakob Stoklund Olesen
da8768b2dd Compile varargs functions for SPARCv9. 
With a little help from the frontend, it looks like the standard va_*
intrinsics can do the job.

Also clean up an old bitcast hack in LowerVAARG that dealt with
unaligned double loads. Load SDNodes can specify an alignment now.

Still missing: Calling varargs functions with float arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179961 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 22:49:16 +00:00
Nadav Rotem
4f38e16b89 Fix PR15800. Do not try to vectorize vectors and structs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179960 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 22:29:43 +00:00
Arnold Schwaighofer
f7af1987dd SimplifyCFG: If convert single conditional stores 
This transformation will transform a conditional store with a preceeding
uncondtional store to the same location:

 a[i] =
 may-alias with a[i] load
 if (cond)
   a[i] = Y

into an unconditional store.

 a[i] = X
 may-alias with a[i] load
 tmp = cond ? Y : X;
 a[i] = tmp

We assume that on average the cost of a mispredicted branch is going to be
higher than the cost of a second store to the same location, and that the
secondary benefits of creating a bigger basic block for other optimizations to
work on outway the potential case were the branch would be correctly predicted
and the cost of the executing the second store would be noticably reflected in
performance.

hmmer's execution time improves by 30% on an imac12,2 on ref data sets. With
this change we are on par with gcc's performance (gcc also performs this
transformation). There was a 1.2 % performance improvement on a ARM swift chip.
Other tests in the test-suite+external seem to be mostly uninfluenced in my
experiments:
This optimization was triggered on 41 tests such that the executable was
different before/after the patch. Only 1 out of the 40 tests (dealII) was
reproducable below 100% (by about .4%). Given that hmmer benefits so much I
believe this to be a fair trade off.

I am going to watch performance numbers across the builtbots and will revert
this if anything unexpected comes up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179957 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 21:42:09 +00:00
Tim Northover
335dd0d1a6 ARM: don't add FrameIndex offset for LDMIA (has no immediate) 
Previously, when spilling 64-bit paired registers, an LDMIA with both
a FrameIndex and an offset was produced. This kind of instruction
shouldn't exist, and the extra operand was being confused with the
predicate, causing aborts later on.

This removes the invalid 0-offset from the instruction being
produced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179956 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 19:31:00 +00:00
Nuno Lopes
bf9fba961b recommit tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179955 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 17:39:52 +00:00
Stephen Lin
514d514bb2 Minor renaming of tests (for consistency with an in-development patch) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179954 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 16:21:26 +00:00
Tim Northover
75f013822b AArch64: remove useless comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179952 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 15:57:41 +00:00
Stephen Lin
b0aeb3e077 Move 'kw_align' case to proper section, reorganize function attribute keyword case statements to be consistent with r179119 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179948 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 13:16:13 +00:00
Tim Northover
8b71994fde Remove unused ShouldFoldAtomicFences flag. 
I think it's almost impossible to fold atomic fences profitably under
LLVM/C++11 semantics. As a result, this is now unused and just
cluttering up the target interface.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179940 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 12:32:43 +00:00
Tim Northover
6265d5c91a Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 12:32:17 +00:00
Rafael Espindola
972b26b1d7 Remove dead code. 
This is part of a future patch to use yamlio that incorrectly ended up in a
cleanup patch.

Thanks to Benjamin Kramer for reporting it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179938 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 11:06:34 +00:00
Benjamin Kramer
d9f82b73eb Don't litter .s files in test directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179937 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 10:43:40 +00:00
Benjamin Kramer
d760c08b34 VecUtils: Clean up uses of dyn_cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179936 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 10:36:17 +00:00
Benjamin Kramer
6fe5cc49d8 SLPVectorizer: Strength reduce SmallVectors to ArrayRefs. 
Avoids a couple of copies and allows more flexibility in the clients.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179935 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 09:49:10 +00:00
Nadav Rotem
cd949714eb SLPVectorizer: Reduce the compile time by eliminating the search for some of the more expensive patterns. After this change will only check basic arithmetic trees that start at cmpinstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179933 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 07:29:34 +00:00
Nadav Rotem
444e33e898 refactor tryToVectorizePair to a new method that supports vectorization of lists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179932 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 07:22:58 +00:00
Nadav Rotem
d7e8cce287 Fix an unused variable warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179931 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 06:40:28 +00:00
Nadav Rotem
1d2ad834f2 SLPVectorizer: Improve the cost model for loop invariant broadcast values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179930 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 06:13:47 +00:00
Nadav Rotem
ef332b1ca1 Report the number of stores that were found in the debug message. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179929 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 05:23:11 +00:00
Nadav Rotem
2aaa269617 Fix the header comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179928 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 05:18:51 +00:00
Nadav Rotem
fbcaf59e33 Use 64bit arithmetic for calculating distance between pointers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179927 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 05:17:47 +00:00
Hal Finkel
abe64dc6f7 Move PPC getSwappedPredicate for reuse 
The getSwappedPredicate function can be used in other places (such as in
improvements to the PPCCTRLoops pass). Instead of trapping it as a static
function in PPCInstrInfo, move it into PPCPredicates with other
predicate-related things.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179926 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 05:16:26 +00:00
Stephen Lin
456ca048af Add CodeGen support for functions that always return arguments via a new parameter attribute 'returned', which is taken advantage of in target-independent tail call opportunity detection and in ARM call lowering (when placed on an integral first parameter). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179925 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-20 05:14:40 +00:00