6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-17 03:30:28 +00:00
Code Issues Projects Releases Wiki Activity
57,298 Commits 39 Branches 0 Tags 277 MiB
835acabce1
Commit Graph

57298 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Chris Lattner
835acabce1 implement infrastructure to support fixups for rip-rel 
addressing.  This isn't complete because I need an MCContext
to generate new MCExprs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96036 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 23:00:36 +00:00
Johnny Chen
f4d81051ff Add YIELD, WFE, WFI, and SEV instructions for disassembly only. 
Plus add two formats: MiscFrm and ThumbMiscFrm.  Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96032 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:53:19 +00:00
Chris Lattner
1e35d0e923 pull the rip-relative addressing mode case up early. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96031 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:47:55 +00:00
Chris Lattner
9cc48eb897 fixme resolved! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96029 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:39:06 +00:00
Chris Lattner
cf65339b52 start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96028 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:36:47 +00:00
Bob Wilson
252968a76f Fix a comment typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96027 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:34:54 +00:00
Chris Lattner
a0331199fc enhance the immediate field encoding to know whether the immediate 
is pc relative or not, mark call and branches as pcrel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96026 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:27:07 +00:00
Evan Cheng
3f7aa79c2a Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96023 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:17:21 +00:00
Dale Johannesen
ee25bc2942 This should have gone in with 26015, see comments there. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96020 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 22:00:40 +00:00
Johnny Chen
83498e55e2 Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96019 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 21:59:23 +00:00
Chris Lattner
42cefa1ea3 doxygenize some comments, patch by Peter Collingbourne! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96018 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 21:54:28 +00:00
Dale Johannesen
c12da8d30a When save/restoring CR at prolog/epilog, in a large 
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot.  Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.

SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.

Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96015 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 21:35:34 +00:00
Chris Lattner
fdfeb6976f Add support for a union type in LLVM IR. Patch by Talin! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96011 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 20:49:41 +00:00
Johnny Chen
b3e1bf54b2 Add SWP (Swap) and SWPB (Swap Byte) for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96010 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 20:48:24 +00:00
Evan Cheng
3922a9ba84 Also recognize armv6t2-* and armv5te-* triplets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96008 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 20:39:35 +00:00
Dan Gohman
0a799ab158 Fix a case of mismatched types in an Add that turned up in 447.dealII. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96007 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 20:39:25 +00:00
Evan Cheng
0f8868b171 Add ARM bitcode file magic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96006 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 20:13:44 +00:00
Dan Gohman
68d6da1f33 Reapply 95979, a compile-time speedup, now that the bug it exposed is fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96005 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 19:35:25 +00:00
Dan Gohman
cd045c08ca Fix this code to avoid dereferencing an end() iterator in 
offset distributions it doesn't expect.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96002 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 19:20:37 +00:00
Johnny Chen
b98e160318 Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95999 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 18:55:33 +00:00
Dale Johannesen
2d1ec73d94 Rewrite handling of DBG_VALUE; previous algorithm 
didn't handle
X =
Y<dead> = use X
DBG_VALUE(X)
I was hoping to avoid this approach as it's slower,
but I don't think it can be done.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95996 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 18:40:17 +00:00
Chris Lattner
c3b6ffc431 1. modernize the constantmerge pass, using densemap/smallvector. 
2. don't bother trying to merge globals in non-default sections,
   doing so is quite dubious at best anyway.
3. fix a bug reported by Arnaud de Grandmaison where we'd try to
   merge two globals in different address spaces.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95995 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 18:17:23 +00:00
Chris Lattner
4b2657a404 rename test 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95993 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 18:05:00 +00:00
Daniel Dunbar
ae08625085 Revert "Reverse the order for collecting the parts of an addrec. The order", it 
is breaking llvm-gcc bootstrap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95988 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 17:27:08 +00:00
Anton Korobeynikov
c8f6326c06 Testcases for recent stdcall / fastcall mangling improvements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95982 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 15:29:13 +00:00
Anton Korobeynikov
ebb0c2b287 Setup correct data layout to match gcc's expectations on mingw32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95981 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 15:28:56 +00:00
Anton Korobeynikov
4dd162f394 Cleanup stdcall / fastcall name mangling. 
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95980 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 15:28:40 +00:00
Dan Gohman
f21a2f15aa Reverse the order for collecting the parts of an addrec. The order 
doesn't matter, except that ScalarEvolution tends to need less time
to fold the results this way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95979 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 11:08:26 +00:00
Dan Gohman
572645cf84 Reapply the new LoopStrengthReduction code, with compile time and 
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.

This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95975 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 10:34:29 +00:00
Lang Hames
5cef638855 * Updated the cost matrix normalization proceedure to better handle infinite costs. 
* Enabled R1/R2 application for nodes with infinite spill costs in the Briggs heuristic (made
safe by the changes to the normalization proceedure).
* Removed a redundant header.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95973 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 09:43:37 +00:00
Evan Cheng
d19925f48f Update test to match 95961. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95971 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 07:48:46 +00:00
Evan Cheng
e89d578fda Test for 95961. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95962 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 02:35:03 +00:00
Chris Lattner
0d8db8e0a8 add a bunch of mod/rm encoding types for fixed mod/rm bytes. 
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95960 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 02:06:33 +00:00
Evan Cheng
e79562dce0 Test case for 95958. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95959 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 02:02:23 +00:00
Chris Lattner
c96f6d606f revert r95949, it turns out that adding new prefixes is not a 
great solution for the disassembler, we'll go with "plan b".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95957 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:55:31 +00:00
Daniel Dunbar
3b6910dcd4 MC: Fix bug where trailing tied operands were forgotten; the X86 assembler 
matcher is now free of implicit operands!
 - Still need to clean up the code now that we don't to worry about implicit
   operands, and to make it a hard error if an instruction fails to specify all
   of its operands for some reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95956 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:46:54 +00:00
Johnny Chen
906d57ffe8 Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2, 
MRRC, MRRc2.  For disassembly only.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95955 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:44:23 +00:00
Bob Wilson
fe61fb1e10 Add a new pass on machine instructions to optimize away PHI cycles that 
reduce down to a single value.  InstCombine already does this transformation
but DAG legalization may introduce new opportunities.  This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized.  I measured the compile time 
impact of this (running llc on 176.gcc) and it was not significant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95951 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:30:21 +00:00
Daniel Dunbar
ccfa1db538 X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented 
with "tied memory operands", which is wrong.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95950 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:22:03 +00:00
Chris Lattner
239a1edbab add another bit of space for new kinds of instruction prefixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95949 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:15:16 +00:00
Nate Begeman
7cdba6d1f4 Add a missing pattern for movhps so that we get: 
movq	(%ecx,%edx,2), %xmm2
movhps	(%ecx,%eax,2), %xmm2

rather than:

movq     (%eax, %edx, 2), %xmm2		
movq     (%eax, %ebx, 2), %xmm3		
movlhps  %xmm3, %xmm2			

Testcase forthcoming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95948 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:10:45 +00:00
Chris Lattner
c4d3f662fc fix the encodings of monitor and mwait, which were completely 
busted in both encoders.  I'm not bothering to fix it in the
old one at this point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95947 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 01:06:22 +00:00
Chris Lattner
6ae7bbb5ea improve support for minix, PR6280, patch by 
Kees van Reeuwijk!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95946 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 00:37:46 +00:00
Charles Davis
1e063d14df Add a new function attribute, 'alignstack'. It will indicate (when the backends 
implement support for it) that the stack should be forcibly realigned in the
prologue (and the process reversed in the epilogue).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95945 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-12 00:31:15 +00:00
Jakob Stoklund Olesen
4a540f0593 Reapply coalescer fix for better cross-class coalescing. 
This time with fixed test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95938 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-11 23:55:29 +00:00
Chris Lattner
0d7b0aa760 enhance llvm-mc -show-inst to print the enum of an instruction, like so: 
testb	%al, %al                ## <MCInst #2412 TEST8rr
                                        ##   <MCOperand Reg:2>
                                        ##   <MCOperand Reg:2>>
	jne	LBB1_7                  ## <MCInst #938 JNE_1
                                        ##   <MCOperand Expr:(LBB1_7)>>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95935 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-11 22:57:32 +00:00
Chris Lattner
7e85180d15 add a new MCInstPrinter::getOpcodeName interface, when it is 
implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95929 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-11 22:39:10 +00:00
Anton Korobeynikov
780679baa7 Document binutils requirements for coff targets (cygwin / mingw32). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95928 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-11 21:51:51 +00:00
Chris Lattner
b8db331588 improve encoding information for branches. We now know they have 
8 or 32-bit immediates, which allows the new encoder to handle
them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95927 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-11 21:45:31 +00:00
Daniel Dunbar
cb7d743b42 MC: Move assembler-backend's fixup list into the fragment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95926 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-02-11 21:29:46 +00:00