Daniel Dunbar
8396893fa5
LLVMBuild: Alphabetize required_libraries lists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144416 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:59:23 +00:00
Daniel Dunbar
f779757ceb
Target/LLVMBuild: Order components alphabetically.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:59:16 +00:00
Bruno Cardoso Lopes
47b92f3d83
Mips MC object code emission improvements:
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"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
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2011-11-11 22:58:42 +00:00
Eric Christopher
bee515f66b
Add an option '--enable-libcpp' that will have the compiler pass on
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options to use libc++ as the default c++ library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:51:42 +00:00
Jim Grosbach
c3937b97c0
Nuke no longer accurate comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:30:06 +00:00
Andrew Trick
95bc85e4ee
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
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Fixes PR8113.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:18:09 +00:00
Jim Grosbach
ce485e7f70
ARM allow Q registers in vldm/vstm register lists.
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rdar://9672822
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 21:27:40 +00:00
Daniel Dunbar
6fd98ae7ef
build/Make: Switch back to llvm-config for now, I foolishly forgot to think
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about cross compiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 20:41:06 +00:00
Nicolas Geoffray
7b8c2f8587
Add a custom safepoint method, in order for language implementers to decide which machine instruction gets to be a safepoint.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 18:32:52 +00:00
Devang Patel
48857eb179
Move X86 specific test in X86 directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144395 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 18:13:19 +00:00
Devang Patel
2d5bbef415
Move X86 specific test in X86 directory.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144394 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 18:10:38 +00:00
Bob Wilson
900b16b99d
Remove FIXME comment that should have been removed with r144351.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144392 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 17:34:14 +00:00
Dan Bailey
96e6458903
allow non-device function calls in PTX when natively handling device-side printf
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 14:45:12 +00:00
Dan Bailey
b812ee6d78
add rules in tabgen for PTX COPY_ADDRESS of frameindex
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 14:45:06 +00:00
Benjamin Kramer
178051fbae
Clients are responsible for initializing the targets, remove it from the disassembler API.
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This will break users of the LLVMCreateDisasm API (not that I know of any). They have to call the
LLVMInitializeAll* functions from llvm-c/Target.h themselves now. edis' C API in all its horribleness
should be unaffected.
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2011-11-11 13:20:40 +00:00
Benjamin Kramer
eea66f63d9
Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 12:39:41 +00:00
Benjamin Kramer
7fb12ef5a6
Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 12:39:35 +00:00
Craig Topper
46154eb6fd
Add lowering for AVX2 shift instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 07:39:23 +00:00
Chad Rosier
1c47de87c7
Rename variables to avoid confusion. No functionallity change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 06:27:41 +00:00
Chad Rosier
a07d3fc693
Add support for using immediates with select instructions.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 06:20:39 +00:00
Akira Hatanaka
e184fec550
Do not try to detect DAG combine patterns for integer multiply-add/sub if value
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type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:18:21 +00:00
Akira Hatanaka
59068067cb
64-bit atomic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:14:30 +00:00
Akira Hatanaka
46ac4399b1
Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:11:56 +00:00
Akira Hatanaka
c742e4fc90
Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:06:38 +00:00
Akira Hatanaka
642b109713
64-bit versions of jal, jalr and bal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:03:54 +00:00
Akira Hatanaka
a1fa08f66a
Emit Mips64's sequence of instructions that set global register in prologue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:00:29 +00:00
Akira Hatanaka
d5cf5a631f
Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
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VK_Mips_GPOFF_HI/LO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 03:58:36 +00:00
Eli Friedman
15f58c56e9
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144361 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 03:16:38 +00:00
Eric Christopher
d61c34ba30
Initialize variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 03:16:32 +00:00
Chad Rosier
646abbfa30
When loading a value, treat an i1 as an i8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 02:38:59 +00:00
Eric Christopher
d117fbb231
If we have a DIE with an AT_specification use that instead of the normal
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addr DIE when adding to the dwarf accelerator tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 01:55:22 +00:00
Eli Friedman
b80f778bd3
Get rid of an optimization in SCCP which appears to have many issues. Specifically, it doesn't handle many cases involving undef correctly, and it is missing other checks which
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lead to it trying to re-mark a value marked as a constant with a different value. It also appears to trigger very rarely.
Fixes PR11357.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 01:16:15 +00:00
Bill Wendling
cf3b89f9a8
Reenable compact unwinding now that <rdar://problem/10430076> is fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 01:03:50 +00:00
Bill Wendling
c739577d3c
If we have to reset the calculation of the compact encoding, then also reset the
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"saved register" index.
<rdar://problem/10430076>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:59:14 +00:00
Chad Rosier
4e89d97e3a
Add support for using MVN to materialize negative constants.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:36:21 +00:00
Bill Wendling
7b809e08b9
Disable compact unwind generation until I can solve the codegen problems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:28:42 +00:00
Daniel Dunbar
b7f3bfc559
llvm-build: Add --configure-target-def-file option.
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- Can be used to generate the substitution values we currently use for the various target related .def files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:24:00 +00:00
Daniel Dunbar
5ed5506f18
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:23:56 +00:00
Jim Grosbach
0352b4679e
Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.
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rdar://10429490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:58:34 +00:00
Jim Grosbach
83ec87755e
ARM let processInstruction() tranforms chain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:42:14 +00:00
Nicolas Geoffray
54d5df9f51
Add blurb for VMKit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:37:56 +00:00
Daniel Dunbar
57c68f972c
build/Make: llvm-config-2 needs to use EXEEXT, since it is an actual executable
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now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:33:20 +00:00
Daniel Dunbar
dcd33e40b8
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144334 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:33:18 +00:00
Jim Grosbach
5402637ff2
Thumb2 parsing for push/pop w/ hi registers in the reglist.
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rdar://10130228.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:17:11 +00:00
Jim Grosbach
fae02597bb
Thumb1 diagnostics for reglist on PUSH/POP fix.
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Was not checking the first register in the register list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:01:27 +00:00
Daniel Dunbar
c55346d39a
git: Add tools/lldb to the ignore list.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 22:55:50 +00:00
Rafael Espindola
01b55b4a80
Check in getOrCreateSubprogramDIE if a declaration exists and if so output
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it first.
This is a more general fix to pr11300.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 22:34:29 +00:00
Daniel Dunbar
950dba04e0
build/Make: Try to switch over to llvm-config-2 again, now that I've cleaned up
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some more of the explicit dependencies. I'm staging things more slowly this time
in case there is more unanticipated fallout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 22:11:04 +00:00
Jim Grosbach
1b332860ae
Thumb MUL assembly parsing for 3-operand form.
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Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
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2011-11-10 22:10:12 +00:00
Daniel Dunbar
eaf4221cef
build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler
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that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 22:00:37 +00:00