just PreSelection
* Wrapped code at 80 columns
* Added the DecomposeMultiDimRefs Pass to the JIT compilation path
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7657 91177308-0d34-0410-b5e6-96231b3b80d8
because saving i1 and i2 to their ``designated'' stack slots corrupts unknown
memory in other functions, standard libraries, and worse.
In addition, this has the benefit of improving JIT performance because we
eliminate writing out 4 instructions in CompilationCallback() and 2 loads and 2
stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7653 91177308-0d34-0410-b5e6-96231b3b80d8
2. Handle fp-to-uint conversions directly here instead of relying on
a pre-transformation to replace them with the 2-step conversion.
3. Use size rather than explicitly checking types when deciding what
opcodes to use, wherever possible. This is less error prone (the
bug fix above was not the first time!).
4. Float-to-pointer casts shd now work though this hasn't been tested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7645 91177308-0d34-0410-b5e6-96231b3b80d8
this is not an optional transformation on SPARC and is now handled
directly by instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7644 91177308-0d34-0410-b5e6-96231b3b80d8
* Doxygen-ified comments
* Added capability to make far calls (i.e., beyond 30 bits in CALL instr)
which implies that we need to delete function references that were added by
the call to addFunctionReference() because the actual call instruction is 10
instructions away (thanks to 64-bit address construction)
* Cleaned up code that generates far jumps by using an array+loop
SparcV9CodeEmitter.h:
* Explained more of the side-effects of emitFarCall()
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Note that some generated operators (like &, | or ^) may
not be supported by the assembler -- but if they've got
this far, it's better to generate them and let the assembler decide.
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since it is *necessary* for correct code generation. Only optional
transformations belong in the PreOpts pass (which needs to be renamed
from PreSelection to PreOpts).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7474 91177308-0d34-0410-b5e6-96231b3b80d8
that depends on machine register size.
Moved insertCallerSavingCode() to PhyRegAlloc and
moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all
machine independent. Remove several dead functions.
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immed. field. Moved insertCallerSavingCode() to PhyRegAlloc: it is
now machine independent. Remove all uses of PhyRegAlloc.
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spilling values used by an instruction in the delay slot of the branch
(which will eventually be moved before the branch).
2. Bug fix: Delete the delay slot instr, not the branch instr, when
moving delay slot instr. out!!!!
3. Move code to insert caller-saves moved here from SparcRegInfo:
it is now machine-independent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7389 91177308-0d34-0410-b5e6-96231b3b80d8
machine-independent.
Fix problem with using branch operand reg. as temp. reg. when
spilling values used by an instruction in the delay slot of the branch
(which will eventually be moved before the branch).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7385 91177308-0d34-0410-b5e6-96231b3b80d8
Single and FP double reg types (which share the same reg class).
Now all methods marking/finding unused regs consider the regType
within the reg class, and SparcFloatRegClass specializes this code.
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
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causing a nasty array bound error later.
2. Fix silly typo causing logical shift of unsigned long to use
SRL instead of SRLX.
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info (since multiple reg types may share the same reg class).
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7329 91177308-0d34-0410-b5e6-96231b3b80d8
found to consider regType info (since multiple reg types may share
the same reg class, e.g., single and double on Sparc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7327 91177308-0d34-0410-b5e6-96231b3b80d8