Misha Brukman
640b9280d5
Since we now have TableGen editing modes for VIM and (X)Emacs, we no longer need
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to mark TableGen description files with "C++ mode".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7841 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-14 15:16:28 +00:00
Misha Brukman
c3cd8afe96
* Set annul bit to be 0, because the Sparc backend currently does not use it.
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* Use the name of the predict field instead of just the const 1 in the
Instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7592 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-05 14:34:38 +00:00
Chris Lattner
7cc7d987a4
Transition to using 'let X = y' instead of 'set X = y'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7565 91177308-0d34-0410-b5e6-96231b3b80d8
2003-08-04 05:03:18 +00:00
Misha Brukman
a34b619f67
Encode predict = 1 by default, because the Sparc assembler does this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7181 91177308-0d34-0410-b5e6-96231b3b80d8
2003-07-15 21:26:49 +00:00
Misha Brukman
ce50542179
Moved predict and annul fields to the end of each individual instruction
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class, because they are currently unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6638 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:33:15 +00:00
Misha Brukman
3da0923868
The rd field goes after the immediate field in format 2.1 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6559 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-03 01:04:04 +00:00
Misha Brukman
dafa504341
* Broke up SparcV9.td into separate files as it was getting unmanageable
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* Added some Format 4 classes, but not instructions
* Added notes on missing sections with FIXMEs
* Added RDCCR instr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6388 91177308-0d34-0410-b5e6-96231b3b80d8
2003-05-29 03:31:43 +00:00
