Commit Graph

800 Commits

Author SHA1 Message Date
Dan Gohman
ad2ef21c76 Run vortex-bug as x86-64, which is what the original bug was triggered on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51289 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-20 00:54:39 +00:00
Dale Johannesen
e44b1bd3dc Use common where we mean common, not weak.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51173 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-16 00:52:30 +00:00
Dan Gohman
f20d70d57e Fix a bug in LoopStrengthReduce that caused it to emit IR with
use-before-def. The problem comes up in code with multiple PHIs where
one PHI is being rewritten in terms of the other, but the other needs
to be casted first. LLVM rules requre the cast instruction to be
inserted after any PHI instructions, but when instructions were
inserted to replace the second PHI value with a function of the first,
they were ended up going before the cast instruction. Avoid this
problem by remembering the location of the cast instruction, when one
is needed, and inserting the expansion of the new value after it.

This fixes a bug that surfaced in 255.vortex on x86-64 when
instcombine was removed from the middle of the loop optimization
passes. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-15 23:26:57 +00:00
Dan Gohman
d64a78c9ed When bit-twiddling CondCode values for integer comparisons produces
SETOEQ, is it does with (SETEQ & SETULE), map it to SETEQ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51112 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-14 18:17:09 +00:00
Evan Cheng
77f0b7a50a Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
pshufd $1, (%rdi), %xmm0
        movd %xmm0, %eax
=>
        movl 4(%rdi), %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 08:35:03 +00:00
Evan Cheng
fa7fd33a26 On x86, it's safe to treat i32 load anyext as a normal i32 load. Ditto for i8 anyext load to i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51019 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-13 00:54:02 +00:00
Evan Cheng
9bfa03c6fd Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 23:04:07 +00:00
Dale Johannesen
38eb9f9ae6 New test for tail merging
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51007 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-12 22:59:44 +00:00
Evan Cheng
50d9e7289b When transforming a vector_shuffle to a load, the base address must not be an undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50940 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10 06:46:49 +00:00
Evan Cheng
c81d50e0f7 Add nounwind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50931 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10 02:22:25 +00:00
Evan Cheng
b3e0a6d75c If all sources of a PHI node are defined by an implicit_def, just emit an implicit_def instead of a copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50927 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-10 00:17:50 +00:00
Evan Cheng
23573e5be6 Add a pattern to do move the low element of a v4f32 and zero extend the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50922 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09 23:37:55 +00:00
Evan Cheng
d880b97257 Handle a few more cases of folding load i64 into xmm and zero top bits.
Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50918 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09 21:53:03 +00:00
Evan Cheng
6c17c6bafa Simplify test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-09 19:56:32 +00:00
Evan Cheng
fd17f42bab Use movq to move low half of XMM register and zero-extend the rest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-08 22:35:02 +00:00
Evan Cheng
7e2ff77ef0 Handle vector move / load which zero the destination register top bits (i.e. movd, movq, movss (addr), movsd (addr)) with X86 specific dag combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50838 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-08 00:57:18 +00:00
Evan Cheng
687bcb2be0 Add nounwind.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50837 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07 22:59:08 +00:00
Evan Cheng
7ebc06bfd8 Yet another nasty spiller bug.
%ecx = op
store %cl<kill>, (addr)
(addr) = op %al

It's not safe to unfold the last operand and eliminate store even though %cl is marked kill. It's a sub-register use which means one of its super-register(s) may be used below.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50794 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-07 00:49:28 +00:00
Anton Korobeynikov
70e616fa0b Use target triple in tests, not 'realign-stack=0' option. Per request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50778 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 23:09:29 +00:00
Evan Cheng
21037da713 Fix PR2287. Darwin passes mmx values in register in 64-mode, not Linux.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50716 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-06 07:23:50 +00:00
Mon P Wang
63307c335a Added addition atomic instrinsics and, or, xor, min, and max.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50663 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05 19:05:59 +00:00
Chris Lattner
b61bfdb56e no need for eh info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50658 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05 18:24:33 +00:00
Dan Gohman
a779a9899a Add AsmPrinter support for emitting a directive to declare that
the code being generated does not require an executable stack.

Also, add target-specific code to make use of this on Linux
on x86. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50634 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-05 00:28:39 +00:00
Evan Cheng
5759f97f50 Select vector shift with non-immediate i32 shift amount operand by first moving the operand into the right register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50619 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-04 09:15:50 +00:00
Evan Cheng
22b942aa4d Add separate intrinsics for MMX / SSE shifts with i32 integer operands. This allow us to simplify the horribly complicated matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50601 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-03 00:52:09 +00:00
Chris Lattner
0b11cbacce specify an arch for non-x86 hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50576 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-02 15:11:58 +00:00
Chris Lattner
6bf30ab347 don't randomly miscompile seto/setuo just because we are in
ffastmath mode.  This fixes rdar://5902801, a miscompilation
of gcc.dg/builtins-8.c.

Bill, please pull this into Tak.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50523 91177308-0d34-0410-b5e6-96231b3b80d8
2008-05-01 07:26:11 +00:00
Arnold Schwaighofer
d2ef523673 Really commit the test checking the argument lowering behaviour on x86-64 :).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50478 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-30 09:19:47 +00:00
Chris Lattner
3fb2968f2f make the vector conversion magic handle multiple results.
We now compile test2/test3 to:

_test2:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	addps	%xmm1, %xmm0
	ret
_test3:
	## InlineAsm Start
	set %xmm0, %xmm1
	## InlineAsm End
	paddd	%xmm1, %xmm0
	ret

as expected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 04:48:56 +00:00
Chris Lattner
41f6259a4b add support for multiple return values in inline asm. This is a step
towards PR2094.  It now compiles the attached .ll file to:

_sad16_sse2:
	movslq	%ecx, %rax
	## InlineAsm Start
	%ecx %rdx %rax %rax %r8d %rdx %rsi
	## InlineAsm End
	## InlineAsm Start
	set %eax
	## InlineAsm End
	ret

which is pretty decent for a 3 output, 4 input asm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50386 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 04:29:54 +00:00
Evan Cheng
8509fcf8eb Another extract_subreg coalescing bug.
e.g.
vr1024<2> extract_subreg vr1025, 2
If vr1024 do not have the same register class as vr1025, it's not safe to coalesce this away. For example, vr1024 might be a GPR32 while vr1025 might be a GPR64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50385 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-29 01:41:44 +00:00
Evan Cheng
8c2f662d84 Add -march=x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 23:31:41 +00:00
Evan Cheng
9d32f2aacb Test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50377 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-28 22:14:34 +00:00
Chris Lattner
5a09690446 Implement a signficant optimization for inline asm:
When choosing between constraints with multiple options,
like "ir", test to see if we can use the 'i' constraint and
go with that if possible.  This produces more optimal ASM in
all cases (sparing a register and an instruction to load it),
and fixes inline asm like this:

void test () {
  asm volatile (" %c0 %1 " : : "imr" (42), "imr"(14));
}

Previously we would dump "42" into a memory location (which
is ok for the 'm' constraint) which would cause a problem
because the 'c' modifier is not valid on memory operands.

Isn't it great how inline asm turns 'missed optimization'
into 'compile failed'??

Incidentally, this was the todo in 
PowerPC/2007-04-24-InlineAsm-I-Modifier.ll

Please do NOT pull this into Tak.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50315 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-27 00:37:18 +00:00
Nate Begeman
aea6a6f717 Feedback from chris
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50305 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 21:47:35 +00:00
Nate Begeman
d35f8ef175 Add a testcase for the recent "handle variable vector insert elt in mem" patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50303 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 21:26:59 +00:00
Evan Cheng
b3f346fa36 Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50293 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 20:13:47 +00:00
Evan Cheng
10e864276b Special handling for MMX values being passed in either GPR64 or lower 64-bits of XMM registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50289 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 19:11:04 +00:00
Evan Cheng
ee472b1081 MMX argument passing fixes:
On Darwin / Linux x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].                                                                                                                                      
On Darwin / Linux x86-32, v1i64 values are passed in memory.                                                                                                                                                    
On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].                                                                                                                                     
On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 07:56:45 +00:00
Chris Lattner
25453ea49e Loosen up an assertion to allow intrinsics. I really have no
idea what this code (findNonImmUse) does, so I'm only guessing 
that this is the right thing.  It would be really really nice
if this had comments and perhaps switched to SmallPtrSet
(hint hint) :)

This fixes rdar://5886601, a crash on gcc.target/i386/sse4_1-pblendw.c


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50252 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 05:13:01 +00:00
Evan Cheng
2749c72f30 Fix bug in x86 memcpy / memset lowering. If there are trailing bytes not handled by rep instructions, a new memcpy / memset is introduced for them. However, since source / destination addresses are already adjusted, their offsets should be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50239 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-25 00:26:43 +00:00
Anton Korobeynikov
0e9ddde1cf Disable stack realignment for these tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50172 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-23 18:25:44 +00:00
Anton Korobeynikov
e44a4b3bd7 Fix test becase ABI stack alignment dropped to 'normal' value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50171 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-23 18:25:16 +00:00
Anton Korobeynikov
51a8feea9b Fix test, instruction count is valid only if stack is not realigned
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50170 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-23 18:24:48 +00:00
Dan Gohman
61a9213440 Implement an x86-64 ABI detail of passing structs by hidden first
argument. The x86-64 ABI requires the incoming value of %rdi to
be copied to %rax on exit from a function that is returning a
large C struct.

Also, add a README-X86-64 entry detailing the missed optimization
opportunity and proposing an alternative approach.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50075 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-21 23:59:07 +00:00
Chris Lattner
bd381a777b A better fix for my previous patch, MOVZQI2PQIrr just requires SSE2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49986 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-20 05:52:46 +00:00
Chris Lattner
b15f760cda Not all x86-64 machines have sse3 apparently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49985 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-20 05:47:56 +00:00
Chris Lattner
1ce9e00f8b rename *.llx -> *.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49970 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-19 22:29:10 +00:00
Evan Cheng
639f493ebf Be more careful with insert_subreg and extract_subreg where either source or destination operand has already been coalesced with another register that's defined by a insert_subreg or extract_subreg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49843 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-17 07:58:04 +00:00
Evan Cheng
621d157676 Fix a sub-register indice propagation bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49832 91177308-0d34-0410-b5e6-96231b3b80d8
2008-04-17 00:06:42 +00:00