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50550 Commits

Author SHA1 Message Date
Akira Hatanaka
8f3af87e99 Move class and instruction definitions for conditional moves to a seperate file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142220 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:43:19 +00:00
Akira Hatanaka
eea367ec97 Revert change made in r142205. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142217 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:33:24 +00:00
Akira Hatanaka
bdfd98a080 Redefine count-leading 0s and 1s instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142216 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:26:37 +00:00
Akira Hatanaka
89d306669e Redefine mfhi/lo and mthi/lo instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142214 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:24:15 +00:00
Bill Wendling
728662f9e8 Now that we have the ReturnsTwice function attribute, this method is 
obsolete. Check the attribute instead.
<rdar://problem/8031714>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142212 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:22:52 +00:00
Akira Hatanaka
f1fddcd9e0 Redefine multiply and divide instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142211 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:21:24 +00:00
Akira Hatanaka
2d0a61da62 Add definition of a base class for logical shift/rotate instructions with two 
source registers and redefine 32-bit and 64-bit instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142210 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:17:58 +00:00
Hal Finkel
e9e5791556 Remove >80-col line and unicode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142209 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:10:08 +00:00
Akira Hatanaka
363934665d Add definition of a base class for logical shift/rotate immediate instructions 
and have 32-bit and 64-bit instructions derive from it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142207 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:06:56 +00:00
Chad Rosier
60655413ce Removed set, but unused variable. 
Patch by Joe Abbey <jabbey@arxan.com>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142206 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:01:59 +00:00
Akira Hatanaka
a01820a508 Add definition of immZExt5_64 and redefine immZExt5 as an ImmLeaf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142205 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:01:00 +00:00
Michael J. Spencer
9904056a70 Fix CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142204 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 17:50:39 +00:00
Devang Patel
6c15fec3c5 It is safe to speculate load from GOT. This fixes performance regression caused by r141689. 
Radar 10281206.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142202 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 17:35:01 +00:00
Devang Patel
827454e6e2 svn mv Target/ARM/ARMGlobalMerge.cpp Transforms/Scalar/GlobalMerge.cpp 
There is no reason to have simple IR level pass in lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142200 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 17:17:43 +00:00
Hal Finkel
98daa9dcc8 Instructions for Book E PPC should be word aligned, set function alignment to reflect this 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142194 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 17:01:41 +00:00
Craig Topper
4b2dc74d3f Don't use inline assembly in 64-bit Visual Studio. Unfortunately, this means that cpuid leaf 7 can't be queried on versions of Visual Studio earlier than VS 2008 SP1. Fixes PR11147. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142177 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 05:33:10 +00:00
Bill Wendling
24bb925566 Add comment explaining that the order of processing doesn't matter here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142176 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 05:25:09 +00:00
Hal Finkel
b31d3d271f Add PPC 440 scheduler and some associated tests (new files) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 04:03:55 +00:00
Hal Finkel
c6d08f10bf Add PPC 440 scheduler and some associated tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142170 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 04:03:49 +00:00
Chandler Carruth
602650c988 Add a routine to swap branch instruction operands, and update any 
profile metadata at the same time. Use it to preserve metadata attached
to a branch when re-writing it in InstCombine.

Add metadata to the canonicalize_branch InstCombine test, and check that
it is tranformed correctly.

Reviewed by Nick Lewycky!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142168 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 01:11:57 +00:00
Chandler Carruth
7a34c8b602 Delete a dead member. Dunno if this was ever used, but the current code 
directly manipulates the weights inside of the BranchProbabilityInfo
that is passed in.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142163 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 22:27:54 +00:00
Chandler Carruth
5820d62803 Add a proper LLVM banner to this file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142162 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 22:15:07 +00:00
Nadav Rotem
8fb06b3e8f Enable element promotion type legalization by deafault. 
Changed tests which assumed that vectors are legalized by widening them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142152 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 20:31:33 +00:00
Nick Lewycky
36c7e6c36c When looking for dependencies on the src pointer, scan the src pointer. Scanning 
on the memcpy call will pull up other unrelated stuff. Fixes PR11142.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142150 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 20:13:32 +00:00
Craig Topper
ee62e4f6d1 Add X86 PEXTR and PDEP instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142141 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 16:50:08 +00:00
Benjamin Kramer
962bad70f4 Let printf do the formatting instead aligning strings ourselves. 
While at it, merge some format strings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142140 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 16:30:34 +00:00
Benjamin Kramer
47b8798c0b Twinify better. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142139 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 15:46:29 +00:00
Benjamin Kramer
5efabcf01d Add AsmToken::getEndLoc and use it to add ranges to x86 asm register parsing. 
<stdin>:1:12: error: register %rax is only available in 64-bit mode
   incl    %rax
           ^~~~

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142137 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 12:10:27 +00:00
Benjamin Kramer
f82edaffb1 X86AsmParser: Synthesize EndLoc for tokens out of StartLoc + Length and print ranges for invalid operands. 
<stdin>:1:4: error: invalid instruction mnemonic 'abc'
   abc incl    %edi
   ^~~

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142135 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 11:28:29 +00:00
Benjamin Kramer
04a0426cc2 PR11143: Save the old diagnostic handler and call it when munging diagnostics for #line directives. 
This reenables proper inline asm diagnostics in clang

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142132 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 10:48:29 +00:00
Nadav Rotem
c32a8c9073 Fix a bug in LowerV2I64Splat, which generated a BUILD_VECTOR for which there was 
no pattern.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142130 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 10:02:06 +00:00
Craig Topper
b53fa8bf19 Add X86 BZHI instruction as well as BMI2 feature detection. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142122 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 07:55:05 +00:00
Craig Topper
dc479c4a89 Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMREAD, and VMWRITE to remove hack from X86RecognizableInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142117 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 07:05:40 +00:00
Cameron Zwarich
daada347b5 Add flags on Thumb2 indexed stores paralleling the flags on the indexed loads. 
These missing flags show up as errors when running -verify-coalescing on
test-suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142111 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 06:38:10 +00:00
Cameron Zwarich
d575137634 Fix an obvious typo found when looking at nearby code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142110 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 06:38:06 +00:00
Chris Lattner
462b43cbf6 remove the dead 'ShowLine' argument from SMDiagnostic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142108 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 05:47:55 +00:00
Chris Lattner
3f2d5f60b3 Make SMDiagnostic a little more sane. Instead of passing around note/warning/error as a 
string, pass it around as an enum.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142107 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 05:43:57 +00:00
Chris Lattner
d8b7aa2613 Enhance llvm::SourceMgr to support diagnostic ranges, the same way clang does. Enhance 
the X86 asmparser to produce ranges in the one case that was annoying me, for example:

test.s:10:15: error: invalid operand for instruction
movl 0(%rax), 0(%edx)
              ^~~~~~~

It should be straight-forward to enhance filecheck, tblgen, and/or the .ll parser to use 
ranges where appropriate if someone is interested.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 04:47:35 +00:00
Craig Topper
17730847d5 Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142105 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 03:51:13 +00:00
Craig Topper
4145c49aa0 Add X86 feature detection support for BMI instructions. Added new cpuid function for accessing leafs with sub leafs specified in ECX. Also added code to keep track of the max cpuid level supported in both basic and extended leaves and qualified the existing cpuid calls and the new call to leaf 7. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142089 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-16 00:21:51 +00:00
Craig Topper
566f233ba6 Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work because these are the first VEX encoded instructions to use the reg field as an opcode extension. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142082 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 20:46:47 +00:00
Nadav Rotem
4d83b79c76 The CELL backend cannot select patterns for vector trunc-store and shl on v2i64; CellSPU/shift_ops.ll fails when promoting elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 20:05:17 +00:00
Nadav Rotem
004a24b44c ARM cannot select a pattern for trunc-store v4i8; /ARM/vrev.ll fails when promoting elements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142080 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 20:03:12 +00:00
Benjamin Kramer
003fad98cc SmallVector -> array 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142073 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 13:28:31 +00:00
Duncan Sands
1673b15da2 Don't replace all dominated uses if there is only one use, since that 
use can't be dominated, saving one domtree lookup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142066 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 11:13:42 +00:00
Benjamin Kramer
6e6a558ebc Add a bad char heuristic to StringRef::find. 
Based on Horspool's simplified version of Boyer-Moore. We use a constant-sized table of
uint8_ts to keep cache thrashing low, needles bigger than 255 bytes are uncommon anyways.

The worst case is still O(n*m) but we do a lot better on the average case now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142061 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 10:08:31 +00:00
Nadav Rotem
e9b58d0aac Move the legalization of vector loads and stores into LegalizeVectorOps. In some 
cases we need the second type-legalization pass in order to support all cases.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142060 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 07:41:10 +00:00
Andrew Trick
365c9f1ff5 Fix SCEVExpander assert during LSR: "argument of incompatible type". 
Just because we're dealing with a GEP doesn't mean we can assert the
SCEV has a pointer type. The fix is simply to ignore the SCEV pointer
type, which we really didn't need.
Fixes PR11138 webkit crash.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142058 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 06:19:55 +00:00
NAKAMURA Takumi
569c4a4767 Revert r142046, "Fix for llvm::sys::getHostTriple on Windows. Instead of relying on the triple" 
It extremely breaks builds when optimization is enabled. Twine should not hold temporary objects.

By the way, I might feel sad if I saw "i786-" "i1586-" or "iF86-".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142055 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 04:29:36 +00:00
Chad Rosier
8e3ef11550 Fix for llvm::sys::getHostTriple on Windows. Instead of relying on the triple 
from config.h, it discovers the triple based on the execution environment.

Patch by Aaron Ballman <aaron@aaronballman.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142046 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-15 02:10:06 +00:00