Commit Graph

95346 Commits

Author SHA1 Message Date
David Blaikie
296ca41b2d Basic unit tests for PointerUnion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 21:30:23 +00:00
Bill Wendling
dd778b230e Reorder headers according to lint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 21:14:19 +00:00
Bill Wendling
4a4844a022 Remove use of forbidden 'iostream' header.
Also obsessively reorder the headers to be in something closer to alphabetical order.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 20:36:42 +00:00
Matt Arsenault
52c7d8e4eb Teach InstCombine about address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 19:53:10 +00:00
Ahmed Bougacha
b2fdd9ee45 MC CFG: Remap enough for data too, analoguous to r188873.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 19:40:28 +00:00
Ahmed Bougacha
2172767491 Style cleanup following David's review for r188876.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 19:40:25 +00:00
Ahmed Bougacha
a68512f68f Add testcase for r188873: MCTextAtom boundaries.
Check that they are correctly computed if the last instruction is
larger than 1 byte.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188923 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 19:40:22 +00:00
Argyrios Kyrtzidis
d6dbd6b883 [CMake] Automatically pick up subdirectories in llvm/tools as 'external projects' if they contain a 'CMakeLists.txt' file.
Allow CMake to pick up external projects in llvm/tools without the need to modify the "llvm/tools/CMakeLists.txt" file.
This makes it easier to work with projects that live in other repositories, without needing to specify each one in "llvm/tools/CMakeLists.txt".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188921 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 19:13:44 +00:00
Matt Arsenault
795cfe3cfd Add test for bitcast array ptrs with address spaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 19:09:28 +00:00
Matt Arsenault
606deaf147 Add enforce known alignment test with address space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188917 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 18:54:53 +00:00
Matt Arsenault
551dac1f62 Use attribute helper function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188916 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 18:54:50 +00:00
Matt Arsenault
5d7a73f866 Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 18:54:47 +00:00
Hao Liu
52d35c2460 A minor change for an obvous problem caused by r188451:
def imm0_63 : Operand<i32>, ImmLeaf<i32, [{ return Imm >= 0 && Imm < 63;}]>{
As it seems Imm <63 should be Imm <= 63. ImmLeaf is used in pattern match, but there is already a function check the shift amount range, so just remove ImmLeaf. Also add a test to check 63.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 17:47:53 +00:00
Joey Gouly
159b6f1775 Add -mcpu to two X86 tests.
These tests are failing on Haswell CPUs due to different instruction selection.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188908 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 17:14:31 +00:00
Ahmed Bougacha
7413b54c89 Add basic YAML MC CFG testcase.
Drive-by llvm-objdump cleanup (don't hardcode ToolName).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188904 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 16:13:25 +00:00
NAKAMURA Takumi
8fea8f2d82 Unix/Process.inc: Revert r72332, "Work around a page size issue on Cygwin."
Offset in mmap(3) should be aligned to gepagesize(), 64k, or mmap(3) would fail.

TODO: Invetigate places where 4096 would be required as pagesize, or 4096 would satisfy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188903 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 13:47:12 +00:00
Mihai Popa
1a9f21abac Make "mov" work for all Thumb2 MOV encodings
According to the ARM specification, "mov" is a valid mnemonic for all Thumb2 MOV encodings.
To achieve this, the patch adds one instruction alias with a special range condition to avoid collision with the Thumb1 MOV.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188901 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 13:14:58 +00:00
Elena Demikhovsky
8ba76daba0 AVX-512: Added SHIFT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188899 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 09:36:02 +00:00
Richard Sandiford
df40f8e8ad [SystemZ] Define remainig *MUL_LOHI patterns
The initial port used MLG(R) for i64 UMUL_LOHI but left the other three
combinations as not-legal-or-custom.  Although 32x32->{32,32}
multiplications exist, they're not as quick as doing a normal 64-bit
multiplication, so it didn't seem like i32 SMUL_LOHI and UMUL_LOHI
would be useful.  There's also no direct instruction for i64 SMUL_LOHI,
so it needs to be implemented in terms of UMUL_LOHI.

However, not defining these patterns means that we don't convert
division by a constant into multiplication, so this patch fills
in the other cases.  The new i64 SMUL_LOHI sequence is simpler
than the one that we used previously for 64x64->128 multiplication,
so int-mul-08.ll now tests the full sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188898 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 09:34:56 +00:00
NAKAMURA Takumi
f44026bf26 MCFunction.h: Prune \returns to fix a warning in r188881. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188897 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 09:34:22 +00:00
Daniel Sanders
187dedf21d [mips][msa] Matheus Almeida pointed out a silly mistake in r188893. Fixed it.
I accidentally changed the encoding of the MSA registers to zero instead of 0
to 31. This change restores the encoding the registers had prior to r188893.

This didn't show up in the existing tests because direct-object emission isn't
implemented yet for MSA.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188896 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 09:09:52 +00:00
Richard Sandiford
d95865a2a2 [SystemZ] Use FI[EDX]BRA for codegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188895 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 09:04:20 +00:00
Richard Sandiford
d954716e75 [SystemZ] Add FI[EDX]BRA
These are extensions of the existing FI[EDX]BR instructions, but use a spare
bit to suppress inexact conditions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 08:58:08 +00:00
Daniel Sanders
099e5328fc [mips][msa] Define registers using foreach
No functional change


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188893 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 08:48:25 +00:00
Ahmed Bougacha
171ac8ca17 MC CFG: Add YAML MCModule representation to enable MC CFG testing.
Like yaml ObjectFiles, this will be very useful for testing the MC CFG
implementation (mostly MCObjectDisassembler), by matching the output
with YAML, and for potential users of the MC CFG, by using it as an input.

There isn't much to the actual format, it is just a serialization of the
MCModule class. Of note:
  - Basic block references (pred/succ, ..) are represented by the BB's
    start address.
  - Just as in the MC CFG, instructions are MCInsts with a size.
  - Operands have a prefix representing the type (only register and
    immediate supported here).
  - Instruction opcodes are represented by their names; enum values aren't
    stable, enum names mostly are: usually, a change to a name would need
    lots of changes in the backend anyway.
    Same with registers.

All in all, an example is better than 1000 words, here goes:

A simple binary:

  Disassembly of section __TEXT,__text:
  _main:
  100000f9c:      48 8b 46 08             movq    8(%rsi), %rax
  100000fa0:      0f be 00                movsbl  (%rax), %eax
  100000fa3:      3b 04 25 48 00 00 00    cmpl    72, %eax
  100000faa:      0f 8c 07 00 00 00       jl      7 <.Lend>
  100000fb0:      2b 04 25 48 00 00 00    subl    72, %eax
  .Lend:
  100000fb7:      c3                      ret

And the (pretty verbose) generated YAML:

  ---
  Atoms:
    - StartAddress:    0x0000000100000F9C
      Size:            20
      Type:            Text
      Content:
        - Inst:            MOV64rm
          Size:            4
          Ops:             [ RRAX, RRSI, I1, R, I8, R ]
        - Inst:            MOVSX32rm8
          Size:            3
          Ops:             [ REAX, RRAX, I1, R, I0, R ]
        - Inst:            CMP32rm
          Size:            7
          Ops:             [ REAX, R, I1, R, I72, R ]
        - Inst:            JL_4
          Size:            6
          Ops:             [ I7 ]
    - StartAddress:    0x0000000100000FB0
      Size:            7
      Type:            Text
      Content:
        - Inst:            SUB32rm
          Size:            7
          Ops:             [ REAX, REAX, R, I1, R, I72, R ]
    - StartAddress:    0x0000000100000FB7
      Size:            1
      Type:            Text
      Content:
        - Inst:            RET
          Size:            1
          Ops:             [  ]
  Functions:
    - Name:            __text
      BasicBlocks:
        - Address:         0x0000000100000F9C
          Preds:           [  ]
          Succs:           [ 0x0000000100000FB7, 0x0000000100000FB0 ]
     <snip>
  ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188890 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:29:02 +00:00
Ahmed Bougacha
f176482752 MC CFG: Support disassembly at arbitrary addresses in MCObjectDisassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188889 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:55 +00:00
Ahmed Bougacha
05a81020d9 MC CFG: Use data structures more appropriate than std::set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:51 +00:00
Ahmed Bougacha
0f4a5ba24e MC CFG: Add an MCObjectSymbolizer in the MCObjectDisassembler.
Used to detect calls to function symbol stubs (future commit).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188887 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:48 +00:00
Ahmed Bougacha
0e83b90283 MC CFG: Add MCObjectDisassembler Mach-O implementation.
Supports:
- entrypoint, using LC_MAIN.
- static ctors/dtors, using __mod_{init,exit}_func
- translation between effective and object load address, using
  dyld's VM address slide.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188886 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:44 +00:00
Ahmed Bougacha
fe018c4145 Add Mach-O entry_point_command declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188885 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:40 +00:00
Ahmed Bougacha
484a6eb9cc MC CFG: Add "dynamic disassembly" support to MCObjectDisassembler.
It can now disassemble code in situations where the effective load
address is different than the load address declared in the object file.
This happens for PIC, hence "dynamic".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188884 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:37 +00:00
Ahmed Bougacha
46937278fa MC CFG: When disassembly is impossible, fallback to data bytes.
This is the behavior of sequential disassemblers (llvm-objdump, ...),
when there is no instruction size hint (fixed-length, ...)

While there, also do some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188883 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:32 +00:00
Ahmed Bougacha
0a30cccd49 MC CFG: Add MCObjectDisassembler support for entrypoint + static ctors.
For now, this isn't implemented for any format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188882 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:29 +00:00
Ahmed Bougacha
aeb2bbcb6d MC CFG: Split MCBasicBlocks to mirror atom splitting.
When an MCTextAtom is split, all MCBasicBlocks backed by it are
automatically split, with a fallthrough between both blocks, and
the successors moved to the second block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:24 +00:00
Ahmed Bougacha
46d353f8e8 MC CFG: Add a few needed methods, mainly MCModule::findFirstAtomAfter.
While there, do some minor cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188880 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:17 +00:00
Ahmed Bougacha
9bfc0626c0 MC: ObjectSymbolizer can now recognize external function stubs.
Only implemented in the Mach-O ObjectSymbolizer.
The testcase sadly introduces a new binary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188879 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:13 +00:00
Ahmed Bougacha
cdef37a9d8 MC: Refactor ObjectSymbolizer to make relocation/section info generation lazy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188878 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:07 +00:00
Ahmed Bougacha
07e8f8f643 MC CFG: Add entrypoint address to MCModule.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188877 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:28:02 +00:00
Ahmed Bougacha
f9e2348e94 MC CFG: Add more MCFunction container methods (find, empty).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188876 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:27:59 +00:00
Ahmed Bougacha
7dac32d07d MC CFG: Keep pointer to parent MCModule in created MCFunctions.
Also, drive-by cleaning around createFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188875 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:27:55 +00:00
Ahmed Bougacha
dca54eab53 MC CFG: Don't insert preds/succs again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188874 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:27:50 +00:00
Ahmed Bougacha
3ec498faad MC CFG: Remap enough for the inserted instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188873 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:27:47 +00:00
Ahmed Bougacha
e0511ded94 MC CFG: uint64_t -> size_t for vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188872 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:27:44 +00:00
Ahmed Bougacha
73260db46b MC CFG: Add a getter for MCDataAtom's data array.
While there, switch to new-style documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188871 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 07:27:40 +00:00
David Majnemer
d7d43dc435 DebugInfo: Do not use the DWARF Version for the .debug_pubnames or .debug_pubtypes version field
Summary:
LLVM would generate DWARF with version 3 in the .debug_pubname and
.debug_pubtypes version fields.  This would lead SGI dwarfdump to fail
parsing the DWARF with (in the instance of .debug_pubnames) would exit
with:
dwarfdump ERROR:  dwarf_get_globals: DW_DLE_PUBNAMES_VERSION_ERROR (123)

This fixes PR16950.

Reviewers: echristo, dblaikie

Reviewed By: echristo

CC: cfe-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D1454

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188869 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 06:13:34 +00:00
Craig Topper
5bdf397e25 Synchronize VEX JIT encoding code with the MCJIT version. Fix a bug in the MCJIT code where CurOp was being incremented even if the operand it was pointing at wasn't used. Maybe only matters if there are any EVEX_K instructions that aren't VEX_4V.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188868 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 05:57:45 +00:00
Nadav Rotem
ec7b5e9290 In LLVM FMA3 operands are dst, src1, src2, src3, however dst is not encoded as it is always src1. This was causing the encoding of the operands to be off by one.
Patch by Chris Bieneman.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188866 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 05:03:10 +00:00
Nadav Rotem
9397683e62 Add the FMA3 feature in order to test FMA encoding using the old jit.
Patch by Chris Bieneman!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188865 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 05:02:12 +00:00
Craig Topper
33b5fe7f16 Rename mattr names for AVX-512 to from avx-512 -> avx512f, avx-512-pfi -> av512pf, avx-512-cdi -> avx512cd, avx-512-eri->avx512er. This matches better with official docs and what gcc patches appearto be using. I didn't touch the has* functions or the feature flag names to avoid change the td and lowering file while commits are still happening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188859 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 03:57:57 +00:00
NAKAMURA Takumi
d5a2eb0925 X86TargetMachine.cpp: Clarify to emit GOT in i686-{cygming|win32}-elf for mcjit.
I suppose all "lli -use-mcjit i686-*" should require GOT, (and to fail.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188856 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-21 02:37:25 +00:00