6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-10-31 09:11:13 +00:00
Code Issues Projects Releases Wiki Activity
14,592 Commits 39 Branches 0 Tags 277 MiB
91ccc15b45
Commit Graph

14592 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Chris Lattner
91ccc15b45 Instcombine: -(X sdiv C) -> (X sdiv -C), tested by sub.ll:test16 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16769 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 15:08:25 +00:00
Chris Lattner
24c0532f50 New testcase 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16768 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 15:07:56 +00:00
Chris Lattner
09c750f73d Remove debugging code, fix encoding problem. This fixes the problems 
the JIT had last night.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16766 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 14:31:50 +00:00
Nate Begeman
35b020df39 Turning on fsel code gen now that we can do so would be good. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16765 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 11:03:30 +00:00
Nate Begeman
087d5d92f1 Implement floating point select for lt, gt, le, ge using the powerpc fsel 
instruction.

Now, rather than emitting the following loop out of bisect:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f4
	bge .LBB_main_64	; no_exit.0.i
.LBB_main_63:	; no_exit.0.i
	b .LBB_main_65	; no_exit.0.i
.LBB_main_64:	; no_exit.0.i
	fmr f2, f1
.LBB_main_65:	; no_exit.0.i
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f1
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3)
	fcmpu cr0, f1, f5
	bge .LBB_main_67	; no_exit.0.i
.LBB_main_66:	; no_exit.0.i
	b .LBB_main_68	; no_exit.0.i
.LBB_main_67:	; no_exit.0.i
	fmr f4, f1
.LBB_main_68:	; no_exit.0.i
	fadd f1, f2, f4
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fcmpu cr0, f4, f0
	bgt .LBB_main_70	; no_exit.0.i
.LBB_main_69:	; no_exit.0.i
	b .LBB_main_71	; no_exit.0.i
.LBB_main_70:	; no_exit.0.i
	fmr f0, f4
.LBB_main_71:	; no_exit.0.i
	fsub f1, f2, f1
	addi r2, r2, -1
	fcmpu cr0, f1, f3
	blt .LBB_main_73	; no_exit.0.i
.LBB_main_72:	; no_exit.0.i
	b .LBB_main_74	; no_exit.0.i
.LBB_main_73:	; no_exit.0.i
	fmr f3, f1
.LBB_main_74:	; no_exit.0.i
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i

We emit this instead:
.LBB_main_19:	; no_exit.0.i
	rlwinm r3, r2, 3, 0, 28
	lfdx f1, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f2, f2, f1
	fsel f1, f1, f1, f2
	addi r3, r2, 1
	rlwinm r3, r3, 3, 0, 28
	lfdx f2, r3, r27
	addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
	lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
	fsub f4, f4, f2
	fsel f2, f2, f2, f4
	fadd f1, f1, f2
	addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
	lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
	fmul f1, f1, f2
	rlwinm r3, r2, 3, 0, 28
	lfdx f2, r3, r28
	fadd f4, f2, f1
	fsub f5, f0, f4
	fsel f0, f5, f0, f4
	fsub f1, f2, f1
	addi r2, r2, -1
	fsub f2, f1, f3
	fsel f3, f2, f3, f1
	cmpwi cr0, r2, -1
	fmr f16, f0
	fmr f17, f3
	bgt .LBB_main_19	; no_exit.0.i


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16764 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 09:53:04 +00:00
Chris Lattner
2483f67914 Codegen signed mod by 2 or -2 more efficiently. Instead of generating: 
t:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 2
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        mov %EAX, %EDX
        ret

Generate:
t:
        mov %ECX, DWORD PTR [%ESP + 4]
***     mov %EAX, %ECX
        cdq
        and %ECX, 1
        xor %ECX, %EDX
        sub %ECX, %EDX
***     mov %EAX, %ECX
        ret

Note that the two marked moves are redundant, and should be eliminated by the
register allocator, but aren't.

Compare this to GCC, which generates:

t:
        mov     %eax, DWORD PTR [%esp+4]
        mov     %edx, %eax
        shr     %edx, 31
        lea     %ecx, [%edx+%eax]
        and     %ecx, -2
        sub     %eax, %ecx
        ret

or ICC 8.0, which generates:

t:
        movl      4(%esp), %ecx                                 #3.5
        movl      $-2147483647, %eax                            #3.25
        imull     %ecx                                          #3.25
        movl      %ecx, %eax                                    #3.25
        sarl      $31, %eax                                     #3.25
        addl      %ecx, %edx                                    #3.25
        subl      %edx, %eax                                    #3.25
        addl      %eax, %eax                                    #3.25
        negl      %eax                                          #3.25
        subl      %eax, %ecx                                    #3.25
        movl      %ecx, %eax                                    #3.25
        ret                                                     #3.25

We would be in great shape if not for the moves.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16763 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 05:01:07 +00:00
Chris Lattner
60e667485e Really fix FreeBSD, which apparently doesn't tolerate the extern. 
Thanks to Jeff Cohen for pointing out my goof.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16762 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:21:52 +00:00
Chris Lattner
3ffdff6448 Fix a scary bug with signed division by a power of two. We used to generate: 
s:   ;; X / 4
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 2
        ret

When we really meant:

s:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 1
        shr %ECX, 30
        add %EAX, %ECX
        sar %EAX, 2
        ret

Hey, this also reduces register pressure too :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16761 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:19:43 +00:00
Chris Lattner
610f1e2785 Codegen signed divides by 2 and -2 more efficiently. In particular 
instead of:

s:   ;; X / 2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        ret

t:   ;; X / -2
        movl 4(%esp), %eax
        movl %eax, %ecx
        shrl $31, %ecx
        movl %eax, %edx
        addl %ecx, %edx
        sarl $1, %eax
        negl %eax
        ret

Emit:

s:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        ret

t:
        movl 4(%esp), %eax
        cmpl $-2147483648, %eax
        sbbl $-1, %eax
        sarl $1, %eax
        negl %eax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16760 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:02:39 +00:00
Chris Lattner
d93d3b047c Add some new instructions. Fix the asm string for sbb32rr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 04:01:02 +00:00
Chris Lattner
c3e903fe65 Reduce code growth implied by the tail duplication pass by not duplicating 
an instruction if it can be hoisted to a common dominator of the block.
This implements: test/Regression/Transforms/TailDup/MergeTest.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16758 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 03:27:37 +00:00
Chris Lattner
fe386c4759 When tail duplicating these functions, the add instruction should not be 
duplicated, even though the block it is in is duplicated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16757 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 03:26:38 +00:00
Chris Lattner
523001f1bb FreeBSD uses GCC. Patch contributed by Jeff Cohen! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16756 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 03:15:44 +00:00
Chris Lattner
37874058f4 Fix the path to the fixinc'd headers. Patch contributed by Jeff Cohen! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16755 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-06 03:13:47 +00:00
Brian Gaeke
e789a6bfff Must include sys/stat.h before declaring a 'struct stat' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16728 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 18:46:59 +00:00
Brian Gaeke
0c50bc4cc2 Build BFtoLLVM example front-end by default 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16719 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 18:05:53 +00:00
Brian Gaeke
ddc1aaad5c Add BFtoLLVM example front end 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16714 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 18:05:25 +00:00
Chris Lattner
d4984cca0e Make sure the const bit gets inherited correctly when linking declarations 
of disagreeing constness.  This fixes
test/Regression/Linker/ConstantGlobals[123].ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16692 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 02:28:11 +00:00
Chris Lattner
5e4f2991a0 Another testcase for constness linkage 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16691 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 02:16:01 +00:00
Chris Lattner
b2bf71334e Testcase to ensure that the 'constant' flag follows the definition when there 
is a question.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16690 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 02:12:20 +00:00
Reid Spencer
f348ccca80 Adjust sys/stat.h inclusion so its only for SunOS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16686 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 00:56:46 +00:00
Tanya Lattner
c5a0bbfbeb Added a couple of includes to get this to compile on Sparc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16685 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 00:51:26 +00:00
Chris Lattner
341e1dad1b Solaris doesn't have MAP_FILE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16682 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 00:46:21 +00:00
Chris Lattner
e4421b4e25 Bug fixed 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16671 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 00:23:02 +00:00
Chris Lattner
cbd141fa33 New testcase for PR450 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16670 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-05 00:18:21 +00:00
Reid Spencer
0d98aede69 Add checks for the ZLIB and BZIP2 header files, not just the libraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16669 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 22:05:53 +00:00
Chris Lattner
c441f1e1c7 Fix #include flavor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16658 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 18:10:18 +00:00
Reid Spencer
5cb99fbd67 Move the warning about no compression library down to the bottom, away 
from the fray, so it gets noticed. This commit is made without the
corresponding configure script commit because it doesn't affect
functionality and we don't want to force everyone into another reconfigure


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16657 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 18:02:55 +00:00
Reid Spencer
94926f0106 Fix typo in makefile variable name that prevents zlib from being recognized 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16656 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 17:49:19 +00:00
Reid Spencer
0fd3061a28 Add HAVE_BZIP2 and HAVE_ZLIB 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16655 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 17:48:37 +00:00
Reid Spencer
047c009394 Excise the ill-advised RLCOMP compression algorithm and simply leave the 
previously temporary NULLCOMP implementation that merely copies the data
verbatim without compression. Also, don't warn if there's no compression
library as that is taken care of during configuration time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16654 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 17:45:44 +00:00
Misha Brukman
b8cbd9f39e Add example 'abstract' architectures for LLI: MIX, MMIX, and DLX 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16653 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 17:36:35 +00:00
Reid Spencer
469c34bdeb Add a context for the callback so different compression scenarios can be 
distinguished. Tidy up documentation.  Thanks, Chris.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16652 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 17:29:25 +00:00
Reid Spencer
ce4e6ade3e Minor corrections suggested by Chris' ever-watchful eye. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16651 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 17:26:26 +00:00
Chris Lattner
ebe989c491 Fix build if not HAVE_BZIP2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16650 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 16:33:25 +00:00
Reid Spencer
9737492204 First version of the MappedFile abstraction for operating system idependent 
mapping of files. This first version uses mmap where its available. The
class needs to implement an alternate mechanism based on malloc'd memory
and file reading/writing for platforms without virtual memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16649 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 11:08:32 +00:00
Reid Spencer
460eb63612 First version of a support utility to provide generalized compression in 
LLVM that handles availability and unavailability of bzip2 and zlib.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16648 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 10:49:41 +00:00
Chris Lattner
955f09666d * Prune #includes 
* Update comments
* Rearrange code a bit
* Finally ELIMINATE the GAS workaround emitter for Intel mode.  woot!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16647 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:31:08 +00:00
Chris Lattner
ac5701c562 Add support for emitting AT&T style .s files, and make it the default. Users 
may now choose their output format with the -x86-asm-syntax={intel|att} flag.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16646 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:24:48 +00:00
Chris Lattner
8f99eff156 Convert some missed patterns to support AT&T style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16645 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:23:07 +00:00
Chris Lattner
10f873b420 Apparently the GNU assembler has a HUGE hack to be compatible with really 
old and broken AT&T syntax assemblers.  The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16644 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:08:46 +00:00
Reid Spencer
37130d2b5e Provide support for auto-detection and use of compression libraries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16643 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 07:05:07 +00:00
Chris Lattner
ac6a47588b Fix incorrect suffix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16642 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 05:20:16 +00:00
Chris Lattner
707c6fe3ad Fix some more missed suffixes and swapped operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16641 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 01:38:10 +00:00
Chris Lattner
60c715c9a2 Add missing suffixes to FP instructions for AT&T mode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16640 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-04 00:43:31 +00:00
Chris Lattner
9a3e49a1b3 Add support for the -x86-asm-syntax flag, which can be used to choose between 
Intel and AT&T style assembly language.  The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16639 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 20:36:57 +00:00
Chris Lattner
3a173dfc72 Add support to the instruction patterns for AT&T style output, which will 
hopefully lead to the death of the 'GasBugWorkaroundEmitter'.  This also
includes changes to wrap the whole file to 80 columns! Woot! :)

Note that the AT&T style output has not been tested at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16638 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 20:35:00 +00:00
Chris Lattner
953c6fe112 Correctly parse variant notation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16637 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 20:19:02 +00:00
Chris Lattner
560a79f1ea Add initial support for variants. This just parses the new format, no 
functionality is added


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16636 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 19:34:31 +00:00
Chris Lattner
0fa206615a Add initial support for variants 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16635 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-10-03 19:34:18 +00:00