Commit Graph

108537 Commits

Author SHA1 Message Date
Chandler Carruth
91ea3e41ae [x86] Adjust the patterns for lowering X86vzmovl nodes which don't
perform a load to use blendps rather than movss when it is available.

For non-loads, blendps is *much* faster. It can execute on two ports in
Sandy Bridge and Ivy Bridge, and *three* ports on Haswell. This fixes
one of the "regressions" from aggressively taking the "insertion" path
in the new vector shuffle lowering.

This does highlight one problem with blendps -- it isn't commuted as
heavily as it should be. That's future work though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219022 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 21:38:49 +00:00
Jonathan Roelofs
69ee7cb4c3 Fix typo in TableGen documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:46:05 +00:00
Sid Manning
4cd443ac18 Add unit tests to verify Hexagon emission.
Add the test cases I overlooked, part of the original commit,
http://reviews.llvm.org/D5523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219016 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:33:03 +00:00
Adrian Prantl
17dfc381ef Add a reference to Phabricator.rst to docs/index.rst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219015 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:17:32 +00:00
Richard Smith
2451e5b581 PR21145: Teach LLVM about C++14 sized deallocation functions.
C++14 adds new builtin signatures for 'operator delete'. This change allows
new/delete pairs to be removed in C++14 onwards, as they were in C++11 and
before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219014 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:17:06 +00:00
Duncan P. N. Exon Smith
83902832de Revert "Revert "DI: Fold constant arguments into a single MDString""
This reverts commit r218918, effectively reapplying r218914 after fixing
an Ocaml bindings test and an Asan crash.  The root cause of the latter
was a tightened-up check in `DILexicalBlock::Verify()`, so I'll file a
PR to investigate who requires the loose check (and why).

Original commit message follows.

--

This patch addresses the first stage of PR17891 by folding constant
arguments together into a single MDString.  Integers are stringified and
a `\0` character is used as a separator.

Part of PR17891.

Note: I've attached my testcases upgrade scripts to the PR.  If I've
just broken your out-of-tree testcases, they might help.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219010 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:01:09 +00:00
Adam Nemet
726942c8bb [ISel] Keep matching state consistent when folding during X86 address match
In the X86 backend, matching an address is initiated by the 'addr' complex
pattern and its friends.  During this process we may reassociate and-of-shift
into shift-of-and (FoldMaskedShiftToScaledMask) to allow folding of the
shift into the scale of the address.

However as demonstrated by the testcase, this can trigger CSE of not only the
shift and the AND which the code is prepared for but also the underlying load
node.  In the testcase this node is sitting in the RecordedNode and MatchScope
data structures of the matcher and becomes a deleted node upon CSE.  Returning
from the complex pattern function, we try to access it again hitting an assert
because the node is no longer a load even though this was checked before.

Now obviously changing the DAG this late is bending the rules but I think it
makes sense somewhat.  Outside of addresses we prefer and-of-shift because it
may lead to smaller immediates (FoldMaskAndShiftToScale is an even better
example because it create a non-canonical node).  We currently don't recognize
addresses during DAGCombiner where arguably this canonicalization should be
performed.  On the other hand, having this in the matcher allows us to cover
all the cases where an address can be used in an instruction.

I've also talked a little bit to Dan Gohman on llvm-dev who added the RAUW for
the new shift node in FoldMaskedShiftToScaledMask.  This RAUW is responsible
for initiating the recursive CSE on users
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-September/076903.html) but it
is not strictly necessary since the shift is hooked into the visited user.  Of
course it's safer to keep the DAG consistent at all times (e.g. for accurate
number of uses, etc.).

So rather than changing the fundamentals, I've decided to continue along the
previous patches and detect the CSE.  This patch installs a very targeted
DAGUpdateListener for the duration of a complex-pattern match and updates the
matching state accordingly.  (Previous patches used HandleSDNode to detect the
CSE but that's not practical here).  The listener is only installed on X86.

I tested that there is no measurable overhead due to this while running
through the spec2k BC files with llc.  The only thing we pay for is the
creation of the listener.  The callback never ever triggers in spec2k since
this is a corner case.

Fixes rdar://problem/18206171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:00:34 +00:00
Tom Stellard
77859c9e9c R600: Align functions to 256 bytes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219002 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 19:02:02 +00:00
Benjamin Kramer
63688e622c Eliminate some deep std::vector copies. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218999 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:33:16 +00:00
Benjamin Kramer
3c5eaffc07 MCParser: Modernize memory handling.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218998 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:32:55 +00:00
Robin Morisset
83e571e7ba [Power] Delete redundant test Atomics-32.ll
The test Atomics-32.ll was both redundant (all operations are also checked by
atomics.ll at least) and not actually checking correctness (it was not using
FileCheck, just verifying that the compiler does not crash).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218997 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:10:07 +00:00
Rui Ueyama
a6abd9e176 llvm-readobj: print out the fields of the COFF delay-import table
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:07:18 +00:00
Robin Morisset
8e2b2ae80e [Power] Use lwsync for non-seq_cst fences
Summary:
hwsync is only required for seq_cst fences, acquire and release one can use
the cheaper lwsync.

Test Plan: Added some cases to atomics.ll + make check-all

Reviewers: jfb, wschmidt

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218995 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:04:36 +00:00
Hans Wennborg
d8af735ca7 MipsAsmParser.cpp: fix VS2012 build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 17:16:24 +00:00
Hans Wennborg
8651aece06 HexagonMCCodeEmitter.h: deleted member functions are not supported in VS2012
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218990 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 17:02:28 +00:00
Daniel Sanders
61bc405795 [mips] Print warning when using register names not available in N32/64
Summary:
The register names t4-t7 are not available in the N32 and N64 ABIs.
This patch prints a warning, when those names are used in N32/64,
along with a fix-it with the correct register names.

Patch by Vasileios Kalintiris

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5272


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 15:37:37 +00:00
Sid Manning
c4d113192d Fix build break on Hexagon
Differential Revision: http://reviews.llvm.org/D5600

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218987 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 13:59:01 +00:00
Sid Manning
30d67d99cf Adding skeleton for unit testing Hexagon Code Emission
Adding and modifying CMakeLists.txt files to run unit tests under
unittests/Target/* if the directory exists.  Adding basic unit test to check
that code emitter object can be retrieved.

Differential Revision: http://reviews.llvm.org/D5523
Change by: Colin LeMahieu

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 13:18:11 +00:00
Chandler Carruth
dce98e6739 [x86] Teach the new vector shuffle lowering to aggressively form MOVSS
and MOVSD nodes for single element vector inserts.

This is particularly important because a number of patterns in the
backend detect these patterns and leverage them to simplify things. It
also fixes quite a few of the insertion bad code examples. However, it
regresses a specific area: when available, blendps and blendpd are
*dramatically* faster than movss and movsd respectively. But it doesn't
really work to form the blend logic first because the blends *aren't* as
crazy efficient when the data is coming from memory anyways, and thus
will have a movss or movsd regardless. Also, doing that would block
a bunch of the patterns that this is designed to hit.

So my plan is to go into the patterns for lowering MOVSS and MOVSD and
lower them via blends when available. However that's a pretty invasive
restructuring so it will need to be a follow-up patch.

I have already gone into the patterns to lower MOVSS and MOVSD from
memory using MOVLPD, etc. Without that, several of the test cases
I already have regress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218985 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 13:11:13 +00:00
Dan Liew
ea01fda5b3 [sphinx cleanup] Fix unexpected indentation warning introduced by r218937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218982 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 12:28:48 +00:00
Renato Golin
b157cb7afd Revert 202433 - Provide a target override for the latest regalloc heuristic
That commit was introduced in order to help investigate a problem in ARM
codegen breaking from commit 202304 (Add a limit to the heuristic that register
allocates instructions in local order). Recent analisys indicated that the
problem no longer exists, so I'm reverting this change.

See PR18996.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218981 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 12:20:53 +00:00
Chandler Carruth
7ae6f2abf6 [x86] Refactor the element insertion logic in the new vector shuffle
lowering to handle the potential mirroring of 2-element vectors (because
we can't reliably sort them one way) in the caller rather than in the
insertion logic.

This will simplify things considerably as more ways to fail to match the
insertion are added because now we have a nice try and retry point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218980 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 12:01:55 +00:00
Alexander Musman
0cd2a891d8 Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218979 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:55:31 +00:00
Chandler Carruth
f6fb5f4f2e [x86] Fix the RUN-lines of this test to make sense.
I got them quite wrong when updating it and had the SSE4.1 run checked
for SSE2 and the SSE2 run checked for SSE4.1. I think everything was
actually generic SSE, but this still seems good to fix. While here,
hoist the triple into the IR and make the flag set a bit more direct in
what it is trying to test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218978 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:30:02 +00:00
Chandler Carruth
01b3858e66 [x86] Significantly improve the ability of the new vector shuffle
lowering to match VZEXT_MOVL patterns.

I hadn't realized that these had sufficient pattern smarts in the
backend to lower zext-ing from the low element of a vector without it
being a scalar_to_vector node. They do, and this is how to match a bunch
of patterns for movq, movss, etc.

There is a weird propensity to end up using pshufd to place the element
afterward even though it means domain crossing (or rather, to use
xorps+movss to zext the element rather than movq) but that's an
orthogonal problem with VZEXT_MOVL that someone should probably look at.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218977 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:25:58 +00:00
Chandler Carruth
ca77e58993 [x86] Add some important, missing test coverage for blending from one
vector to a zero vector for the v2 cases and fix the v4 integer cases to
actually blend from a vector.

There are already seprate tests for the case of inserting from a scalar.

These cases cover a lot of the regressions I've seen in the regression
test suite for the new vector shuffle lowering and specifically cover
the reported lack of using various zext-ing instruction patterns. My
next patch should fix a big chunk of this, but wanted to get a nice
baseline for these patterns in the test cases first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218976 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:16:45 +00:00
Chandler Carruth
53bf81ae59 [x86] Unbreak SSE1 with the new vector shuffle lowering. We can't widen
element types to form illegal vector types.

I've added a special SSE1 test case here that makes sure we don't break
this going forward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218974 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 10:11:39 +00:00
Chandler Carruth
558e368ba5 [x86] Add two more triples to stabilize the precise assembly syntax
across platforms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218973 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 09:43:23 +00:00
Chandler Carruth
7e26571a69 [x86] Remove a couple of fairly pointless tests. These were merely
testing that we generated divps and divss but not in a very systematic
way. There are other tests for widening binary operations already that
make these unnecessary.

The second one seems mostly about testing Atom as well as normal X86,
but despite the comment claiming it is testing a different instruction
sequence, it then tests for exactly the same div instruction sequence!
(The sequence of instructions is actually quite different on Atom, but
not the sequence of div instructions....)

And then it has an "execution" test that simply isn't run? Very strange.
Anyways, none of this is really needed so clean this up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218972 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 09:43:19 +00:00
James Molloy
c75d43e0c0 Revert r215343.
This was contentious and needs invesigation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218971 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 09:29:24 +00:00
Daniel Sanders
4643143a65 [mips] Remove XFAIL from two XPASS'ing tests on the llvm-mips-linux builder
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218967 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 08:49:44 +00:00
Chandler Carruth
988acb6d1b [x86] Add another triple to a test to make the comment syntax stable.
Should fix darwin builders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218956 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 02:06:28 +00:00
Chandler Carruth
67a869d5e7 [x86] Add triples to these tests so that we see fewer calling convention
differences and they're a bit easier to maintain. This should fix the
tests on cygwin bots, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 02:00:09 +00:00
Chandler Carruth
2470f448ac [x86] Regenerate precise FileCheck lines for the lats batch of test
cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218954 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:57:38 +00:00
Chandler Carruth
174121596e [x86] Remove another low-value test still written using grep. We have
many tests for movss and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:57:35 +00:00
Chandler Carruth
1756cdf120 [x86] Regenerate precise checks for a couple of test cases and remove
a test case that was just grepping the debug stats output rather than
actually checking the generated code for anything useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218951 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:50:08 +00:00
Chandler Carruth
076ca3b6da [x86] Remove an over-reduced test case. This would need to be
intergrated much more fully into some logical part of the backend to
really understand what it is trying to accomplish and how to update it.
I suspect it no longer holds enough value to be worth having.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218950 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:50:06 +00:00
Chandler Carruth
4d6f14c9e3 [x86] Regenerate and clean up more tests is preparation for vector
shufle switch.

I nuked a win64 config from one test as it doesn't really make sense to
cover that ABI specially for generic v2f32 tests...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218948 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:44:04 +00:00
Chandler Carruth
2ce5aac548 [x86] Cleanup and generate precise FileCheck assertions for a bunch of
SSE tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218947 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:37:58 +00:00
Chandler Carruth
9e7173e74d [x86] This is a terrible SSE1 test, but we should keep it. I've deleted
two functions that really didn't have any interesting assertions, and
generated more precise tests for one of the others.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218946 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:37:56 +00:00
Chandler Carruth
9a7125399b [x86] Merge two very similar tests and regenerate FileCheck lines for
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218945 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:37:53 +00:00
Lang Hames
07c5f89fa1 [BasicAA] Revert r218714 - Make better use of zext and sign information.
This patch broke 447.dealII on Darwin. I'm currently working on a reduced
test-case, but reverting for now to keep the bots happy.

<rdar://problem/18530107>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218944 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:33:47 +00:00
Chandler Carruth
ea3d31f580 [x86] Regenerate a number of FileCheck assertions with my script for
test cases that will change with the new vector shuffle lowering. This
gives us a nice baseline for deltas against. I've checked and removed
the cases where there were weird register usage being pinned down, and
all of these are extremely pin-pointed tests so fully checking them
seems very appropriate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218941 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:06:32 +00:00
Chandler Carruth
f71a17d0c6 [x86] Remove a couple of other overly isolated tests that are low-value
at this point. We have lots of tests of peephole optimizations with
insert and extract on vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218940 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:06:30 +00:00
Chandler Carruth
95c5e556fc [x86] Remove a test that provides little value. There are plenty of
tests for zext of a vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218939 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:06:27 +00:00
Robin Morisset
6f6512cba2 Update Atomics.rst
Summary:
I changed various bits of the compilation of atomics recently, and forgot
updating the documentation. This patch just brings it up to date.

Test Plan: no change to the code

Reviewers: jfb

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218937 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 01:04:20 +00:00
Chandler Carruth
b534439b8d [x86] Regenerate a bunch more avx512 test cases using my script to have
tighter, more strict FileCheck assertions. Some of these I really like
as they show case exactly what instruction sequences come out of these
microscopic functionality tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218936 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 00:50:03 +00:00
Chandler Carruth
77e97ffd61 [x86] Regenerate an avx512 test with my script to provide a nice
baseline for updates from the new vector shuffle lowering.

I've inspected the results here, and I couldn't find any register
allocation decisions where there should be any realistic way to register
allocate things differently. The closest was the imul test case. If you
see something here you'd like register number variables on, just shout
and I'll add them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218935 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 00:44:46 +00:00
Eric Christopher
8f09464bc9 constify TargetMachine parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218934 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 00:42:41 +00:00
Rui Ueyama
820664686a llvm-readobj: print COFF delay-load import table
This patch adds another iterator to access the delay-load import table
and use it from llvm-readobj.

http://reviews.llvm.org/D5594



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218933 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 00:41:58 +00:00