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Author SHA1 Message Date
Chris Lattner
92b416f64e Add a note about sext from i1 plus flags use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47278 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 18:30:13 +00:00
Dan Gohman
339ffedca9 Don't mark scalar integer multiplication as Expand on x86, since x86 
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.

This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47277 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-18 17:55:26 +00:00
Chris Lattner
456012c72e move PR2053 to here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47237 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-17 19:43:57 +00:00
Andrew Lenharth
d497d9fab6 I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47213 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-16 14:46:26 +00:00
Andrew Lenharth
22c5c1b2df llvm.memory.barrier, and impl for x86 and alpha 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47204 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-16 01:24:58 +00:00
Chris Lattner
ec321b4d64 Handle \n's in value names for more targets. The asm printers 
really really really need refactoring :(



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47171 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 19:04:54 +00:00
Chris Lattner
3502d0dac3 If the llvm name contains an unprintable character, don't print it in 
the global comment.  This prevents printing things like:

...  # foo
bar

when the name is "foo\nbar".



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47170 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 18:56:05 +00:00
Dale Johannesen
ab1a0354ec Remove warning about 64-bit code on processor 
that doesn't support it.  Per Chris.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47162 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 18:09:51 +00:00
Dale Johannesen
b4c9a687eb nocona, core2 and penryn support 64 bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47149 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-15 01:22:41 +00:00
Duncan Sands
00fee65fd2 In TargetLowering::LowerCallTo, don't assert that 
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47122 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 17:28:50 +00:00
Nate Begeman
e179584f9b Change how FP immediates are handled. 
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47121 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 08:57:00 +00:00
Chris Lattner
eb05f90c71 upgrade some entries, remove stuff that is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47109 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 06:19:02 +00:00
Chris Lattner
ea1cddf546 the mid-level optimizer removes this stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47108 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 05:43:18 +00:00
Chris Lattner
48b4d96949 this one is easy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47107 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 05:41:38 +00:00
Chris Lattner
8b0cb7bcc6 This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47106 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-14 05:39:46 +00:00
Dan Gohman
f4f92f5ebe Assigning an APInt to 0 with plain assignment gives it a one-bit 
size. Initialize these APInts to properly-sized zero values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47099 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 23:07:24 +00:00
Dan Gohman
977a76fbb6 Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits 
to pass the mask APInt by value, not by reference. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47096 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 22:28:48 +00:00
Nicolas Geoffray
afe6c2b001 Enable exception handling int JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47079 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 18:39:37 +00:00
Nate Begeman
b5041b3085 readme updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47051 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 07:06:12 +00:00
Evan Cheng
a4d16a1f0d commuteInstr() can now commute non-ssa machine instrs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47043 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 02:46:49 +00:00
Dan Gohman
fd29e0eb06 Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t. 
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47039 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-13 00:35:47 +00:00
Dale Johannesen
3006c39e3a __DATA not __DATA__ is the right segment name on darwin. 
Spotted by Nick Kledzik.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47037 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 23:35:09 +00:00
Nate Begeman
cdd1eeca2c SSE4.1 64b integer insert/extract pattern support 
Move formats into the formats file


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47035 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 22:51:28 +00:00
Evan Cheng
9f143ce989 Only using x86-64 rip relative addressing in non-staic mode? 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47019 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 19:20:46 +00:00
Evan Cheng
add251754c Update comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47002 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 07:59:55 +00:00
Evan Cheng
5ae45caf79 Unbreak various insert_vector_elt and extract_vector_elt tests in presence of SSE4. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47001 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-12 07:59:45 +00:00
Nate Begeman
14d12caf1d Enable SSE4 codegen and pattern matching. 
Add some notes to the README.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46949 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-11 04:19:36 +00:00
Nate Begeman
ab5d56c6b9 xmm0 variable blends 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46931 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-10 18:47:57 +00:00
Dan Gohman
6f0d024a53 Rename MRegisterInfo to TargetRegisterInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-10 18:45:23 +00:00
Nate Begeman
fea2be50b9 memopv16i8 had wrong alignment requirement, would have broken pabsb 
pabs{b,w,d} are not two address
fix extract-to-mem sse4 ops
add sse4 vector sign extend nodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46915 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-09 23:46:37 +00:00
Nate Begeman
1426d52cab Skeleton of insert and extract matching, more to come 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46902 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-09 01:38:08 +00:00
Evan Cheng
5fd79d0560 It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46893 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 21:20:40 +00:00
Dale Johannesen
0c191872ab 64-bit (MMX) vectors do not need restrictive alignment. 
128-bit vectors need it only when SSE is on.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46890 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 19:48:20 +00:00
Dan Gohman
60783304f6 Avoid needlessly casting away const qualifiers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46877 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 03:29:40 +00:00
Evan Cheng
33663fc104 Added missing entries in X86 load / store folding tables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46866 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-08 00:12:56 +00:00
Dan Gohman
3069b87437 Follow Chris' suggestion; change the PseudoSourceValue accessors 
to return pointers instead of references, since this is always what
is needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46857 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 18:41:25 +00:00
Dan Gohman
4fdad172de Add SourceValue information for outgoing argument stores on x86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46854 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 16:28:05 +00:00
Evan Cheng
be3bf42331 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. 
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46850 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 08:53:49 +00:00
Evan Cheng
15246738f2 In some cases, e.g. ADD32ri, no transformation is made. Guide against it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46849 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-07 08:29:53 +00:00
Dan Gohman
69de1932b3 Re-apply the memory operand changes, with a fix for the static 
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46827 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-06 22:27:42 +00:00
Dale Johannesen
e672af15d6 Implement sseregparm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46764 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-05 20:46:33 +00:00
Evan Cheng
4e3f5a4e9c Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46724 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 23:06:48 +00:00
Nate Begeman
204e84e138 The rest of the SSE4.1 intrinsic patterns that are obvious to me. Getting 
Evan's help with the rest.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46697 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 06:00:24 +00:00
Nate Begeman
2f6f1c02ca Some more SSE 4.1 intrinsic patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46696 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-04 05:34:34 +00:00
Nate Begeman
63ec90a6a8 SSE 4.1 Intrinsics and detection 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46681 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-03 07:18:54 +00:00
Evan Cheng
4eecdeb3fa Get rid of the annoying blank lines before labels. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46667 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 08:39:46 +00:00
Nick Lewycky
916a9f071f Don't use uninitialized values. Fixes vec_align.ll on X86 Linux. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46666 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 08:29:58 +00:00
Evan Cheng
a844bdeab3 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. 
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46659 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 04:07:54 +00:00
Evan Cheng
b8033e821d Frame index can be negative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46655 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-02 00:17:00 +00:00
Evan Cheng
1b08bbca55 Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46635 91177308-0d34-0410-b5e6-96231b3b80d8
 2008-02-01 09:10:45 +00:00