Commit Graph

93764 Commits

Author SHA1 Message Date
Bill Wendling
a37d96a04b The GCDA 402 format won't have a second checksum either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184864 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 18:13:52 +00:00
Ulrich Weigand
5de735a962 [PowerPC] Support @got modifier
Add VK_... values and relocation types necessary to support
the @got family of modifiers.  Used by the asm parser only.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184860 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 16:49:50 +00:00
Rafael Espindola
46fa7cf91a Move GetEXESuffix to the one place it is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184853 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 14:42:30 +00:00
Rafael Espindola
deeb5724b8 Remove sys::PathSeparator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184852 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 14:32:45 +00:00
Aaron Watry
f97c7fef52 R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
By default, we expand these operations for both EG and SI. Move the
duplicated code into a common space for now. If the targets ever actually
implement these operations as instructions, we can override that in the relevant
target.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184848 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:57 +00:00
Aaron Watry
69d3a40298 R600: Add v2i32 test for vselect
Note: Only adding test for evergreen, not SI yet.

When I attempted to expand vselect for SI, I got the following:
llc: /home/awatry/src/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp:522:
llvm::SDValue llvm::DAGTypeLegalizer::PromoteIntRes_SETCC(llvm::SDNode*):
Assertion `SVT.isVector() == N->getOperand(0).getValueType().isVector() &&
"Vector compare must return a vector result!"' failed.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:54 +00:00
Aaron Watry
1842ec4d9f R600/SI: Expand xor v2i32/v4i32
Add test cases for both vector sizes on SI and also add v2i32 test for EG.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184846 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:52 +00:00
Aaron Watry
50c1c9102e R600: Add v2i32 test for setcc on evergreen
No test/expansion for SI has been added yet. Attempts to expand this
operation for SI resulted in a stacktrace in (IIRC) LegalizeIntegerTypes
which was complaining about vector comparisons being required to return
a vector type.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184845 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:49 +00:00
Aaron Watry
41f3db569c R600/SI: Expand urem of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.

Note: I followed the guidance of the v4i32 EG check... UREM produces really
complex code, so let's just check that the instruction was lowered
successfully.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184844 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:46 +00:00
Aaron Watry
e80978f9dd R600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG
Also add lit test for both cases on SI, and v2i32 for evergreen.

Note: I followed the guidance of the v4i32 EG check... UDIV produces really
complex code, so let's just check that the instruction was lowered
successfully.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184843 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:43 +00:00
Aaron Watry
c1fcf01d7f R600/SI: Expand ashr of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184842 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:40 +00:00
Aaron Watry
61de9f83cb R600/SI: Expand srl of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184841 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:37 +00:00
Aaron Watry
60e6dacd1c R600/SI: Expand shl of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184840 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:32 +00:00
Aaron Watry
b8ce77752b R600/SI: Expand or of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184839 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:29 +00:00
Aaron Watry
02ed261f7f R600/SI: Expand mul of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184838 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:26 +00:00
Aaron Watry
e3599ca191 R600/SI: Expand and of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184837 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:55:23 +00:00
Benjamin Kramer
75b5162154 BlockFrequency: Bump up the entry frequency a bit.
This is a band-aid to fix the most severe regressions we're seeing from basing
spill decisions on block frequencies, until we have a better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184835 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:34:40 +00:00
Ulrich Weigand
1bc147c091 [PowerPC] Add extended rotate/shift mnemonics
This adds all missing extended rotate/shift mnemonics to the asm parser.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184834 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:17:41 +00:00
Ulrich Weigand
816c06f7fa [PowerPC] Add rldcr/rldic instructions
This adds pattern for the rldcr and rldic instructions (the last instruction
from the rotate/shift family that were missing).  They are currently used
only by the asm parser.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:17:10 +00:00
Ulrich Weigand
9c52f81e17 [PowerPC] Add extended subtract mnemonics
This adds support for the extended subtract mnemonics to the asm parser:
   subi
   subis
   subic
   subic.
   sub
   sub.
   subc
   subc.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184832 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 13:16:48 +00:00
Justin Holewinski
5df8c1bbb6 [NVPTX] Default pointer type doesn't make sense for getParamSymbol()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184831 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 12:22:21 +00:00
Nadav Rotem
58bf5ea452 Fix a typo in the code that collected the costs recursively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184827 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 05:30:56 +00:00
Rafael Espindola
dd5af27a74 keep only the StringRef version of getFileOrSTDIN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184826 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 05:28:34 +00:00
Rafael Espindola
fa34f42fd6 Don't assume ResultPath is null terminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184824 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 04:23:46 +00:00
Andrew Trick
b2b5dc642c Revert "Temporarily enable MI-Sched on X86."
This reverts commit 98a9b72e8c.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184823 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 02:48:58 +00:00
Tom Stellard
73e44d8ae4 R600/SI: Report unaligned memory accesses as legal for > 32-bit types
In reality, some unaligned memory accesses are legal for 32-bit types and
smaller too, but it all depends on the address space.  Allowing
unaligned loads/stores for > 32-bit types is mainly to prevent the
legalizer from splitting one load into multiple loads of smaller types.

https://bugs.freedesktop.org/show_bug.cgi?id=65873

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184822 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 02:39:35 +00:00
Tom Stellard
d67d029b6d R600: Add support for i32 loads from the constant address space on Cayman
Tested-By: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184821 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 02:39:30 +00:00
Tom Stellard
fa57da12f7 R600/SI: Add support for v4i32 and v4f32 kernel args
Tested-By: Aaron Watry <awatry@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184820 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 02:39:25 +00:00
Tom Stellard
1cb1107c66 R600: Fix typo in R600Schedule.td
This should only make a difference in programs that use a lot of the
vector ALU instructions like BFI_INT and BIT_ALIGN.  There is a slight
improvement in the phatk bitcoin mining kernel with this patch on
Evergreen (vector size == 1):

Before:
1173 Instruction Groups / 9520 dwords

After:
1167 Instruction Groups / 9510 dwords

Reviewed-by: Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184819 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 02:39:20 +00:00
NAKAMURA Takumi
746f7cafb2 PPCAsmParser.cpp: Quote "@l/@ha" in comments. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184809 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 01:14:20 +00:00
Eric Christopher
1baa38147a Add an autoconf option for turning on -gsplit-dwarf by default
when building llvm. This saves quite a bit of time and space when
linking. Please report any problems via bugzilla.

Caveats:

a) This will only work on linux
b) This requires a fairly new binutils
c) This requires a fairly new gdb

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184808 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 01:12:25 +00:00
Rafael Espindola
593fcb56b3 Create a replacement for sys::Path::PathSeparator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184806 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 01:10:36 +00:00
Rafael Espindola
8ba825e2ea Cleanup in unique_file when we only want the name.
This is really ugly, but it is no worse than what we have in clang right now and
it is better to get it working first and clean/optimize it afterwards.

Will be tested from clang in the next patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184802 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 00:49:40 +00:00
Eric Christopher
a619be811c As far as I know no linker needs or wants the -g flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184800 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 00:40:03 +00:00
Eric Christopher
ea64122ec5 Remove all non-linker oriented compile options from the linker
command line. Change the darwin universal binary options to
be TargetCommonOpts so that they'll be passed to the linker since
-arch at least is still needed.

Someone on darwin with a buildit based build should probably verify
that this doesn't break anything there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184793 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 23:20:04 +00:00
Eric Christopher
fdfc81f142 80-column and tab character fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184792 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 23:20:02 +00:00
Eric Christopher
afbe0e266c Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184788 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 21:34:55 +00:00
Adrian Prantl
e06db0c6f8 typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184783 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 21:19:43 +00:00
Eric Christopher
f61dbc1575 Use const references instead of pointers to references that are
never modified. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184781 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 21:07:27 +00:00
Ulrich Weigand
96fb3a25cb [PowerPC] Support some miscellaneous mnemonics in the asm parser
This adds support for the following extended mnemonics:
  xnop
  mr.
  not
  not.
  la



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184767 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 18:08:03 +00:00
Rafael Espindola
89ced61187 Add a simpler version of is_regular_file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184764 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 17:54:24 +00:00
David Blaikie
8de0a465b8 DebugInfo: DIBuilder changes to match DIEnumerator changes in r184694
Representing enumerators by int64 instead of uint64 for now. At some
point we need to address the underlying issue of representation
depending on the specific enumeration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184761 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 17:34:33 +00:00
Chad Rosier
e701431466 Improve diagnostics when getSizeInBits is called on the Other type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184760 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 17:29:51 +00:00
Benjamin Kramer
cf1a3b16c0 PPC: Remove default case from fully covered switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184758 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 17:03:25 +00:00
Ulrich Weigand
329d413199 [PowerPC] Add some FIXMEs
A bunch of extendend mnemomics ought to support '.' forms.
Add FIXMEs to the test case for those.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184757 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 17:00:22 +00:00
Aaron Watry
6c4b8fe9dd R600: Fix spelling error in comment
our -> or

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184756 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 16:57:57 +00:00
Ulrich Weigand
2e8bd89503 [PowerPC] Add predicted forms of branches
This adds support for the predicted forms of branches (+/-).
There are three cases to consider:
- Branches using a PPC::Predicate code
  For these, I've added new PPC::Predicate codes corresponding
  to the BO values for predicted branch forms, and updated insn
  printing to print them correctly.  I've also added new aliases
  for the asm parser matching the new forms.
- bt/bf
  I've added new aliases matching to gBC etc.
- bd(n)z variants
  I've added new instruction patterns for the predicted forms.

In all cases, the new patterns are used for the asm parser only.
(The new infrastructure ought to be sufficient to allow use by
the compiler too at some point.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184754 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 16:52:04 +00:00
NAKAMURA Takumi
a6a3fd6415 Move llvm/test/DebugInfo/arguments.ll to X86, for now. It is still Windows' PECOFF incompatible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184750 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 16:05:21 +00:00
Nadav Rotem
f4b0e81085 Rename the variable to fix a warning. Thanks Andy Gibbs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184749 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 15:59:47 +00:00
Reid Kleckner
dfad9e314e Look for Python 2 before Python 3 in CMakeLists.txt
All of LLVM's Python scripts only support Python 2 for widely understood
reasons.

Patch by Yonggang Luo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184732 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-24 13:21:16 +00:00