Cameron Zwarich
d76773a221
Make CodeGen/PowerPC/2007-09-11-RegCoalescerAssert.ll pass with the verifier.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 03:11:06 +00:00
Cameron Zwarich
0113e4e3f2
Fix PR8828 by removing the explicit def in MovePCToLR as well as the pointless
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piclabel operand. The operand in the tablegen definition doesn't actually turn
into an MI operand, so it just confuses anything checking the TargetInstrDesc
for the number of operands. It suffices to just have an implicit def of LR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:56:28 +00:00
Cameron Zwarich
462b6dc6bf
Reuse the TargetInstrDesc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:56:23 +00:00
Charles Davis
0855bc5b97
Implement the StartProc and EndProc Win64 EH methods on the base MCStreamer.
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Based largely on Rafael Espindola's work on CFI. Other methods soon to follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:49:00 +00:00
Rafael Espindola
216dde91d1
revert 131605 to fix PR9946.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:26:30 +00:00
Cameron Zwarich
21803721d5
Correctly constrain a register class when computing frame offsets, as the Thumb2
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add instruction takes an rGPR. This fixes the last of PR8825.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 02:18:27 +00:00
Cameron Zwarich
6fcb6e454b
Revert r128961 because it didn't include a test and causes the verifier to fail
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on CodeGen/X86/2007-05-07-InvokeSRet.ll. There is probably a bug here that was
fixed by r128961, but since there is no test or reference to a source file I have
to revert it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 01:56:19 +00:00
Eli Friedman
6fd5a6000b
Make the demanded bits/elements optimizations preserve debug line information.
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I'm not sure this is quite ideal, but I can't really think of any better way to do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131616 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 01:20:42 +00:00
Jim Grosbach
c0ceedb6f8
Avoid a Twine that referenced a tmp (which proceded to go out of scope before
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the Twine was used).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131612 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 00:45:05 +00:00
Devang Patel
1f5812bd99
Use IRBuilder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 00:13:33 +00:00
Devang Patel
1aa89a2f91
Use IRBuilder while simplifying unreachable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 00:09:21 +00:00
Rafael Espindola
7205d431f1
Revert my previous patch. The cmake build had already been fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 00:02:45 +00:00
Devang Patel
0b4ccdc98c
Use IRBuilder while simplifying conditional branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131605 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:59:51 +00:00
Eli Friedman
e6f364b6c4
More instcombine cleanup, towards improving debug line info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131604 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:58:37 +00:00
Jim Grosbach
e0b58634a1
Restore sanity to 131601.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131603 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:56:43 +00:00
Rafael Espindola
e37234739e
Fix the cmake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:56:40 +00:00
Jim Grosbach
3ec2c7c3e4
Objective C functions may use a magic '\1' on the name. Handle that when
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dealing with them in the MCJIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131601 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:53:21 +00:00
Eli Friedman
49fcf571da
Shuffle StandardPasses.cpp into VMCore; add it to CMake.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131600 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:51:11 +00:00
Devang Patel
02dd5418d2
Use IRBuilder while simplifying branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:18:47 +00:00
Eli Friedman
22486c9aba
Revert unintentional commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131597 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:13:10 +00:00
Eli Friedman
107ffd58f7
More instcombine simplifications towards better debug locations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131596 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:11:30 +00:00
Cameron Zwarich
631fcbf810
Add missing mayLoad / mayStore flags to instruction definitions without patterns,
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which fixes all of the CodeGen/MBlaze verifier failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131595 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 23:03:10 +00:00
Cameron Zwarich
e4c6445405
Reserve the segment registers on x86 to fix verifier failures in any code that
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uses them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131591 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 22:24:48 +00:00
Charles Davis
8b3e5e5afa
Remove comments as Chris requested.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 22:13:51 +00:00
Cameron Zwarich
20a41cb2b2
Reserve r29 on Alpha. This fixes all verifier failures in CodeGen/Alpha.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:54:32 +00:00
Tanya Lattner
db28247522
Handle perfect shuffle case that generates a vrev for vectors of floats.
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Add test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:44:54 +00:00
Eli Friedman
10a818809d
Third pass at allowing plugins to modify default passes. This time with a tweak so that we don't depend on an uninitialized argument.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:40:04 +00:00
Devang Patel
176ec40cb1
Use IRBuilder while simplifying return instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131580 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:33:11 +00:00
Cameron Zwarich
d36d26d008
Fix an obvious typo in r131572.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131579 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:29:07 +00:00
Cameron Zwarich
955db42568
Fix more of PR8825. Now all of CodeGen/ARM passes with VerifyCoalescing turned on.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131578 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:25:14 +00:00
Dan Gohman
673968ae78
When forming an ICmpZero LSRUse, normalize the non-IV operand
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of the comparison, so that the resulting expression is fully
normalized. This fixes PR9939.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131576 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:02:18 +00:00
Charles Davis
f07090134d
Add some more Win64 EH directives:
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- StartChained and EndChained delimit a chained unwind area, which can contain
additional operations to be undone if an exception occurs inside of it.
- UnwindOnly declares that this function doesn't handle any exceptions. If it
has a handler, it's an unwind handler instead of an exception handler.
- Lsda declares the location and size of the LSDA, which in the Win64 EH
scheme is kept inside the UNWIND_INFO struct. Windows itself ignores the
LSDA; it's used by the Language-Specific Handler (the "Personality Function"
from DWARF).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 20:54:10 +00:00
Devang Patel
b55d924b1e
Spread use of IRBuilder even more.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131571 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 20:53:17 +00:00
Eli Friedman
f9a74cf069
Revert r131556; it's breaking buildbots/clang tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 20:39:27 +00:00
Devang Patel
007349dafd
Use IRBuilder while simplifying switch instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 20:35:38 +00:00
Johnny Chen
a96581f4f7
Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131565 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 20:32:41 +00:00
Devang Patel
d46ba26a6b
Use IRBuilder while simplifying unwind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 20:01:18 +00:00
Chad Rosier
871f664093
Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 19:59:50 +00:00
Eli Friedman
59f15918c2
More instcombine cleanup aimed towards improving debug line info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131559 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 19:57:14 +00:00
David Chisnall
b2a00dca1b
Second pass at allowing plugins to modify default passes. This time without bonus inter-library dependencies.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 19:00:41 +00:00
Evan Cheng
b936e3006f
Revise r131553. Just use the type of the input node and forgo the bitcast. rdar://9449159.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131555 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 18:59:17 +00:00
Evan Cheng
d48fda46f5
Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same type as input. Sorry test cases only trigger when dag combine is disabled. rdar://9449178
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 18:47:27 +00:00
Devang Patel
d3372b85e6
Use IRBuilder while simplifying terminator.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 18:43:31 +00:00
Devang Patel
a23812cfbd
Use IRBuilder while simplifying unconditional branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 18:28:48 +00:00
Devang Patel
f60364de44
Use IRBuilder while folding two entry PHINode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 18:16:44 +00:00
Eli Friedman
976e7e1cc8
Switch more inst insertion in instcombine to IRBuilder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 18:10:28 +00:00
Devang Patel
3e410c6607
Set up IRBuilder for use during simplification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 18:01:27 +00:00
Eli Friedman
1eca76a611
Switch more inst insertion in instcombine to IRBuilder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131544 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 17:58:37 +00:00
Matt Beaumont-Gay
f88ad9aeee
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131543 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 17:37:10 +00:00
Eli Friedman
e87ca454ba
Switch inst insertion in instcombine transform to IRBuilder.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 17:31:55 +00:00
Devang Patel
62fb3556ea
Use IRBuiler while constant folding terminator.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131541 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 17:26:46 +00:00
Stuart Hastings
d116611e0a
Fix inelegant initialization.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131538 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 15:54:26 +00:00
Justin Holewinski
657d1bed23
PTX: add flag to disable mad/fma selection
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Patch by Dan Bailey
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 15:42:23 +00:00
Duncan Sands
d6dde76090
Revert commit 131534 since it seems to have broken several buildbots.
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Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 14:57:56 +00:00
Nadav Rotem
fe3f5d7538
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
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code in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 12:26:38 +00:00
Duncan Sands
7016ec1a45
Now that SrcBits and DestBits always represent the primitive size, rather
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than either the primitive size or the element primitive size (in the case
of vectors), simplify the vector logic. No functionality change. There
is some distracting churn in the patch because I lined up comments better
while there - sorry about that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 10:59:25 +00:00
Duncan Sands
bb1695e333
Tighten up checking of the validity of casts. (1) The IR parser would
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happily accept things like "sext <2 x i32> to <999 x i64>". It would
also accept "sext <2 x i32> to i64", though the verifier would catch
that later. Fixed by having castIsValid check that vector lengths match
except when doing a bitcast. (2) When creating a cast instruction, check
that the cast is valid (this was already done when creating constexpr
casts). While there, replace getScalarSizeInBits (used to allow more
vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable
since vector to vector casts are now handled explicitly by passing to the
element types; i.e. this bit should result in no functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 09:21:57 +00:00
Duncan Sands
117feba971
Teach getCastOpcode about element-by-element vector casts. For example, "trunc"
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can be used to turn a <4 x i64> into a <4 x i32> but getCastOpcode would assert
if you passed these types to it. Note that this strictly extends the previous
functionality: if getCastOpcode previously accepted two vector types (i.e. didn't
assert) then it still will and returns the same opcode (BitCast). That's because
before it would only accept vectors with the same bitwidth, and the new code only
touches vectors with the same length. However if two vectors have both the same
bitwidth and the same length then their element types have the same bitwidth, so
the new logic will return BitCast as before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131530 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 07:13:41 +00:00
Tanya Lattner
2a8eb722c7
In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32.
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Updated test case and reverted change to the PerfectShuffle Table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 06:42:21 +00:00
Charles Davis
0e30f02f44
Implement the Win64 EH directive methods for the assembly language streamer.
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GAS has no such directives (not even mingw-w64 GAS has them), so I took
creative license with their names in assembly. I prefixed them all with
"w64_" to avoid namespace collisions, for example. If I discover that GAS
has taken a different approach, I'll change ours to match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 04:58:05 +00:00
Jakob Stoklund Olesen
54f0d1e021
Eliminate dead dead code elimination code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131524 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 04:51:15 +00:00
Jakob Stoklund Olesen
c6b9ebdd64
Also use shrinkToUses after AdjustCopiesBackFrom().
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The 'last use' may not be in the same basic block, and we still want a correct
live range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131523 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 04:51:12 +00:00
Charles Davis
9c77398d1c
While thinking about how to know where the functions' boundaries are for
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the purposes of the Win64 EH tables, I realized we had no way to tell where
the function ends. (MASM bounds functions with PROC and ENDP keywords.)
Add a directive to delimit the end of the function, and rename the 'frame'
directive to more accurately reflect its duality with the new directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 04:47:22 +00:00
Jakob Stoklund Olesen
fc2fcb4165
Properly shrink live ranges after deleting dead copies. Clean up after all joined copies.
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LiveInterval::shrinkToUses recomputes the live range from scratch instead of
removing snippets. This should avoid the problem with dangling live ranges.
Leave physreg identity copies alone. They can be created when joining a virtreg
with a physreg. They don't affect register allocation, and they will be removed
by the rewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 04:18:19 +00:00
Cameron Zwarich
141ec63962
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131519 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 02:29:50 +00:00
Cameron Zwarich
7d336c0c68
Fix more of PR8825 by correctly using rGPR registers when lowering atomic
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compare-and-swap intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 02:20:07 +00:00
Eli Friedman
ef819d0ed8
Start trying to make InstCombine preserve more debug info. The idea here is to set the debug location on the IRBuilder, which will be then right location in most cases. This should magically give many transformations debug locations, and fixing places which are missing a debug location will usually just means changing the code creating it to use the IRBuilder.
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As an example, the change to InstCombineCalls catches a common case where a call to a bitcast of a function is rewritten.
Chris, does this approach look reasonable?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 01:28:27 +00:00
Eli Friedman
3e22cb9ec3
Use ReplaceInstUsesWith instead of replaceAllUsesWith where appropriate in instcombine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131512 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 00:32:01 +00:00
Devang Patel
d80e8ed2fa
Preseve line numbers while simplifying CFG.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131508 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 23:29:05 +00:00
Cameron Zwarich
d6ffcd88ba
Actually, the address operand of the Thumb2 LDREX / STREX instructions *can*
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take r13, so we can just make it a GPR. This fixes PR8825.
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2011-05-17 23:26:20 +00:00
Cameron Zwarich
3c60ff4f3d
Correct a minor problem with the Thumb2 LDREX and STREX instruction encodings. They
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were marked as taking a tGPR when in reality they take an rGPR.
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2011-05-17 23:11:12 +00:00
Bill Wendling
f5c95b889f
Conditionalize the format of the GCOV files by target type. Darwin uses the 4.2
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format.
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2011-05-17 23:05:13 +00:00
Eli Friedman
9c4dae6b0b
Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant.
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2011-05-17 23:02:10 +00:00
Dan Gohman
1b32896bd2
Misc. code cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131497 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 22:22:52 +00:00
Dan Gohman
71dc7c9d89
Misc. code cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131495 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 22:20:36 +00:00
Stuart Hastings
ca1ef48585
X86 pmovsx/pmovzx ignore the upper half of their inputs.
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rdar://problem/6945110
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2011-05-17 22:13:31 +00:00
Tanya Lattner
c81c9709ef
vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case.
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2011-05-17 20:48:40 +00:00
Devang Patel
de98568bf8
Preserve line number information.
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2011-05-17 20:00:02 +00:00
Devang Patel
d9b4996637
Set debug loc for new load instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 19:43:38 +00:00
Devang Patel
c9ea771cb8
Preserve line number information.
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2011-05-17 19:43:06 +00:00
Mon P Wang
fee22869ca
Enable autodetect of popcnt
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2011-05-17 18:33:37 +00:00
Eli Friedman
19515b4e52
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
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This is r131438 with a couple small fixes.
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2011-05-17 18:29:03 +00:00
Eli Friedman
b8e0d3412c
Clean up the mess created by r131467+r131469.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131471 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 18:02:22 +00:00
Stuart Hastings
6db2c2fe21
Revert 131467 due to buildbot complaint.
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2011-05-17 16:59:46 +00:00
Stuart Hastings
504421e327
Fix an obscure issue in X86_64 parameter passing: if a tiny byval is
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passed as the fifth parameter, insure it's passed correctly (in R9).
rdar://problem/6920088
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2011-05-17 16:45:55 +00:00
Jakob Stoklund Olesen
6e3b3e2122
Tweak cross-class coalescing to be more aggressive when the target class is small.
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The greedy register allocator has live range splitting and register class
inflation, so it can actually fully undo this join, including restoring the
original register classes.
We still don't want to do this for long live ranges, mostly because of the high
register pressure of there are many constrained live ranges overlapping.
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2011-05-17 16:38:37 +00:00
Rafael Espindola
ab078f0232
Don't include information about the build into the information returned by
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getHostTriple. This fixes a 32 bit clang running on a 64 bit ubuntu.
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2011-05-17 15:26:34 +00:00
Nadav Rotem
86694297ff
Fix a bug in PerformEXTRACT_VECTOR_ELTCombine. The code created an ADD SDNode
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with two different types, in cases where the index and the ptr had different
types.
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2011-05-17 08:31:57 +00:00
Eric Christopher
6abb7bae10
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131459 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 08:16:14 +00:00
Eric Christopher
c324f72ab7
Support XOR and AND optimization with no return value.
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Finishes off rdar://8470697
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2011-05-17 08:10:18 +00:00
Eric Christopher
811c2b7110
Couple less magic numbers.
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2011-05-17 07:50:41 +00:00
Eric Christopher
8102bf003e
Make this code a little less magic number laden.
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2011-05-17 07:47:55 +00:00
Chris Lattner
5d4718b1c7
add a note
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2011-05-17 07:22:33 +00:00
Eli Friedman
c93943b6fe
Back out r131444 and r131438; they're breaking nightly tests. I'll look into
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it more tomorrow.
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2011-05-17 02:36:59 +00:00
Eli Friedman
cdc9a20561
Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131438 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:13:47 +00:00
Owen Anderson
e1edb17bc3
@llvm.lifetime.begin acts as a load, not @llvm.lifetime.end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131437 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-17 00:05:49 +00:00
Jakob Stoklund Olesen
f5497fb1b4
Teach LiveInterval::isZeroLength about null SlotIndexes.
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When instructions are deleted, they leave tombstone SlotIndex entries.
The isZeroLength method should ignore these null indexes.
This causes RABasic to sometimes spill a callee-saved register in the
abi-isel.ll test, so don't run that test with -regalloc=basic. Prioritizing
register allocation according to spill weight can cause more registers to be
used.
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2011-05-16 23:50:05 +00:00
Jim Grosbach
0c72076190
Kill some dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 22:24:07 +00:00
Dan Gohman
975716af1b
Delete unused variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131430 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 22:19:54 +00:00
Dan Gohman
b3dbd4a0b6
Trim #includes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-16 22:14:50 +00:00