Commit Graph

7750 Commits

Author SHA1 Message Date
Dan Gohman
7f32156bb9 Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 16:23:39 +00:00
Dan Gohman
32791e06d8 Make minor adjustments to whitespace and comments to reduce differences
between SSE1 instructions and their respective SSE2 analogues.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37718 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 15:44:19 +00:00
Dan Gohman
01976307d2 Fix loadv2i32 to be loadv4i32, though it isn't actually used anywhere yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37717 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 15:19:03 +00:00
Dan Gohman
8bc49c2fe7 Say AT&T instead of Intel in the comments for AT&T support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37716 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-25 15:11:25 +00:00
Owen Anderson
0819a9d386 Fix the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37705 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 16:59:54 +00:00
Dan Gohman
ea859be53c Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 14:59:07 +00:00
Dale Johannesen
5411835165 Quote complex names for Darwin X86 and ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37700 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-22 00:54:56 +00:00
Evan Cheng
97e604e7d8 Be more conservative of duplicating blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 23:55:02 +00:00
Evan Cheng
277f0741c5 Allow predicated immediate ARM to ARM calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37659 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 21:05:09 +00:00
Dan Gohman
b5bec2b6f6 Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 14:13:56 +00:00
Chris Lattner
3ee774091b describe an argument, hide it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37650 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 05:46:06 +00:00
Dan Gohman
82a87a0172 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 01:48:05 +00:00
Evan Cheng
eaa91b0a1f Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37643 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 01:26:51 +00:00
Chris Lattner
52387be1e0 If a function is vararg, never pass inreg arguments in registers. Thanks to
Anton for half of this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37641 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 00:13:10 +00:00
Evan Cheng
49892af264 Look for VECTOR_SHUFFLE that's identity operation on either LHS or RHS. This can happen before DAGCombiner catches it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 00:02:56 +00:00
Dan Gohman
638c96d391 Define the pushq instruction for x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37625 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-18 14:12:56 +00:00
Bill Wendling
a9e64f6f2d Revert patch. It regresses:
define double @test2(i64 %A) {
   %B = bitcast i64 %A to double
   ret double %B
}

$ llvm-as < t.ll | llc -march=x86-64

before:

         .align  4
         .globl  _test2
_test2:
         movd %rdi, %xmm0
         ret

after:

_test2:
         subq $8, %rsp
         movq %rdi, (%rsp)
         movsd (%rsp), %xmm0
         addq $8, %rsp
         ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37617 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-16 23:57:15 +00:00
Bill Wendling
e81369f2a5 Fix a failure to bit_convert from integer GPR to MMX register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37611 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-16 06:17:31 +00:00
Evan Cheng
d42e56e166 Instructions with unique labels or embedded jumptables cannot be duplicated during ifcvt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37606 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 21:15:00 +00:00
Dan Gohman
51eaa86758 Rename MVT::getVectorBaseType to MVT::getVectorElementType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 22:58:02 +00:00
Dale Johannesen
318093b6f8 Do not treat FP_REG_KILL as terminator in branch analysis (X86).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37578 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 22:03:45 +00:00
Dan Gohman
c101e95cb6 Add a target hook to allow loads from constant pools to be rematerialized, and an
implementation for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37576 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 20:50:44 +00:00
Dan Gohman
af67ea7318 Eliminate some redundant newlines in asm output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37574 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-14 15:00:27 +00:00
Christopher Lamb
a321125e8b Add support to tablegen for specifying subregister classes on a per register class basis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37572 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 22:20:15 +00:00
Dale Johannesen
13e8b51e3e Handle blocks with 2 unconditional branches in AnalyzeBranch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37571 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-13 17:59:52 +00:00
Chris Lattner
fdbe720416 fix x86-64 mmx calling convention for real, which passes in integer gprs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37534 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-09 05:08:10 +00:00
Chris Lattner
6b7c21cc30 fix mmx handling bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37533 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-09 05:01:50 +00:00
Evan Cheng
bfd2ec4a8e Add a utility routine to check for unpredicated terminator instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37528 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 21:59:56 +00:00
Lauro Ramos Venancio
61718a6285 Define AsmTransCBE for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37527 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 21:06:23 +00:00
Evan Cheng
1fc7cb695c Fix ARM condition code subsumission check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37517 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 09:14:47 +00:00
Evan Cheng
f81dea45b5 tBcc is not a barrier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37516 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-08 09:13:23 +00:00
Evan Cheng
9328c1ac66 Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37484 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-07 01:37:54 +00:00
Evan Cheng
2c614c5c69 Mark these instructions clobbersPred. They modify the condition code register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37468 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 10:17:05 +00:00
Evan Cheng
c1d7384cb0 Added clobbersPred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37466 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 10:15:28 +00:00
Bruno Cardoso Lopes
972f5896e4 Initial Mips support, here we go! =)
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-06 07:42:06 +00:00
Evan Cheng
5e148a37d3 Print predicate of the second instruction of the two-piece constant MI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37437 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-05 18:55:18 +00:00
Evan Cheng
341dcccb4e PIC label asm printing cosmetic changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37434 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-05 07:36:38 +00:00
Evan Cheng
111354ff99 Misuse of hasExternalLinkage(), should be checking isDeclaration().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37419 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-04 18:54:57 +00:00
Chris Lattner
c621ae7bba update this entry, now that Anton implemented shift/and lowering for
switches.  There is one really easy isel thing here with tst we are not
getting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37400 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-02 18:45:14 +00:00
Evan Cheng
c354334ac4 Opcode modifier s comes after condition code. e.g. addlts, not addslt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37388 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 20:51:29 +00:00
Evan Cheng
144fd1ff0f Set ARM ifcvt duplication limit to 3 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37385 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 08:28:59 +00:00
Evan Cheng
df4da14948 Make jumptable non-predicable for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37381 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-01 00:56:15 +00:00
Chris Lattner
3a4205367d Fix the asmprinter so that a globalvalue can specify an explicit alignment
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed.  This fixes some objc protocol
failures Devang tracked down.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37373 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-31 18:57:45 +00:00
Evan Cheng
c6f2f6fbb9 For VFP2 fldm, fstm instructions, the condition code is printed after the address mode and size specifier. e.g. fstmiaseq, not fstmeqias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37351 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 23:34:19 +00:00
Evan Cheng
fd488edb1d For ldrb, strh, etc., the condition code is before the width specifier. e.g. streqh, not strheq.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37349 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 23:32:06 +00:00
Evan Cheng
62ccdbf0b3 Add missing const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37342 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 18:42:18 +00:00
Evan Cheng
f277ee4be7 Add missing const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37341 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 18:35:22 +00:00
Nicolas Geoffray
2fb813d70b Implementation of compilation callback in PPC ELF32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37340 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-29 16:33:18 +00:00
Dan Gohman
237898ac1f Add explicit qualification for namespace MVT members.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37320 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-24 14:33:05 +00:00
Evan Cheng
69d555611a Hooks for predication support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37308 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-23 07:22:05 +00:00