Andrew Trick
94f01db27b
SCEV: Rewrite TrandformForPostIncUse to handle expression DAGs, not
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just expression trees.
Partially fixes PR11090. Test case will be with the full fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 17:21:09 +00:00
Andrew Trick
ce1823cd1b
Slightly more useful tracing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141867 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 17:06:38 +00:00
Benjamin Kramer
d38e99e949
Force CPU type on test so it doesn't accidentally emit movbe instead of bswap on Intel Atom CPUs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 14:27:54 +00:00
Kalle Raiskila
898f336c51
Mark 'branch indirect' instruction as an indirect branch.
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Not having it confused assembly printing of jumptables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 11:40:03 +00:00
Bill Wendling
4e68054b20
More closely follow libgcc, which has code after the `ret' instruction to
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release the stack segment and reset the stack pointer. Place the code in its own
MBB to make the verifier happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 08:24:19 +00:00
Bill Wendling
1203fe7fc8
Revert r141854 because it was causing failures:
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http://lab.llvm.org:8011/builders/llvm-x86_64-linux/builds/101
--- Reverse-merging r141854 into '.':
U test/MC/Disassembler/X86/x86-32.txt
U test/MC/Disassembler/X86/simple-tests.txt
D test/CodeGen/X86/bmi.ll
U lib/Target/X86/X86InstrInfo.td
U lib/Target/X86/X86ISelLowering.cpp
U lib/Target/X86/X86.td
U lib/Target/X86/X86Subtarget.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141857 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 07:48:07 +00:00
Bill Wendling
82222c20be
Should not add instructions to a BB after a return instruction. The machine instruction verifier doesn't like this, nor do I.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 07:42:32 +00:00
Cameron Zwarich
326e491ce7
Use an existing method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141855 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 07:36:41 +00:00
Craig Topper
8ab1d1e900
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 07:09:14 +00:00
Craig Topper
d501c714cd
Add 'implicit EFLAGS' to patterns for popcnt and lzcnt
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 06:18:52 +00:00
Nick Lewycky
f77dea13d7
Elf_Word is not POD! Stop using it in a DenseMap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 03:30:21 +00:00
Nick Lewycky
dec1b10161
If MI is deleted then remove it from the set. If a new MI is created, it could
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have the same address as the one we deleted, and we don't want that in the set
yet. Noticed by inspection.
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2011-10-13 02:16:18 +00:00
Nick Lewycky
ea3abd5536
Tabs to spaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 01:09:50 +00:00
Nick Lewycky
3821b1885e
Add missing braces to pacify GCC's -Wparentheses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141842 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 00:54:59 +00:00
Michael J. Spencer
fc61a23506
Add missing ELF constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141840 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13 00:16:25 +00:00
Jakob Stoklund Olesen
dee83c90bb
Also inflate register classes around inline asm.
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Now that MI->getRegClassConstraint() can also handle inline assembly,
don't bail when recomputing the register class of a virtual register
used by inline asm.
This fixes PR11078.
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2011-10-12 23:37:40 +00:00
Jakob Stoklund Olesen
f5916976e9
Add MachineInstr::getRegClassConstraint().
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Most instructions have some requirements for their register operands.
Usually, this is expressed as register class constraints in the
MCInstrDesc, but for inline assembly the constraints are encoded in the
flag words.
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2011-10-12 23:37:36 +00:00
Jakob Stoklund Olesen
9dfaacb696
Extract a method for finding the inline asm flag operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 23:37:33 +00:00
Jakob Stoklund Olesen
459b74b964
Encode register class constreaints in inline asm instructions.
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The inline asm operand constraint is initially encoded in the virtual
register for the operand, but that register class may change during
coalescing, and the original constraint is lost.
Encode the original register class as part of the flag word for each
inline asm operand. This makes it possible to recover the actual
constraint required by inline asm, just like we can for normal
instructions.
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2011-10-12 23:37:29 +00:00
Eli Friedman
a3a1635d04
Attempt to fix MSVC build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141831 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 23:14:41 +00:00
Bill Wendling
f6fb7ed53c
We need to verify that the machine instruction we're using as a replacement for
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our current machine instruction defines a register with the same register class
as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it
would ICE because a tail call was expecting one register class but was given
another. (The machine instruction verifier catches this situation.)
<rdar://problem/10270968>
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2011-10-12 23:03:40 +00:00
Eli Friedman
5c75af6eb7
Use a utility from MathExtras to clarify a check and avoid undefined behavior. Based on patch by Ahmed Charles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141829 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 22:46:45 +00:00
Owen Anderson
95f8db4d4d
The VMAs stored in the symbol table of a MachO file are absolute addresses, not offsets from the section.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141828 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 22:37:10 +00:00
Eli Friedman
a046d2ff9a
Use unsigned multiply to hash integers, so we don't end up with undefined behavior for large signed integers. Based on patch by Ahmed Charles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141827 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 22:25:45 +00:00
Lang Hames
68df750a4f
Removed colons from some target datalayout strings in test, since they don't match the required format.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141825 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 22:24:17 +00:00
Owen Anderson
10a8c62d46
Don't label a STAB debugging symbol as a function symbol.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141824 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 22:23:12 +00:00
Owen Anderson
cd74988fb9
sectionContainsSymbol needs to be based on VMA's rather than section indices to properly account for files with segment load commands that contain no sections.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141822 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 22:21:32 +00:00
Eli Friedman
18ead6b587
Fix a couple hash functions so that they do not depend on undefined shifts. Based on patch by Ahmed Charles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141820 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 22:00:26 +00:00
Jim Grosbach
81b2928d80
ARM addrmode5 represents the 'U' bit of the encoding backwards.
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The disassembler needs to use the AM5 factory methods instead of just
building up the immediate directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141819 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 21:59:02 +00:00
Eli Friedman
90196fced2
Fix APFloat::getSmallestNormalized so the shift doesn't depend on undefined behavior. Patch from Ahmed Charles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 21:56:19 +00:00
Eli Friedman
7247a5f20e
Fix APFloat::getLargest so that it actually returns the correct value. Found by accident while reviewing a patch to nearby code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 21:51:36 +00:00
Owen Anderson
41242942fc
Section indices in MachO symbol tables begin at 1, not 0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141815 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 21:43:24 +00:00
Kevin Enderby
acbaecd4c8
Finish supporting cpp #file/line comments in assembler for error messages. So
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for cpp pre-processed assembly we give correct filename and line numbers when
reporting errors in assembly files when using clang and -integrated-as on .s
files. rdar://8998895
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2011-10-12 21:38:39 +00:00
Evan Cheng
7007e4c556
Disable machine LICM speculation check (for profitability) until I have time to investigate the regressions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141813 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 21:33:49 +00:00
Cameron Zwarich
980df16920
To find the exiting VN of a LiveInterval from a block, use the previous slot
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rather than the previous index. If a block has a single instruction, the
previous index may be in a different basic block.
I have no clue how this used to work on all of test-suite, because now this
failure is seen quite often when trying to compile code with -strong-phi-elim.
This fixes PR10252.
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2011-10-12 21:24:54 +00:00
Jim Grosbach
c66e7afcf2
Thumb2 assembly parsing and encoding for LDC/STC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 20:54:17 +00:00
Nick Lewycky
18ad76bb9a
Hoist vector.size() computation out of the loop. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141807 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 20:20:48 +00:00
Jim Grosbach
b0786b33fa
addrmode2 is gone from these, so no need for the reg0 operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 18:11:24 +00:00
Jim Grosbach
9f45754750
ARM encoding tests for STC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 17:36:13 +00:00
Jim Grosbach
9b8f2a0b36
ARM parsing and encoding for the <option> form of LDC/STC instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 17:34:41 +00:00
Jim Grosbach
01208d56e8
80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 16:36:01 +00:00
Jim Grosbach
bc9c80240b
Tidy up. Formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 16:34:37 +00:00
Dan Gohman
9e15d658c9
Fix a thinko that Nick noticed. The previous code actually worked as
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intended, but only by accident.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 15:56:56 +00:00
NAKAMURA Takumi
18dcb87f6b
lib/Object/ELFObjectFile.cpp: Fix undefined behavior for MC/ELF/many-section.s not to fail (on msvc).
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DenseMap::lookup(k) would return "default constructor value" when k was not met. It would be useless when value type were POD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141774 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 10:28:55 +00:00
Bill Wendling
a2e87912d8
Expand the check for a landing pad so that it looks at the basic block's
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containing loop's header to see if that's a landing pad. If it is, then we don't
want to hoist instructions out of the loop and above the header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141767 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 02:58:01 +00:00
Jakob Stoklund Olesen
22e8a366ad
Use an existing function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141763 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 01:24:51 +00:00
Akira Hatanaka
41f9a430cb
Define base class LogicNOR and make 32-bit and 64-bit NOR derive from it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141761 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 01:05:13 +00:00
Akira Hatanaka
6baabc1dd0
Fix encoding of 32-bit integer instructions. Change names of operands and nodes.
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Remove unused classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141757 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 00:56:06 +00:00
Eric Christopher
d0851aae51
Make this use a public accessor too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 00:38:05 +00:00
Nick Lewycky
865703e53a
Add missing space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141750 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12 00:14:31 +00:00