Commit Graph

91240 Commits

Author SHA1 Message Date
Nadav Rotem
9eb366acba CostModel: increase the default cost of supported floating point operations from 1 to two. Fixed a few tests that changes because now the cost of one insert + a vector operation on two doubles is lower than two scalar operations on doubles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 21:15:03 +00:00
Nadav Rotem
196ee11f85 Add debug prints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179412 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 21:11:14 +00:00
Nadav Rotem
affe889d08 Add support for additional vector instructions in the interpreter.
patch by Veselov, Yuri <Yuri.Veselov@intel.com>.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179409 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 20:45:20 +00:00
Chad Rosier
3f42936af8 [ms-inline asm] Move this logic into a static function as it's only applicable
when parsing MS-style inline assembly.  No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 20:20:54 +00:00
Chad Rosier
d0dd5e413a [ms-inline asm] Address the FIXME for ImmDisp before brackets. This
is a follow on to r179393 and r179399.  Test case to be added on
the clang side.
Part of rdar://13453209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 19:51:49 +00:00
Daniel Dunbar
406ef44707 lit: Fix infinite recursion when an out-of-tree test root is located inside the source test root.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179402 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 19:09:09 +00:00
Daniel Dunbar
f2c2b20090 lit: Add a test for discovery w/ test_exec_root (out-of-tree test root).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179401 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 19:08:57 +00:00
Chad Rosier
b71ce6a423 [ms-inline asm] Have the [ Symbol ] case fall into the more general logic. This
is a follow on to r179393.  Test case to be added on the clang side.
Part of rdar://13453209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:54:20 +00:00
Quentin Colombet
d64ee4455a ARM: Correct printing of pre-indexed operands.
According to the ARM reference manual, constant offsets are mandatory for pre-indexed addressing modes.
The MC disassembler was not obeying this when the offset is 0.
It was producing instructions like: str r0, [r1]!.
Correct syntax is: str r0, [r1, #0]!.

This change modifies the dumping of operands so that the offset is always printed, regardless of its value, when pre-indexed addressing mode is used.

Patch by Mihail Popa <Mihail.Popa@arm.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:47:25 +00:00
Chad Rosier
9458f3ecee [ms-inline asm] Add support for operands that include both a symbol and an
immediate displacement.  Specifically, add support for generating the proper IR.
We've been able to parse this for some time now.  Test case to be added on the
clang side.
Part of rdar://13453209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179393 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:21:18 +00:00
Hal Finkel
598574695b PPC: Remove (broken) nested implicit definition lists
TableGen will not combine nested list 'let' bindings into a single list, and
instead uses only the inner scope. As a result, several instruction definitions
were missing implicit register defs that were in outer scopes. This de-nests
these scopes and makes all instructions have only one let binding which sets
implicit register definitions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179392 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:17:57 +00:00
Hal Finkel
81b2fd5819 Add a comment about the PPC Interpretation64Bit bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179391 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:17:38 +00:00
Jyotsna Verma
1877dc00e7 Hexagon: Set isPredicatedNew flag on predicate new instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179388 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 18:01:06 +00:00
Jyotsna Verma
c1406d76ec Hexagon: Set isPredicatedFlase flag for all the instructions with negated predication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179387 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 17:46:52 +00:00
David Majnemer
fb1cd69b90 Simplify (A & ~B) in icmp if A is a power of 2
The transform will execute like so:
(A & ~B) == 0 --> (A & B) != 0
(A & ~B) != 0 --> (A & B) == 0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179386 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 17:25:07 +00:00
Chad Rosier
dda4b6bf25 [ms-inline asm] Add the implementation for the AOK_Delete kind, which was added
in r179325.  Test case coming shortly on the clang side.
Part of rdar://13453209

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179383 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 16:26:42 +00:00
Arnold Schwaighofer
08a0e8f8db LoopVectorizer: integer division is not a reduction operation
Don't classify idiv/udiv as a reduction operation. Integer division is lossy.
For example : (1 / 2) * 4 != 4/2.

Example:

int a[] = { 2, 5, 2, 2}
int x = 80;

for()
  x /= a[i];

Scalar:
  x /= 2 // = 40
  x /= 5 // = 8
  x /= 2 // = 4
  x /= 2 // = 2

Vectorized:

 <80, 1> / <2,5> //= <40,0>
 <40, 0> / <2,2> //= <20,0>

 20*0 = 0

radar://13640654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179381 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 15:15:19 +00:00
Tim Northover
b6ad2bd511 AArch64: use full triple for ELF tests
These tests rely specifically on the names of ELF relocations, let alone any
other detail. There's no way they'd work if LLVM was emitting something else by
default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179376 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 12:54:58 +00:00
Tim Northover
15e883787f AArch64: remove over-zealous use of CHECK-NEXT
It turns out some platforms (e.g. Windows) lay out their llvm-mc slightly
differently with extra newlines; there was no real reason for the test lines to
be consecutive, so this relaxes the FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179375 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 12:54:49 +00:00
Benjamin Kramer
3389e10d67 Revert broken pieces of r179373.
You can't copy an OwningPtr, and move semantics aren't available in C++98.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179374 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 12:13:51 +00:00
Andy Gibbs
200241e4de Replace uses of the deprecated std::auto_ptr with OwningPtr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179373 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 10:56:28 +00:00
Benjamin Kramer
71c1b22855 Fix a disconcerting bug in Value::isUsedInBasicBlock, which gave wrong answers for blocks larger than 3 instrs.
Also add a unit test. PR15727.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 08:33:11 +00:00
Alexey Samsonov
5eacadd649 Don't explicitly provide -pie in MSan bootstrap of LLVM, as it's now implied by the driver
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179367 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 07:18:55 +00:00
Nico Rieck
cf3b55ab18 Teach llvm-readobj to print ELF program headers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 04:07:39 +00:00
Nico Rieck
7e87373e91 Remove obsolete object file dumpers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 04:07:13 +00:00
Nico Rieck
f89da7210b Replace coff-/elf-dump with llvm-readobj
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 04:06:46 +00:00
Nico Rieck
8ed205f0a3 Add extensive relocation tests for llvm-readobj
This test ensures that relocation type names returned by libObject match
the raw relocation type value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179360 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 04:02:23 +00:00
Nico Rieck
1c8dfa5e90 Add -expand-relocs to llvm-readobj
This option expands shown relocations from single line to a dictionary
format:

  Relocation {
    Offset: 0x4
    Type: R_386_32 (1)
    Symbol: sym
    Info: 0x0
  }

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179359 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 04:01:52 +00:00
Nico Rieck
a6cd815994 Add missing relocation names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179358 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 04:01:28 +00:00
Nico Rieck
346801a5c6 Support MIPS64EL relocation type names
MIPS64EL relocation entries have up to three relocation operations. Because
libObject only exposes a single relocation name, use the concatenation of
the individual relocation type names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179357 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 03:59:28 +00:00
Hal Finkel
171a8adf31 Add PPC instruction record forms and associated query functions
This is prep. work for the implementation of optimizeCompare. Many PPC
instructions have 'record' forms (in almost all cases, this means that the RC
bit is set) that cause the result of the instruction to be compared with zero,
and the result of that comparison saved in a predefined condition register. In
order to add the record forms of the instructions without too much
copy-and-paste, the relevant functions have been refactored into multiclasses
which define both the record and normal forms.

Also, two TableGen-generated mapping functions have been added which allow
querying the instruction code for the record form given the normal form (and
vice versa).

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 02:18:09 +00:00
Nadav Rotem
33a47d66e9 Don't disable block layout when forcing block alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179355 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 01:24:16 +00:00
Nadav Rotem
67b290c7fd Fix the test on linux by setting the triple and the align format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 01:07:16 +00:00
Nadav Rotem
07706e5506 Add a flag to align all basic blocks in the function.
When debugging performance regressions we often ask ourselves if the regression
that we see is due to poor isel/sched/ra or due to some micro-architetural
problem.  When comparing two code sequences one good way to rule out front-end
bottlenecks (and other the issues) is to force code alignment. This pass adds
a flag that forces the alignment of all of the basic blocks in the program.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 00:48:32 +00:00
Rafael Espindola
e292347503 Add 179294 back, but don't use bit fields so that it works on big endian hosts.
Original message:

Print more information about relocations.

With this patch llvm-readobj now prints if a relocation is pcrel, its length,
if it is extern and if it is scattered.

It also refactors the code a bit to use bit fields instead of shifts and
masks all over the place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179345 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12 00:17:33 +00:00
Chad Rosier
33c55bdfed [ms-inline asm] Add support for using the LENGTH, TYPE, and SIZE operators with
variables that use namespace alias qualifiers.  Test case coming on clang side
shortly.
Part of rdar://13499009


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179343 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 23:57:04 +00:00
Chad Rosier
5ea1ea8db8 [ms-inline asm] Add support for using offsetof operator with variables that use
namespace alias qualifiers.  Test case coming on clang side shortly.
Part of rdar://13499009


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 23:37:34 +00:00
Manman Ren
4df1854f26 Aliasing rules for struct-path aware TBAA.
Added PathAliases to check if two struct-path tags can alias.
Added command line option -struct-path-tbaa.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179337 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 23:24:18 +00:00
Chad Rosier
adb5c16aa7 [ms-inline asm] Pass a StringRef reference to ParseIntelVarWithQualifier so we
can build up the identifier string.  No test case as support for looking up
these type of identifiers hasn't been implemented on the clang side.
Part of rdar://13499009


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 23:24:15 +00:00
Manman Ren
327f0100d1 TBAA: add utility to create a TBAA scalar type node
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179331 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 22:51:30 +00:00
Chad Rosier
f16b08de8a [ms-inline asm] Add a new AsmRewriteKind, AOK_Delete. To be used in a future
commit.
Part of rdar://13453209


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179325 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 22:00:03 +00:00
Chad Rosier
f06cc98149 [ms-inline asm] Remove brackets from around a symbol reference in the target
specific logic.  This makes the code much less fragile.  Test case coming on the
clang side in a moment.
rdar://13634327


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179323 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 21:49:30 +00:00
Preston Gurd
38dd366b30 Use FileCheck instead of grep.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179322 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 21:39:01 +00:00
David Majnemer
bae6d527df Fix undefined behavior in AArch64
A64Imms::isLogicalImmBits and A64Imms::isLogicalImm will attempt to
execute shifts that perform undefined behavior. Instead of attempting
to perform the 64-bit rotation, treat it as a no-op.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179317 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 20:13:52 +00:00
David Majnemer
59b11c415e Optimize icmp involving addition better
Allows LLVM to optimize sequences like the following:

%add = add nsw i32 %x, 1
%cmp = icmp sgt i32 %add, %y

into:

%cmp = icmp sge i32 %x, %y

as well as:

%add1 = add nsw i32 %x, 20
%add2 = add nsw i32 %y, 57
%cmp = icmp sge i32 %add1, %add2

into:

%add = add nsw i32 %y, 37
%cmp = icmp sle i32 %cmp, %x


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179316 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 20:05:46 +00:00
Jack Carter
efc8740647 Mips specific inline asm memory operand modifier test case
These changes are based on commit responses for r179135.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179315 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 19:39:19 +00:00
Akira Hatanaka
fc82e4db13 [mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selects
multiply instructions in MipsSEDAGToDAGISel.

This patch was supposed to be part of r178403.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 19:29:26 +00:00
Akira Hatanaka
fee62c167b [mips] Clean up MipsISelDAGToDAG.cpp and MipsISelLowering.cpp.
- Rename function.
- Pass iterator by value.
- Remove header include.

No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179312 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 19:07:14 +00:00
Rafael Espindola
59a8b5a8f0 Revert my last two commits while I debug what is wrong in a big endian host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179303 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 17:46:10 +00:00
Rafael Espindola
6b281800d2 Fix llvm-readobj tests on big endian hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179298 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 17:23:23 +00:00