Tim Northover
c499ecd1d1
AArch64/ARM64: add extra testing from AArch64 to ARM64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206887 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-22 12:45:32 +00:00
Chad Rosier
e02fa056d9
[AArch64] Refactor the NEON scalar reduce pairwise intrinsics, so that they use
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float/double rather than the vector equivalents when appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196833 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 22:47:38 +00:00
Chad Rosier
97eda18693
[AArch64] Refactor NEON scalar reduce pairwise front-end codegen to remove
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unnecessary patterns in tablegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196832 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 22:47:34 +00:00
Chad Rosier
6c6344e6a9
[AArch64] Remove q and non-q intrinsic definitions in the NEON scalar reduce
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pairwise implementation, using an overloaded definition instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196831 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 22:47:31 +00:00
Hao Liu
3d69ff4d07
AArch64: Add missing scalar pair intrinsics.
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E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196198 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-03 03:39:47 +00:00
NAKAMURA Takumi
b2d2575bd8
llvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach64-pecoff might be misassumed on win32 hosts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191275 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-24 04:14:29 +00:00
Jiangning Liu
477fc628b3
Initial support for Neon scalar instructions.
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Patch by Ana Pazos.
1.Added support for v1ix and v1fx types.
2.Added Scalar Pairwise Reduce instructions.
3.Added initial implementation of Scalar Arithmetic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191263 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-24 02:47:27 +00:00
