James Molloy
00c4dbd10e
[ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls.
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SelectionDAG already knows about this, but fast-isel was ignorant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208307 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-08 12:53:50 +00:00
Tim Northover
291cd09645
ARM64: make sure FastISel emits SSA MachineInstrs
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We need to use a temporary register for a 2-step operation like REM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-08 10:30:56 +00:00
James Molloy
2712c87cfe
[ARM64-BE] Fix fast-isel, and add appropriate RUN lines to appropriate tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208200 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-07 12:33:55 +00:00
Joey Gouly
72e96a51bf
[ARM64] Correctly select ANDWri in FastISel.
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http://reviews.llvm.org/D3598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207917 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-03 17:27:06 +00:00
Chad Rosier
fa2e88da1c
[ARM64][fast-isel] Fast-isel doesn't know how to handle f128.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207659 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 15:29:57 +00:00
Tim Northover
d805bf8d61
AArch64/ARM64: use HS instead of CS & LO instead of CC.
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On instructions using the NZCV register, a couple of conditions have dual
representations: HS/CS and LO/CC (meaning unsigned-higher-or-same/carry-set and
unsigned-lower/carry-clear). The first of these is more descriptive in most
circumstances, so we should print it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207644 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 13:14:03 +00:00
Tim Northover
5b188b1cb8
ARM64: make sure FastISel uses a GPR64 source in 64-bit extensions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207620 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-30 09:32:01 +00:00
Craig Topper
a4f9f5e7de
[C++11] Add 'override' keywords and remove 'virtual'. Additionally add 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. ARM64 edition
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207509 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-29 07:58:25 +00:00
Craig Topper
c848b1bbcf
[C++] Use 'nullptr'. Target edition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-25 05:30:21 +00:00
Aaron Ballman
8cafc53ee4
Replacing a non-ASCII character in a comment with an ASCII character. Fixes a C4819 warning in MSVC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206403 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-16 17:09:20 +00:00
Tim Northover
1291807e03
ARM64: add constraints to various FastISel operations
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206284 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-15 13:59:53 +00:00
Aaron Ballman
103683c4cb
Fixing warnings in the MSVC build. No functional changes intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205301 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 12:22:20 +00:00
Tim Northover
7b837d8c75
ARM64: initial backend import
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This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.
Everything will be easier with the target in-tree though, hence this
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00
