Commit Graph

10766 Commits

Author SHA1 Message Date
Anton Korobeynikov
52237119a9 Initial support for some Thumb2 instructions.
Patch by Viktor Kutuzov and Anton Korzh from Access Softek, Inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73622 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 18:13:58 +00:00
Devang Patel
369de261e7 Do not use first actual instruction's location for prologue. The debug wants to skip prologue while setting a breakpoint for the function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73592 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-17 00:48:26 +00:00
Chris Lattner
e8f1018130 fix a circular dependency between the mips code generator
and its asmprinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73573 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 22:38:04 +00:00
Douglas Gregor
1555a23335 Introduce new headers whose inclusion forces linking and
initialization of all targets (InitializeAllTargets.h) or assembler
printers (InitializeAllAsmPrinters.h). This is a step toward the
elimination of relinked object files, so that we can build normal
archives.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 20:12:29 +00:00
Evan Cheng
876eac9da5 CALL64pcrel32 immediate field is 32-bit. Patch by Abhinav Duggal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73536 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 19:44:27 +00:00
Anton Korobeynikov
385f5a99ec Address review comments: add 3 ARM calling conventions.
Dispatch C calling conv. to one of these conventions based on
target triple and subtarget features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 18:50:49 +00:00
Anton Korobeynikov
2932795309 GNU as refuses to assemble "pop {}" instruction. Do not emit such
(this is the case when we have thumb vararg function with single
callee-saved register, which is handled separately).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73529 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 18:49:08 +00:00
Sanjiv Gupta
003263bb9f Added missing libcalls for floating point to int conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73491 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 16:17:35 +00:00
Sanjiv Gupta
bde7942072 Code Restructuring. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73481 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 09:45:18 +00:00
Eli Friedman
6314ac2bca Misc accumulated tweaks to legalization logic for various targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73476 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 06:40:59 +00:00
Chris Lattner
b42e20be77 another xform that is target-independent (should be done in instcombine).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73472 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 06:15:56 +00:00
Chris Lattner
d23fffeb16 I think instcombine should unconditionally do this xform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 06:11:35 +00:00
Bill Wendling
fe7f294d5c There doesn't seem to be a reason to move the save FP stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 04:12:45 +00:00
Bill Wendling
d0446b08c4 The DWARF to compact encoding converter assumes that the DW_CFA_def_cfa_offset
comes after the DW_CFA_def_cfa_register, because the CFA is really ESP from the
start of the function and only gets an offset when the "subl $xxx,%esp"
instruction happens, not the other way around.

And reapply r72898:

The DWARF unwind info was incorrect. While compiling with
`-fomit-frame-pointer', we would lack the DW_CFA_advance_loc information for a
lot of function, and then they would be `0'. The linker (at least on Darwin)
needs to encode the stack size. In some cases, the stack size is too large to
directly encode. So the linker checks to see if there is a "subl $xxx,%esp"
instruction at the point where the `DW_CFA_def_cfa_offset' says the pc was. If
so, the compact encoding records the offset in the function to where the stack
size is embedded. But because the `DW_CFA_advance_loc' instructions are missing,
it looks before the function and dies.

So, instead of emitting the EH debug label before the stack adjustment
operations, emit it afterwards, right before the frame move stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73465 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-16 04:06:15 +00:00
Evan Cheng
88cc7c4194 On Darwin, frame pointer r7 is never available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 22:32:01 +00:00
Anton Korobeynikov
bb62962342 Rename methods for the sake of consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 21:46:20 +00:00
Evan Cheng
675860758e Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73422 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 21:18:20 +00:00
Bill Wendling
927788c500 The Ls and Qs were mixed up. Patch by Sean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73417 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 20:59:31 +00:00
Evan Cheng
d780f35794 Do not form ldrd / strd if the two dests / srcs are the same. Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73413 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 20:54:56 +00:00
Bill Wendling
453eb26106 "The Intel instruction tables should include the 64-bit and 32-bit instructions
that push immediate operands of 1, 2, and 4 bytes (extended to the native
register size in each case).  The assembly mnemonics are "pushl" and "pushq."
One such instruction appears at the beginning of the "start" function , so this
is essential for accurate disassembly when unwinding."

Patch by Sean Callanan!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73407 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 19:39:04 +00:00
Evan Cheng
7f04428738 Silence a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73406 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 19:36:32 +00:00
Evan Cheng
358dec5180 Part 1.
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73381 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 08:28:29 +00:00
Chris Lattner
3771071dd8 remove extraneous const qualifier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73373 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 04:42:32 +00:00
Chris Lattner
2e06dd2101 I got J and K backward, many thanks to Eli for spotting this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73372 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 04:39:05 +00:00
Chris Lattner
e4935150c7 implement support for the 'K' asm constraint, PR4347
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-15 04:01:39 +00:00
Dan Gohman
a119de86a0 Fix old-style type names in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73362 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-14 23:30:43 +00:00
Bruno Cardoso Lopes
ae9163f0e2 Introduce new BinaryObject (blob) class, ELF Writer modified to use it. BinaryObject.h by Aaron Gray
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73333 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-14 07:53:21 +00:00
Sanjiv Gupta
dcb6da3efd The subprogram descriptor for a function may be missing (llvm-ld linking two static functions with same name), so pick up the compilation unit for the function from the first valid debug loc of its instructions.
This patch also emits debug info for structure (aggregate types in 
general) types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73295 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-13 17:35:54 +00:00
Evan Cheng
e7d6df7353 Add a ARM specific pre-allocation pass that re-schedule loads / stores from
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73291 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-13 09:12:55 +00:00
Evan Cheng
cd799b99cb Mark some pattern-less instructions as neverHasSideEffects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73252 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-12 20:46:18 +00:00
Arnold Schwaighofer
bbd8c33ee6 Fix Bug 4278: X86-64 with -tailcallopt calling convention
out of sync with regular cc.

The only difference between the tail call cc and the normal
cc was that one parameter register - R9 - was reserved for
calling functions through a function pointer. After time the
tail call cc has gotten out of sync with the regular cc. 

We can use R11 which is also caller saved but not used as
parameter register for potential function pointers and
remove the special tail call cc on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73233 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-12 16:26:57 +00:00
Eli Friedman
7161cb1dad Misc x86 README updates: remove a couple of already-fixed issues,
add a few suggestions from looking at some assembly code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73210 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-11 23:07:04 +00:00
Bruno Cardoso Lopes
d00d4159d4 Use forward declarations and move TargetELFWriterInfo impl to a new file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73209 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-11 22:13:00 +00:00
Bruno Cardoso Lopes
c997d45ae5 Support for ELF Visibility
Emission for globals, using the correct data sections
Function alignment can be computed for each target using TargetELFWriterInfo
Some small fixes



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73201 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-11 19:16:03 +00:00
Sanjiv Gupta
6396329d52 Generate libcalls for floating point arithmetic and casting operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-11 16:50:48 +00:00
Sanjiv Gupta
fa3f80a2b7 More formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73185 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-11 06:55:48 +00:00
Sanjiv Gupta
b65d1f23ca Fixed source comments. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73184 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-11 06:49:55 +00:00
Anton Korobeynikov
b51b6cf1d0 Silence a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73152 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-09 23:00:39 +00:00
Bill Wendling
3ae67f5910 Simplified logic of this if-then statement to reduce nesting. No functionality
change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73143 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-09 20:08:51 +00:00
Sanjiv Gupta
b157f25926 PIC16 emits auto variables as globals. When optimizer removes a function entierly by estimating its side effects on globals, those globals(autos) without a function were not being printed by the Asm printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73135 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-09 15:31:19 +00:00
Anton Korobeynikov
2e7ccfce98 Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08 22:59:50 +00:00
Anton Korobeynikov
dada95b5b3 Revert hunk commited by accident
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73097 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08 22:57:18 +00:00
Anton Korobeynikov
0eebf653a7 The attached patches implement most of the ARM AAPCS-VFP hard float
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73095 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08 22:53:56 +00:00
Anton Korobeynikov
fbbf1eeccf Separate V6 from V6T2 since the latter has some extra nice instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08 21:20:36 +00:00
Anton Korobeynikov
a7b0ded2a2 Add helper for checking of Thumb1 mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73080 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08 20:31:02 +00:00
Bill Wendling
faf2671776 Revert r72898. It does not solve the problem I want it to solve.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73075 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-08 18:18:28 +00:00
Eli Friedman
5d28eb9e97 Get rid of some unnecessary code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73017 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-07 07:28:45 +00:00
Eli Friedman
7a5e55509b Slightly generalize the code that handles shuffles of consecutive loads
on x86 to handle more cases.  Fix a bug in said code that would cause it 
to read past the end of an object.  Rewrite the code in 
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. 
Remove PerformBuildVectorCombine, which is no longer necessary with 
these changes.  In addition to simplifying the code, with this change, 
we can now catch a few more cases of consecutive loads.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73012 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-07 06:52:44 +00:00
Eli Friedman
0da9975299 PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec
instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73009 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-07 01:07:55 +00:00
Eli Friedman
30e71eb61b Avoid crashing on a variable-index insertelement with element type i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-06 06:32:50 +00:00