Commit Graph

108560 Commits

Author SHA1 Message Date
Hal Finkel
a5fda70c13 [InstCombine] Remove redundant @llvm.assume intrinsics
For any @llvm.assume intrinsic, if there is another which dominates it and uses
the same condition, then it is redundant and can be removed. While this does
not alter the semantics of the @llvm.assume intrinsics, it makes subsequent
handling more efficient (and the resulting IR easier to read).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219067 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 21:27:06 +00:00
Yaron Keren
30d433dcc2 Solve Visual C++ warning C4805 on getAsInteger<bool>.
Fix http://llvm.org/PR21158 by adding a cast to unsigned long long,
so the comparison would be between two unsigned long longs instead 
of bool and unsigned long long.

      if (getAsUnsignedInteger(*this, Radix, ULLVal) ||
          static_cast<unsigned long long>(static_cast<T>(ULLVal)) != ULLVal)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219065 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 19:58:30 +00:00
Benjamin Kramer
dbc6d9b9d7 Remove unnecessary copying or replace it with moves in a bunch of places.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219061 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 16:55:56 +00:00
David Blaikie
53b95f3fb1 Sink DwarfDebug::updateSubprogramScopeDIE into DwarfCompileUnit
This requires exposing some of the current function state from
DwarfDebug. I hope there's not too much of that to expose as I go
through all the functions, but it still seems nicer to expose singular
data down to multiple consumers, than have consumers expose raw mapping
data structures up to DwarfDebug for building subprograms.

Part of a series of refactoring to allow subprograms in both the
skeleton and dwo CUs under Fission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219060 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 16:24:00 +00:00
David Blaikie
dba26ca39c Reformatting accidentally left out of r219057
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 16:00:26 +00:00
David Blaikie
2c9ba7b7b1 Sink DwarfDebug::attachLowHighPC into DwarfCompileUnit
One of many things to sink down into DwarfCompileUnit to allow handling
of subprograms in both the skeleton and dwo CU under Fission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219058 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 15:58:47 +00:00
David Blaikie
a2ec9db66b Move DwarfCompileUnit from DwarfUnit.h to its own header (DwarfCompileUnit.h)
In preparation for sinking all the subprogram emission code down from
DwarfDebug into DwarfCompileUnit, this will avoid bloating
DwarfUnit.h/cpp greatly and make concerns a bit more clear/isolated.

(sinking this handling down is part of the work to handle emitting
minimal subprograms for -gmlt-like data into the skeleton CU under
fission)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219057 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 15:49:50 +00:00
Duncan P. N. Exon Smith
f13b76b94f DI: Fixup global syntax in example
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219056 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 15:44:01 +00:00
Duncan P. N. Exon Smith
1225b7a30a DI: Line up comments in examples
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219055 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 15:35:25 +00:00
Duncan P. N. Exon Smith
a472e864de DI: Fixup example IR from r219051
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219054 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 15:31:08 +00:00
Duncan P. N. Exon Smith
c48707aec8 DI: Prune another example
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219053 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 15:30:52 +00:00
Duncan P. N. Exon Smith
ffd2f5051e DI: Update and prune metadata examples
Update a couple of the examples of debug info metadata, and prune the
rest.  Point to the true reference implementation in the source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219051 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 14:56:56 +00:00
Chandler Carruth
9e8c2e8568 [x86] Slap a triple on this test since it is poking around at the stack
and calling conventions. Otherwise its too hard to craft a usefully
generic set of assertions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219047 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 04:22:55 +00:00
Chandler Carruth
03a77831cc [x86] Enable the new vector shuffle lowering by default.
Update the entire regression test suite for the new shuffles. Remove
most of the old testing which was devoted to the old shuffle lowering
path and is no longer relevant really. Also remove a few other random
tests that only really exercised shuffles and only incidently or without
any interesting aspects to them.

Benchmarking that I have done shows a few small regressions with this on
LNT, zero measurable regressions on real, large applications, and for
several benchmarks where the loop vectorizer fires in the hot path it
shows 5% to 40% improvements for SSE2 and SSE3 code running on Sandy
Bridge machines. Running on AMD machines shows even more dramatic
improvements.

When using newer ISA vector extensions the gains are much more modest,
but the code is still better on the whole. There are a few regressions
being tracked (PR21137, PR21138, PR21139) but by and large this is
expected to be a win for x86 generated code performance.

It is also more correct than the code it replaces. I have fuzz tested
this extensively with ISA extensions up through AVX2 and found no
crashes or miscompiles (yet...). The old lowering had a few miscompiles
and crashers after a somewhat smaller amount of fuzz testing.

There is one significant area where the new code path lags behind and
that is in AVX-512 support. However, there was *extremely little*
support for that already and so this isn't a significant step backwards
and the new framework will probably make it easier to implement lowering
that uses the full power of AVX-512's table-based shuffle+blend (IMO).

Many thanks to Quentin, Andrea, Robert, and others for benchmarking
assistance. Thanks to Adam and others for help with AVX-512. Thanks to
Hal, Eric, and *many* others for answering my incessant questions about
how the backend actually works. =]

I will leave the old code path in the tree until the 3 PRs above are at
least resolved to folks' satisfaction. Then I will rip it (and 1000s of
lines of code) out. =] I don't expect this flag to stay around for very
long. It may not survive next week.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219046 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 03:52:55 +00:00
Jingyue Wu
ea1cccd0b6 Add fake use to suppress defined-but-unused warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 03:50:10 +00:00
Chandler Carruth
1e663cf69c [x86] Fix a bug in the VZEXT DAG combine that I just made more powerful.
It turns out this combine was always somewhat flawed -- there are cases
where nested VZEXT nodes *can't* be combined: if their types have
a mismatch that can be observed in the result. While none of these show
up in currently, once I switch to the new vector shuffle lowering a few
test cases actually form such nested VZEXT nodes. I've not come up with
any IR pattern that I can sensible write to exercise this, but it will
be covered by tests once I flip the switch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219044 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 02:51:03 +00:00
Chandler Carruth
cd2c1d8db1 [x86] Sink a generic combine of VZEXT nodes from the lowering to VZEXT
nodes to the DAG combining of them.

This will allow the combine to fire on both old vector shuffle lowering
and the new vector shuffle lowering and generally seems like a cleaner
design. I've trimmed down the code a bit and tried to make it and the
surrounding combine fairly clean while moving it around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219042 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-04 01:05:48 +00:00
Matt Arsenault
9747d27b59 R600/SI: Custom lower f64 -> i64 conversions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219038 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 23:54:56 +00:00
Matt Arsenault
ad2f641c33 R600: Custom lower [s|u]int_to_fp for i64 -> f64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219037 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 23:54:41 +00:00
Matt Arsenault
24cee77dd4 R600/SI: Fix ftrunc f64 conformance failures.
Re-add the tests since they were deleted at some point

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 23:54:27 +00:00
Peter Collingbourne
d6b988a347 Remove unused ALL_BINDINGS configuration variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219035 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 23:03:01 +00:00
Chandler Carruth
f159de96bd [x86] Add a really preposterous number of patterns for matching all of
the various ways in which blends can be used to do vector element
insertion for lowering with the scalar math instruction forms that
effectively re-blend with the high elements after performing the
operation.

This then allows me to bail on the element insertion lowering path when
we have SSE4.1 and are going to be doing a normal blend, which in turn
restores the last of the blends lost from the new vector shuffle
lowering when I got it to prioritize insertion in other cases (for
example when we don't *have* a blend instruction).

Without the patterns, using blends here would have regressed
sse-scalar-fp-arith.ll *completely* with the new vector shuffle
lowering. For completeness, I've added RUN-lines with the new lowering
here. This is somewhat superfluous as I'm about to flip the default, but
hey, it shows that this actually significantly changed behavior.

The patterns I've added are just ridiculously repetative. Suggestions on
making them better very much welcome. In particular, handling the
commuted form of the v2f64 patterns is somewhat obnoxious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219033 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 22:43:17 +00:00
Chris Bieneman
be77ea38e6 Converting the ErrorHandlerMutex to a ManagedStatic to avoid the static constructor and destructor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219028 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 22:03:12 +00:00
Chandler Carruth
91ea3e41ae [x86] Adjust the patterns for lowering X86vzmovl nodes which don't
perform a load to use blendps rather than movss when it is available.

For non-loads, blendps is *much* faster. It can execute on two ports in
Sandy Bridge and Ivy Bridge, and *three* ports on Haswell. This fixes
one of the "regressions" from aggressively taking the "insertion" path
in the new vector shuffle lowering.

This does highlight one problem with blendps -- it isn't commuted as
heavily as it should be. That's future work though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219022 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 21:38:49 +00:00
Jonathan Roelofs
69ee7cb4c3 Fix typo in TableGen documentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:46:05 +00:00
Sid Manning
4cd443ac18 Add unit tests to verify Hexagon emission.
Add the test cases I overlooked, part of the original commit,
http://reviews.llvm.org/D5523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219016 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:33:03 +00:00
Adrian Prantl
17dfc381ef Add a reference to Phabricator.rst to docs/index.rst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219015 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:17:32 +00:00
Richard Smith
2451e5b581 PR21145: Teach LLVM about C++14 sized deallocation functions.
C++14 adds new builtin signatures for 'operator delete'. This change allows
new/delete pairs to be removed in C++14 onwards, as they were in C++11 and
before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219014 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:17:06 +00:00
Duncan P. N. Exon Smith
83902832de Revert "Revert "DI: Fold constant arguments into a single MDString""
This reverts commit r218918, effectively reapplying r218914 after fixing
an Ocaml bindings test and an Asan crash.  The root cause of the latter
was a tightened-up check in `DILexicalBlock::Verify()`, so I'll file a
PR to investigate who requires the loose check (and why).

Original commit message follows.

--

This patch addresses the first stage of PR17891 by folding constant
arguments together into a single MDString.  Integers are stringified and
a `\0` character is used as a separator.

Part of PR17891.

Note: I've attached my testcases upgrade scripts to the PR.  If I've
just broken your out-of-tree testcases, they might help.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219010 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:01:09 +00:00
Adam Nemet
726942c8bb [ISel] Keep matching state consistent when folding during X86 address match
In the X86 backend, matching an address is initiated by the 'addr' complex
pattern and its friends.  During this process we may reassociate and-of-shift
into shift-of-and (FoldMaskedShiftToScaledMask) to allow folding of the
shift into the scale of the address.

However as demonstrated by the testcase, this can trigger CSE of not only the
shift and the AND which the code is prepared for but also the underlying load
node.  In the testcase this node is sitting in the RecordedNode and MatchScope
data structures of the matcher and becomes a deleted node upon CSE.  Returning
from the complex pattern function, we try to access it again hitting an assert
because the node is no longer a load even though this was checked before.

Now obviously changing the DAG this late is bending the rules but I think it
makes sense somewhat.  Outside of addresses we prefer and-of-shift because it
may lead to smaller immediates (FoldMaskAndShiftToScale is an even better
example because it create a non-canonical node).  We currently don't recognize
addresses during DAGCombiner where arguably this canonicalization should be
performed.  On the other hand, having this in the matcher allows us to cover
all the cases where an address can be used in an instruction.

I've also talked a little bit to Dan Gohman on llvm-dev who added the RAUW for
the new shift node in FoldMaskedShiftToScaledMask.  This RAUW is responsible
for initiating the recursive CSE on users
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-September/076903.html) but it
is not strictly necessary since the shift is hooked into the visited user.  Of
course it's safer to keep the DAG consistent at all times (e.g. for accurate
number of uses, etc.).

So rather than changing the fundamentals, I've decided to continue along the
previous patches and detect the CSE.  This patch installs a very targeted
DAGUpdateListener for the duration of a complex-pattern match and updates the
matching state accordingly.  (Previous patches used HandleSDNode to detect the
CSE but that's not practical here).  The listener is only installed on X86.

I tested that there is no measurable overhead due to this while running
through the spec2k BC files with llc.  The only thing we pay for is the
creation of the listener.  The callback never ever triggers in spec2k since
this is a corner case.

Fixes rdar://problem/18206171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 20:00:34 +00:00
Tom Stellard
77859c9e9c R600: Align functions to 256 bytes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219002 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 19:02:02 +00:00
Benjamin Kramer
63688e622c Eliminate some deep std::vector copies. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218999 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:33:16 +00:00
Benjamin Kramer
3c5eaffc07 MCParser: Modernize memory handling.
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218998 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:32:55 +00:00
Robin Morisset
83e571e7ba [Power] Delete redundant test Atomics-32.ll
The test Atomics-32.ll was both redundant (all operations are also checked by
atomics.ll at least) and not actually checking correctness (it was not using
FileCheck, just verifying that the compiler does not crash).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218997 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:10:07 +00:00
Rui Ueyama
a6abd9e176 llvm-readobj: print out the fields of the COFF delay-import table
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:07:18 +00:00
Robin Morisset
8e2b2ae80e [Power] Use lwsync for non-seq_cst fences
Summary:
hwsync is only required for seq_cst fences, acquire and release one can use
the cheaper lwsync.

Test Plan: Added some cases to atomics.ll + make check-all

Reviewers: jfb, wschmidt

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5317

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218995 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 18:04:36 +00:00
Hans Wennborg
d8af735ca7 MipsAsmParser.cpp: fix VS2012 build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 17:16:24 +00:00
Hans Wennborg
8651aece06 HexagonMCCodeEmitter.h: deleted member functions are not supported in VS2012
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218990 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 17:02:28 +00:00
Daniel Sanders
61bc405795 [mips] Print warning when using register names not available in N32/64
Summary:
The register names t4-t7 are not available in the N32 and N64 ABIs.
This patch prints a warning, when those names are used in N32/64,
along with a fix-it with the correct register names.

Patch by Vasileios Kalintiris

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5272


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 15:37:37 +00:00
Sid Manning
c4d113192d Fix build break on Hexagon
Differential Revision: http://reviews.llvm.org/D5600

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218987 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 13:59:01 +00:00
Sid Manning
30d67d99cf Adding skeleton for unit testing Hexagon Code Emission
Adding and modifying CMakeLists.txt files to run unit tests under
unittests/Target/* if the directory exists.  Adding basic unit test to check
that code emitter object can be retrieved.

Differential Revision: http://reviews.llvm.org/D5523
Change by: Colin LeMahieu

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 13:18:11 +00:00
Chandler Carruth
dce98e6739 [x86] Teach the new vector shuffle lowering to aggressively form MOVSS
and MOVSD nodes for single element vector inserts.

This is particularly important because a number of patterns in the
backend detect these patterns and leverage them to simplify things. It
also fixes quite a few of the insertion bad code examples. However, it
regresses a specific area: when available, blendps and blendpd are
*dramatically* faster than movss and movsd respectively. But it doesn't
really work to form the blend logic first because the blends *aren't* as
crazy efficient when the data is coming from memory anyways, and thus
will have a movss or movsd regardless. Also, doing that would block
a bunch of the patterns that this is designed to hit.

So my plan is to go into the patterns for lowering MOVSS and MOVSD and
lower them via blends when available. However that's a pretty invasive
restructuring so it will need to be a follow-up patch.

I have already gone into the patterns to lower MOVSS and MOVSD from
memory using MOVLPD, etc. Without that, several of the test cases
I already have regress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218985 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 13:11:13 +00:00
Dan Liew
ea01fda5b3 [sphinx cleanup] Fix unexpected indentation warning introduced by r218937
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218982 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 12:28:48 +00:00
Renato Golin
b157cb7afd Revert 202433 - Provide a target override for the latest regalloc heuristic
That commit was introduced in order to help investigate a problem in ARM
codegen breaking from commit 202304 (Add a limit to the heuristic that register
allocates instructions in local order). Recent analisys indicated that the
problem no longer exists, so I'm reverting this change.

See PR18996.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218981 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 12:20:53 +00:00
Chandler Carruth
7ae6f2abf6 [x86] Refactor the element insertion logic in the new vector shuffle
lowering to handle the potential mirroring of 2-element vectors (because
we can't reliably sort them one way) in the caller rather than in the
insertion logic.

This will simplify things considerably as more ways to fail to match the
insertion are added because now we have a nice try and retry point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218980 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 12:01:55 +00:00
Alexander Musman
0cd2a891d8 Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218979 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:55:31 +00:00
Chandler Carruth
f6fb5f4f2e [x86] Fix the RUN-lines of this test to make sense.
I got them quite wrong when updating it and had the SSE4.1 run checked
for SSE2 and the SSE2 run checked for SSE4.1. I think everything was
actually generic SSE, but this still seems good to fix. While here,
hoist the triple into the IR and make the flag set a bit more direct in
what it is trying to test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218978 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:30:02 +00:00
Chandler Carruth
01b3858e66 [x86] Significantly improve the ability of the new vector shuffle
lowering to match VZEXT_MOVL patterns.

I hadn't realized that these had sufficient pattern smarts in the
backend to lower zext-ing from the low element of a vector without it
being a scalar_to_vector node. They do, and this is how to match a bunch
of patterns for movq, movss, etc.

There is a weird propensity to end up using pshufd to place the element
afterward even though it means domain crossing (or rather, to use
xorps+movss to zext the element rather than movq) but that's an
orthogonal problem with VZEXT_MOVL that someone should probably look at.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218977 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:25:58 +00:00
Chandler Carruth
ca77e58993 [x86] Add some important, missing test coverage for blending from one
vector to a zero vector for the v2 cases and fix the v4 integer cases to
actually blend from a vector.

There are already seprate tests for the case of inserting from a scalar.

These cases cover a lot of the regressions I've seen in the regression
test suite for the new vector shuffle lowering and specifically cover
the reported lack of using various zext-ing instruction patterns. My
next patch should fix a big chunk of this, but wanted to get a nice
baseline for these patterns in the test cases first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218976 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 11:16:45 +00:00
Chandler Carruth
53bf81ae59 [x86] Unbreak SSE1 with the new vector shuffle lowering. We can't widen
element types to form illegal vector types.

I've added a special SSE1 test case here that makes sure we don't break
this going forward.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218974 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-03 10:11:39 +00:00