Jim Grosbach
4d06138d53
Oops. Missed the isel half of this. revert while I sort that out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:51:31 +00:00
Jim Grosbach
10a630dea6
ARM assembly parsing for VST1 two-register encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144430 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:45:47 +00:00
Jim Grosbach
c7352f8ca0
ARM optional size suffix for VLDR/VSTR syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:34:43 +00:00
Chad Rosier
11add26ec2
Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:31:03 +00:00
Daniel Dunbar
b12f97534c
CMake: Fix CMake build for new Mips tblgen file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:12:56 +00:00
Jim Grosbach
7aef99b677
ARM vldm and vstm VFP instructions can take a data type suffix.
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It's ignored by the assembler when present, but is legal syntax. Other
instructions have something similar, but for some mnemonics it's
only sometimes not significant, so this quick check in the parser will
need refactored into something more robust soon-ish. This gets some
basics working in the meantime.
Partial for rdar://10435264
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:08:10 +00:00
Daniel Dunbar
f779757ceb
Target/LLVMBuild: Order components alphabetically.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:59:16 +00:00
Bruno Cardoso Lopes
47b92f3d83
Mips MC object code emission improvements:
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"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:58:42 +00:00
Jim Grosbach
c3937b97c0
Nuke no longer accurate comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144411 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:30:06 +00:00
Andrew Trick
95bc85e4ee
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
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Fixes PR8113.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 22:18:09 +00:00
Jim Grosbach
ce485e7f70
ARM allow Q registers in vldm/vstm register lists.
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rdar://9672822
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144407 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 21:27:40 +00:00
Dan Bailey
96e6458903
allow non-device function calls in PTX when natively handling device-side printf
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144388 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 14:45:12 +00:00
Dan Bailey
b812ee6d78
add rules in tabgen for PTX COPY_ADDRESS of frameindex
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 14:45:06 +00:00
Benjamin Kramer
eea66f63d9
Remove the unnecessary dependency on libARMCodeGen from libARMDisassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 12:39:41 +00:00
Benjamin Kramer
7fb12ef5a6
Remove the unnecessary dependency on libMBlazeCodeGen from libMBlazeDisassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 12:39:35 +00:00
Craig Topper
46154eb6fd
Add lowering for AVX2 shift instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 07:39:23 +00:00
Chad Rosier
1c47de87c7
Rename variables to avoid confusion. No functionallity change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 06:27:41 +00:00
Chad Rosier
a07d3fc693
Add support for using immediates with select instructions.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 06:20:39 +00:00
Akira Hatanaka
e184fec550
Do not try to detect DAG combine patterns for integer multiply-add/sub if value
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type is not i32. MIPS does not have 64-bit integer multiply-add/sub
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:18:21 +00:00
Akira Hatanaka
59068067cb
64-bit atomic instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:14:30 +00:00
Akira Hatanaka
46ac4399b1
Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:11:56 +00:00
Akira Hatanaka
c742e4fc90
Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:06:38 +00:00
Akira Hatanaka
642b109713
64-bit versions of jal, jalr and bal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:03:54 +00:00
Akira Hatanaka
a1fa08f66a
Emit Mips64's sequence of instructions that set global register in prologue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 04:00:29 +00:00
Akira Hatanaka
d5cf5a631f
Fix printing of MCSymbolRegExpr. Needs three closing parentheses for
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VK_Mips_GPOFF_HI/LO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 03:58:36 +00:00
Eli Friedman
15f58c56e9
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144361 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 03:16:38 +00:00
Chad Rosier
646abbfa30
When loading a value, treat an i1 as an i8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 02:38:59 +00:00
Bill Wendling
c739577d3c
If we have to reset the calculation of the compact encoding, then also reset the
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"saved register" index.
<rdar://problem/10430076>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:59:14 +00:00
Chad Rosier
4e89d97e3a
Add support for using MVN to materialize negative constants.
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rdar://10412592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:36:21 +00:00
Daniel Dunbar
5ed5506f18
LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 00:23:56 +00:00
Jim Grosbach
0352b4679e
Thumb2 ldm/stm updating w/ one register in the list are LDR/STR.
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rdar://10429490
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:58:34 +00:00
Jim Grosbach
83ec87755e
ARM let processInstruction() tranforms chain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:42:14 +00:00
Jim Grosbach
5402637ff2
Thumb2 parsing for push/pop w/ hi registers in the reglist.
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rdar://10130228.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:17:11 +00:00
Jim Grosbach
fae02597bb
Thumb1 diagnostics for reglist on PUSH/POP fix.
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Was not checking the first register in the register list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 23:01:27 +00:00
Jim Grosbach
1b332860ae
Thumb MUL assembly parsing for 3-operand form.
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Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 22:10:12 +00:00
Daniel Dunbar
eaf4221cef
build/MBlazeDisassembler: Some compilers may generate an MBlaze disassembler
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that depends on MBlazeCodeGen. This is a layering violation that should really
be fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 22:00:37 +00:00
Chad Rosier
16455ce1a4
When in ARM mode, LDRH/STRH require special handling of negative offsets.
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For correctness, disable this for now.
rdar://10418009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 21:09:49 +00:00
Jim Grosbach
d475f8612b
ARM .thumb_func directive for quoted symbol names.
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Use the getIdentifier() method of the token, not getString(), otherwise
we keep the quotes as part of the symbol name, which we don't want.
rdar://10428015
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 20:48:53 +00:00
Jim Grosbach
ee10ff89a2
ARM assembly parsing for LSR/LSL/ROR(immediate).
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More of rdar://9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 19:18:01 +00:00
Jim Grosbach
71810ab7c0
ARM assembly parsing for ASR(immediate).
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Start of rdar://9704684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 16:44:55 +00:00
Daniel Dunbar
977665c24a
build: Rename CBackend and CppBackend libraries to have CodeGen suffix, for
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consistency with other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 15:35:14 +00:00
Nadav Rotem
4dbe96e22f
AVX2: Add variable shift from memory.
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Note: These patterns only works in some cases because
many times the load sd node is bitcasted from a load
node of a different type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144266 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 06:54:20 +00:00
Chad Rosier
6cba97c555
For immediate encodings of icmp, zero or sign extend first. Then
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determine if the value is negative and flip the sign accordingly.
rdar://10422026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 01:30:39 +00:00
Daniel Dunbar
8333730259
build/Make & CMake: Pass the appropriate --native-target and --enable-targets
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options to llvm-build, so the all-targets etc. components are defined properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144255 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 01:16:48 +00:00
Daniel Dunbar
affc6cf9d2
llvm-build: Add --native-target and --enable-targets options, and add logic to
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handle defining the "magic" target related components (like native,
nativecodegen, and engine).
- We still require these components to be in the project (currently in
lib/Target) so that we have a place to document them and hopefully make it
more obvious that they are "magic".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 00:50:07 +00:00
Daniel Dunbar
6852b69e15
llvm-build: Change CBackend and CppBackend to not use library_name. This will
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change the generated library .a file name once we fully switch over, but
simplifies how we treat these targets without requiring more special casing
(since their library group name and the codegen library name currently map to
the same "llvm-config" style component name).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144251 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 00:49:55 +00:00
Daniel Dunbar
c352caf168
llvm-build: Add an explicit component type to represent targets.
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- Gives us a place to hang target specific metadata (like whether the target has a JIT).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 00:49:51 +00:00
Jim Grosbach
c27f6725b9
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-10 00:02:33 +00:00
Jim Grosbach
3c5d6e4df4
Thumb2 assembly parsing STMDB w/ optional .w suffix.
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rdar://10422955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 23:44:23 +00:00
Eli Friedman
14e809c872
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144241 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-09 23:36:02 +00:00