Commit Graph

700 Commits

Author SHA1 Message Date
Gabor Greif
99a6cb92d1 disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 22:36:50 +00:00
Chris Lattner
09c5d8baa2 typo fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55355 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-26 06:07:47 +00:00
Dan Gohman
6ecf50908c Make MBBMap a DenseMap instead of a std::map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55220 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 02:44:46 +00:00
Dan Gohman
f350b277f3 Move the point at which FastISel taps into the SelectionDAGISel
process up to a higher level. This allows FastISel to leverage
more of SelectionDAGISel's infastructure, such as updating Machine
PHI nodes.

Also, implement transitioning from SDISel back to FastISel in
the middle of a block, so it's now possible to go back and
forth. This allows FastISel to hand individual CallInsts and other
complicated things off to SDISel to handle, while handling the rest
of the block itself.

To help support this, reorganize the SelectionDAG class so that it
is allocated once and reused throughout a function, instead of
being completely reallocated for each block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55219 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 02:25:05 +00:00
Dan Gohman
6679906d97 Avoid creating shift-by-zero SDNodes in the common case of
i8* getelementptr. DAGCombine eliminates these, but this is
a fairly common case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55214 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-23 01:06:51 +00:00
Dan Gohman
3c8f36fd03 Reapply r55191 and r55192.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55205 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 21:28:19 +00:00
Bill Wendling
449416deb6 Reverting r55190, r55191, and r55192. They broke the build with this error message:
{standard input}:17:bad register name `%sil'
make[4]: *** [libgcc/./_addvsi3.o] Error 1
make[4]: *** Waiting for unfinished jobs....
{standard input}:23:bad register name `%dil'
{standard input}:28:bad register name `%dil'
make[4]: *** [libgcc/./_addvdi3.o] Error 1
{standard input}:18:bad register name `%sil'
make[4]: *** [libgcc/./_subvsi3.o] Error 1



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55200 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 20:51:05 +00:00
Dan Gohman
e0182ec0e4 Support non-fallthrough unconditional branches in FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55191 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-22 19:21:41 +00:00
Evan Cheng
83785c8096 First cut, un-optimized (and untested) fast isel lowering of GetElementPtrInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55085 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 22:45:34 +00:00
Dan Gohman
bb466331e7 Simplify FastISel's constructor argument list, make the FastISel
class hold a MachineRegisterInfo member, and make the
MachineBasicBlock be passed in to SelectInstructions rather
than the FastISel constructor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55076 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 21:05:57 +00:00
Dan Gohman
2385852b5b Dump the instruction that foiled ISel even when -debug is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55075 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 20:47:32 +00:00
Evan Cheng
d420789301 Kill off SimpleBBISel, it's replaced by FastISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55067 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 17:50:32 +00:00
Dan Gohman
a267651b7e Disable DAGCombine's alignment inference in "fast" codegen mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55059 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 16:30:28 +00:00
Dan Gohman
c53ec49885 Use BitVector instead of std::vector<unsigned char>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 14:58:41 +00:00
Dan Gohman
cc8430f742 Fix a leak in the FastISel code that Chris pointed out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55031 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:56:17 +00:00
Dan Gohman
3e697cfa97 Add support for running SelectionDAG if FastISel fails. This is under
a command-line option, so that the default behavior is an abort, which
is useful for exposing code that isn't supported yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55028 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-20 00:47:54 +00:00
Dan Gohman
78eca170e9 Add code to call FastISel, and a command-line option to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55015 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-19 22:33:34 +00:00
Gordon Henriksen
5eca075b74 Rename some GC classes so that their roll will hopefully be clearer.
In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:

  Collector               -> GCStrategy
  CollectorMetadata       -> GCFunctionInfo
  CollectorModuleMetadata -> GCModuleInfo
  CollectorRegistry       -> GCRegistry
  Function::getCollector  -> getGC (setGC, hasGC, clearGC)

Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54899 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 18:44:35 +00:00
Gordon Henriksen
5a29c9eed1 Factor GC metadata table assembly generation out of Collector in preparation for splitting AsmPrinter into its own library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54881 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-17 12:56:54 +00:00
Dan Gohman
925a7e8ed6 Rename SelectionDAGISel's FastISel to Fast, to begin to make
room for the new FastISel instruction selection code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54749 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-13 19:47:40 +00:00
Evan Cheng
381cb07544 Add skeleton of simple basic block instruction selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54522 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 07:27:28 +00:00
Evan Cheng
39fd6e81b1 Factor code that finalize PHI nodes, jump tables, etc. out of SelectBasicBlock. No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54438 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 00:43:25 +00:00
Owen Anderson
3bc9c6f3e7 Remove the -disable-correct-folding option, which was ugly and is no longer needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54361 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 18:27:54 +00:00
Owen Anderson
6ac8df7f61 This option doesn't need to be a target option. It can be in SDISel instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54336 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-05 00:27:28 +00:00
Owen Anderson
bd3ba461eb - Fix SelectionDAG to generate correct CFGs.
- Add a basic machine-level dead block eliminator.

These two have to go together, since many other parts of the code generator are unable to handle the unreachable blocks otherwise created.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54333 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:54:43 +00:00
Dan Gohman
6f498b0a8e Fix SDISel lowering of PHI nodes to use ComputeValueVTs.
This allows it to work correctly on aggregate values.
This fixes PR2623.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54331 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:42:46 +00:00
Dan Gohman
1f565bcff6 Fix SDISel lowering of zeroinitializer and undef to use ComputeValueVTs.
This allows it to work correctly on nested aggregate values.
This fixes PR2625.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54330 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-04 23:30:41 +00:00
Dale Johannesen
7232464bda Add a flag to disable jump table generation (all
switches use the binary search algorithm) for
environments that don't support it.  PPC64 JIT
is such an environment; turn the flag on for that.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54248 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-31 18:13:12 +00:00
Dan Gohman
90d33ee746 Don't look for leaf values to store when lowering stores of
empty structs. This fixes PR2612.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54226 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-30 18:36:51 +00:00
Nate Begeman
5bc1ea0736 Add vector shifts to the IR, patch by Eli Friedman.
CodeGen & Clang work coming next.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54161 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-29 15:49:41 +00:00
Dan Gohman
fed90b6d09 Fold the useful features of alist and alist_node into ilist, and
a new ilist_node class, and remove them. Unlike alist_node,
ilist_node doesn't attempt to manage storage itself, so it avoids
the associated problems, including being opaque in gdb.

Adjust the Recycler class so that it doesn't depend on alist_node.
Also, change it to use explicit Size and Align parameters, allowing
it to work when the largest-sized node doesn't have the greatest
alignment requirement.

Change MachineInstr's MachineMemOperand list from a pool-backed
alist to a std::list for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54146 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-28 21:51:04 +00:00
Dan Gohman
475871a144 Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-27 21:46:04 +00:00
Dan Gohman
8b4588fa64 Use AliasAnalysis::pointsToConstantMemory in SDISel to avoid unnecessary
dependencies with constant load nodes. This allows them to be scheduled
freely.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54001 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-25 00:04:14 +00:00
Dan Gohman
fc74abfba5 Enable first-class aggregates support.
Remove the GetResultInst instruction. It is still accepted in LLVM assembly
and bitcode, where it is now auto-upgraded to ExtractValueInst. Also, remove
support for return instructions with multiple values. These are auto-upgraded
to use InsertValueInst instructions.

The IRBuilder still accepts multiple-value returns, and auto-upgrades them
to InsertValueInst instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53941 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-23 00:34:11 +00:00
Dan Gohman
2dbc167294 After early-lowering the FORMAL_ARGUMENTS node, delete it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53874 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 21:04:07 +00:00
Dan Gohman
462dc7f496 Add titles to the various SelectionDAG viewGraph calls
that include useful information like the name of the
block being viewed and the current phase of compilation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53872 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-21 20:00:07 +00:00
Duncan Sands
f00e74f4d6 Turn LegalizeTypes back off again for the moment:
it is breaking Darwin bootstrap due to missing
functionality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53721 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-17 17:06:03 +00:00
Duncan Sands
7f1d8aeef6 Turn on LegalizeTypes by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53671 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-16 11:36:51 +00:00
Dan Gohman
5e84368b26 Reapply 53476 and 53480, with a fix so that it properly updates
the BB member to the current basic block after emitting
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53567 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-14 18:19:29 +00:00
Evan Cheng
b5eec33dcd Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53502 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-12 01:38:51 +00:00
Dan Gohman
dbe2a5a269 Add support for putting NamedRegionTimers in TimerGroups, and
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53476 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-11 21:54:34 +00:00
Chris Lattner
70587ea813 make legalize types be a command line option: -enable-legalize-types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53434 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-10 23:37:50 +00:00
Dan Gohman
0e5f1306b0 Pool-allocation for SDNodes. The pool is allocated once for each function,
and reused across SelectionDAGs.

This drastically reduces the number of calls to malloc/free made during
instruction selection, and improves memory locality.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53211 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-07 23:02:41 +00:00
Duncan Sands
126d90770b Rather than having a different custom legalization
hook for each way in which a result type can be
legalized (promotion, expansion, softening etc),
just use one: ReplaceNodeResults, which returns
a node with exactly the same result types as the
node passed to it, but presumably with a bunch of
custom code behind the scenes.  No change if the
new LegalizeTypes infrastructure is not turned on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53137 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-04 11:47:58 +00:00
Bill Wendling
10fff6078a Revert my previous check-in that split up MachineModuleInfo. It turns out to
slow the compiler down at -O0 some 30% or more. Ooops.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53120 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-03 22:53:42 +00:00
Duncan Sands
4bdcb61af3 Add a new getMergeValues method that does not need
to be passed the list of value types, and use this
where appropriate.  Inappropriate places are where
the value type list is already known and may be
long, in which case the existing method is more
efficient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53035 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-02 17:40:58 +00:00
Evan Cheng
f1a792bc59 Do run ComputeLiveOutVRegInfo with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52975 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 18:15:04 +00:00
Evan Cheng
4576f6d7a9 Do not use computationally expensive scheduling heuristics with -fast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52971 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 18:05:03 +00:00
Evan Cheng
ebffb660a6 Apply Chris' suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52970 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 17:59:20 +00:00
Dan Gohman
4406604047 Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52943 91177308-0d34-0410-b5e6-96231b3b80d8
2008-07-01 00:05:16 +00:00