Commit Graph

11896 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
813d99877a [MMX] Use the appropriate instructions for GR64 <-> VR64 copies.
MOVSDto64rr and MOV64toSDrr are defined to convert between FR64 (%xmm)
<-> GR64 registers, not VR64 (%mm) <-> GR64. This is wrong.

I found this by inspection and could not find a suitable testcase for it
since (1) we don't handle MMX bitcasts in Peephole optimizer as to
generate COPYs that (2) could be expanded back to the appropriate x86
instruction in ExpandPostRA.

Switch to use the appropriate instructions: MMX_MOVD64from64rr and
MMX_MOVD64to64rr here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 20:09:34 +00:00
Matthias Braun
2addf067a2 MachineRegisterInfo: Remove UsedPhysReg infrastructure
We have a detailed def/use lists for every physical register in
MachineRegisterInfo anyway, so there is little use in maintaining an
additional bitset of which ones are used.

Removing it frees us from extra book keeping. This simplifies
VirtRegMap.

Differential Revision: http://reviews.llvm.org/D10911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242173 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 17:52:07 +00:00
Matthias Braun
a36268215f PrologEpilogInserter: Rewrite API to determine callee save regsiters.
This changes TargetFrameLowering::processFunctionBeforeCalleeSavedScan():

- Rename the function to determineCalleeSaves()
- Pass a bitset of callee saved registers by reference, thus avoiding
  the function-global PhysRegUsed bitset in MachineRegisterInfo.
- Without PhysRegUsed the implementation is fine tuned to not save
  physcial registers which are only read but never modified.

Related to rdar://21539507

Differential Revision: http://reviews.llvm.org/D10909

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 17:17:13 +00:00
NAKAMURA Takumi
9743de8916 Prune trailing whitespaces and CRs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242117 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-14 04:03:49 +00:00
Reid Kleckner
c6d1cc7e16 [WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name
Add another C++ 32-bit EH table test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242044 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 17:55:14 +00:00
Elena Demikhovsky
a0a51734cd AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types.
In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.

Differential Revision: http://reviews.llvm.org/D11134



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242023 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-13 13:26:20 +00:00
Simon Pilgrim
9c64d9cc04 [X86][SSE] (V)PMINSB is commutable.
(V)PMINSB is no different to the other (V)PMIN/(V)PMAX B/D/W instructions - it is fully commutable.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241994 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-12 16:44:11 +00:00
Simon Pilgrim
b3a04b5806 Trim trailing whitespaces. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-12 11:17:33 +00:00
Simon Pilgrim
f9df477221 [X86][SSE] Vectorized v4i32 non-uniform shifts.
While the v4i32 shl operation is already vectorized using a cvttps2dq/pmulld pattern, the lshr/ashr opeations are still scalarized.

This patch adds vectorization support for non-uniform v4i32 shift operations - it splats constant shift amounts to allow them to use the immediate sse shift instructions, or extracts/zero-extends non-constant shift amounts. The individual results are then blended together.

Differential Revision: http://reviews.llvm.org/D11063

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241989 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-12 11:15:19 +00:00
Duncan P. N. Exon Smith
16859aa242 MC: Remove MCSubtargetInfo() default constructor
Force all creators of `MCSubtargetInfo` to immediately initialize it,
merging the default constructor and the initializer into an initializing
constructor.  Besides cleaning up the code a little, this makes it clear
that the initializer is never called again later.

Out-of-tree backends need a trivial change: instead of calling:

    auto *X = new MCSubtargetInfo();
    InitXYZMCSubtargetInfo(X, ...);
    return X;

they should call:

    return createXYZMCSubtargetInfoImpl(...);

There's no real functionality change here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241957 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-10 22:43:42 +00:00
Duncan P. N. Exon Smith
5733fd14d4 MC: Remove MCSubtargetInfo::InitCPUSched()
Remove all calls to `MCSubtargetInfo::InitCPUSched()` and merge its body
into the only relevant caller, `MCSubtargetInfo::InitMCProcessorInfo()`.
We were only calling the former after explicitly calling the latter with
the same CPU; it's confusing to have both methods exposed.

Besides a minor (surely unmeasurable) speedup in ARM and X86 from
avoiding running the logic twice, no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241956 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-10 22:33:01 +00:00
JF Bastien
99cb989593 Target RegisterInfo: devirtualize TargetFrameLowering
Summary:
The target frame lowering's concrete type is always known in RegisterInfo, yet it's only sometimes devirtualized through a static_cast. This change adds an auto-generated static function <Target>GenRegisterInfo::getFrameLowering(const MachineFunction &MF) which does this devirtualization, and uses this function in all targets which can.

This change was suggested by sunfish in D11070 for WebAssembly, I figure that I may as well improve the other targets while I'm here.

Subscribers: sunfish, ted, llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241921 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-10 18:13:17 +00:00
Reid Kleckner
b4eeb6bca5 [WinEH] Make sure LSDA tables are 4 byte aligned
Apparently this is important, otherwise _except_handler3 assumes that
the registration node is corrupted and ignores it.

Also fix a bug in WinEHPrepare where we would insert code after a
terminator instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241877 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-10 00:08:49 +00:00
Sanjay Patel
c68ccc1a70 [x86] enable machine combiner reassociations for scalar double-precision multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241873 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:58:39 +00:00
Sanjay Patel
39f09b5150 [x86] enable machine combiner reassociations for scalar double-precision adds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241871 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:48:54 +00:00
Reid Kleckner
5cf6c0b070 [WinEH] Give up on using CSRs across 32-bit invokes for now
The runtime does not restore CSRs when transferring control back to the
function handling the exception. According to the experts on IRC, LLVM's
register allocator has no way to model register clobbers that only
happen on one edge of the CFG. For now, don't worry about trying to use
the meager three CSRs available on 32-bit X86 and just say that such
invokes preserve nothing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:09:41 +00:00
Pat Gavlin
db5a82b861 Allow {e,r}bp as the target of {read,write}_register.
This patch allows the read_register and write_register intrinsics to
read/write the RBP/EBP registers on X86 iff the targeted register is
the frame pointer for the containing function.

Differential Revision: http://reviews.llvm.org/D10977

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 17:40:29 +00:00
Mehdi Amini
cdc323b2b7 Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT user
A documentation for this function would be nice by the way.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 15:12:23 +00:00
Pawel Bylica
dbbfabaf01 Reapply fixed r241790: Fix shift legalization and lowering for big constants.
Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt.

Reviewers: nadav, majnemer, sanjoy, RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: http://reviews.llvm.org/D10767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:58:04 +00:00
Pawel Bylica
b0205f5937 Revert r241790: Fix shift legalization and lowering for big constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241792 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 09:50:54 +00:00
Pawel Bylica
71386b0e04 Fix shift legalization and lowering for big constants.
Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt.

Reviewers: nadav, majnemer, sanjoy, RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: http://reviews.llvm.org/D10767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 08:01:36 +00:00
Mehdi Amini
dc4dccabf3 Remove getDataLayout() from TargetSelectionDAGInfo (had no users)
Summary:
Remove empty subclass in the process.

This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren, ted

Differential Revision: http://reviews.llvm.org/D11045

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:10:08 +00:00
Mehdi Amini
691b2ff11e Remove getDataLayout() from TargetLowering
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: yaron.keren, rafael, llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11042

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:09:52 +00:00
Mehdi Amini
0e496c884c Make isLegalAddressingMode() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11040

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:09:40 +00:00
Mehdi Amini
027a9f4561 Make getByValTypeAlignment() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: yaron.keren, rafael, llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D11038

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241777 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:09:28 +00:00
Mehdi Amini
29a2d864d4 Make TargetLowering::getShiftAmountTy() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11037

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241776 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:09:20 +00:00
Mehdi Amini
f29cc18dcb Make TargetLowering::getPointerTy() taking DataLayout as an argument
Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D11028

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:09:04 +00:00
Mehdi Amini
966e6ca1ac Make TargetTransformInfo keeping a reference to the Module DataLayout
DataLayout is no longer optional. It was initialized with or without
a DataLayout, and the DataLayout when supplied could have been the
one from the TargetMachine.

Summary:
This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, llvm-commits, rafael, yaron.keren

Differential Revision: http://reviews.llvm.org/D11021

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:08:42 +00:00
Mehdi Amini
103bdfccee Redirect DataLayout from TargetMachine to Module in ComputeValueVTs()
Summary:
Avoid using the TargetMachine owned DataLayout and use the Module owned
one instead. This requires passing the DataLayout up the stack to
ComputeValueVTs().

This change is part of a series of commits dedicated to have a single
DataLayout during compilation by using always the one owned by the
module.

Reviewers: echristo

Subscribers: jholewinski, yaron.keren, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D11019

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241773 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 01:57:34 +00:00
Sanjay Patel
f769239c19 [x86] enable machine combiner reassociations for scalar single-precision multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241752 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 22:35:20 +00:00
Reid Kleckner
f8d3677531 [Win64] Only treat some functions as having the Win64 convention
All the usual X86 target-specific conventions are collapsed to the
normal Win64 convention, but the custom conventions like GHC and webkit
should not be.

Previously we would assume that the caller allocated 32 bytes of shadow
space for us, which is not how webkit_jscc or other custom conventions
are supposed to work.

Based on a patch by peavo@outlook.com.

Fixes PR24051.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241725 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 21:03:47 +00:00
Reid Kleckner
f0999f3b02 [SEH] Ensure that empty __except blocks have their own BB
The 32-bit lowering assumed that WinEHPrepare had this invariant.
WinEHPrepare did it for C++, but not SEH. The result was that we would
insert calls to llvm.x86.seh.restoreframe in normal basic blocks, which
corrupted the frame pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 18:08:52 +00:00
Simon Pilgrim
796a06d4eb [X86][SSE] Added (V)ROUNDSD + (V)ROUNDSS stack folding support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241671 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 08:07:57 +00:00
Reid Kleckner
39ee70ca76 [WinEH] Make llvm.x86.seh.restoreframe work for stack realignment prologues
The incoming EBP value points to the end of a local stack allocation, so
we can use that to restore ESI, the base pointer. Once we do that, we
can use local stack allocations. If we know we need stack realignment,
spill the original frame pointer in the prologue and reload it after
restoring ESI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241648 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 23:45:58 +00:00
Reid Kleckner
4fe74caa61 [WinEH] Add localaddress intrinsic instead of using frameaddress
Clang uses this for SEH finally. The new intrinsic will produce the
right value when stack realignment is required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241643 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 23:23:03 +00:00
Reid Kleckner
8f32e5f0d6 Rename llvm.frameescape and llvm.framerecover to localescape and localrecover
Summary:
Initially, these intrinsics seemed like part of a family of "frame"
related intrinsics, but now I think that's more confusing than helpful.
Initially, the LangRef specified that this would create a new kind of
allocation that would be allocated at a fixed offset from the frame
pointer (EBP/RBP). We ended up dropping that design, and leaving the
stack frame layout alone.

These intrinsics are really about sharing local stack allocations, not
frame pointers. I intend to go further and add an `llvm.localaddress()`
intrinsic that returns whatever register (EBP, ESI, ESP, RBX) is being
used to address locals, which should not be confused with the frame
pointer.

Naming suggestions at this point are welcome, I'm happy to re-run sed.

Reviewers: majnemer, nicholas

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11011

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241633 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 22:25:32 +00:00
Reid Kleckner
d0c71cfdf6 Use default member initializers to deduplicate code in X86MachineFunctionInfo, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 18:12:06 +00:00
Reid Kleckner
db38d7657a [WinEH] Add a report_fatal_error for 32-bit stack realignment
This type of prologue isn't supported yet. Implementing it should be a
matter of copying the adjusted incoming EBP into ESI (the base pointer)
instead of EBP.  The original EBP can be saved and restored from other
memory afterwards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241597 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 15:47:29 +00:00
Sanjay Patel
08c4cbeeae use range-based for loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241592 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 15:03:53 +00:00
Denis Protivensky
2b4a535b70 Fix gcc warnings of different enum and non-enum types in ternaries
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-07 07:48:48 +00:00
Simon Pilgrim
315fd86400 [X86][AVX] Add support for shuffle decoding of vperm2f128/vperm2i128 with zero'd lanes
The vperm2f128/vperm2i128 shuffle mask decoding was not attempting to deal with shuffles that give zero lanes. This patch fixes this so that the assembly printer can provide shuffle comments.

As this decoder is also used in X86ISelLowering for shuffle combining, I've added an early-out to match existing behaviour. The hope is that we can add zero support in the future, this would allow other ops' decodes (e.g. insertps) to be combined as well.

Differential Revision: http://reviews.llvm.org/D10593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241516 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 22:46:46 +00:00
Sanjay Patel
75a2ce3271 [x86] extend machine combiner reassociation optimization to SSE scalar adds
Extend the reassociation optimization of http://reviews.llvm.org/rL240361 (D10460)
to SSE scalar FP SP adds in addition to AVX scalar FP SP adds.

With the 'switch' in place, we can trivially add other opcodes and test cases in
future patches.

Differential Revision: http://reviews.llvm.org/D10975



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241515 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 22:35:29 +00:00
Simon Pilgrim
6970be03d1 [X86][SSE] Vectorized i64 uniform constant SRA shifts
This patch adds vectorization support for uniform constant i64 arithmetic shift right operators.

Differential Revision: http://reviews.llvm.org/D9645

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 22:35:19 +00:00
Simon Pilgrim
3ecdd44e5d [X86][SSE4A] Shuffle lowering using SSE4A EXTRQ/INSERTQ instructions
This patch adds support for v8i16 and v16i8 shuffle lowering using the immediate versions of the SSE4A EXTRQ and INSERTQ instructions. Although rather limited (they can only act on the lower 64-bits of the source vectors, leave the upper 64-bits of the result vector undefined and don't have VEX encoded variants), the instructions are still useful for the zero extension of any lane (EXTRQ) or inserting a lane into another vector (INSERTQ). Testing demonstrated that it wasn't typically worth it to use these instructions for v2i64 or v4i32 vector shuffles although they are capable of it.

As well as adding specific pattern matching for the shuffles, the patch uses EXTRQ for zero extension cases where SSE41 isn't available and its more efficient than the SSE2 'unpack' default approach. It also adds shuffle decode support for the EXTRQ / INSERTQ cases when the instructions are handling full byte-sized extractions / insertions.

From this foundation, future patches will be able to make use of the instructions for situations that use their ability to extract/insert at the bit level.

Differential Revision: http://reviews.llvm.org/D10146

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 20:46:41 +00:00
Simon Pilgrim
ecb00f403c [X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN opcodes and remove the X86 implementation
With the completion of D9746 there is now a common implementation of integer signed/unsigned min/max nodes, removing the need for the equivalent X86 specific implementations.

This patch removes the old X86ISD nodes, legalizes the relevant SSE2/SSE41/AVX2/AVX512 instructions for the ISD versions and converts the small amount of existing X86 code.

Differential Revision: http://reviews.llvm.org/D10947

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241506 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 20:30:47 +00:00
Daniel Sanders
96fe9196e9 Change the last few internal StringRef triples into Triple objects.
Summary:
This concludes the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

At this point, the StringRef-form of GNU Triples should only be used in the
public API (including IR serialization) and a couple objects that directly
interact with the API (most notably the Module class). The next step is to
replace these Triple objects with the TargetTuple object that will represent
our authoratative/unambiguous internal equivalent to GNU Triples.

Reviewers: rengolin

Subscribers: llvm-commits, jholewinski, ted, rengolin

Differential Revision: http://reviews.llvm.org/D10962

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 16:56:07 +00:00
Asaf Badouh
169ee3383c [X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale
pmulhrsw

review:
http://reviews.llvm.org/D10948

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-06 14:03:40 +00:00
Peter Collingbourne
ce2b45bd7d IR: Do not consider available_externally linkage to be linker-weak.
From the linker's perspective, an available_externally global is equivalent
to an external declaration (per isDeclarationForLinker()), so it is incorrect
to consider it to be a weak definition.

Also clean up some logic in the dead argument elimination pass and clarify
its comments to better explain how its behavior depends on linkage,
introduce GlobalValue::isStrongDefinitionForLinker() and start using
it throughout the optimizers and backend.

Differential Revision: http://reviews.llvm.org/D10941

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241413 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 20:52:35 +00:00
Benjamin Kramer
54b3b4c15e [TargetLowering] StringRefize asm constraint getters.
There is some functional change here because it changes target code from
atoi(3) to StringRef::getAsInteger which has error checking. For valid
constraints there should be no difference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241411 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 19:29:18 +00:00
Asaf Badouh
5047893c31 [x86][AVX512] add Multiply High Op
include encoding and intrinsics tests.

review
http://reviews.llvm.org/D10896

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241406 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-05 12:23:20 +00:00