Commit Graph

90181 Commits

Author SHA1 Message Date
Christian Konig
d3b5509b80 R600/SI: add post ISel folding for SI v2
Include immediate folding and SGPR limit handling for VOP3 instructions.

v2: remove leftover hasExtraSrcRegAllocReq

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176101 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 17:52:23 +00:00
Christian Konig
c018ecac2f R600/SI: add folding helper
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176100 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 17:52:16 +00:00
Christian Konig
749428f852 R600/SI: fix VOP3b encoding v2
v2: document why we hardcode VCC for now.

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176099 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 17:52:09 +00:00
Christian Konig
6fd49bc89a R600/SI: fix and cleanup SI register definition v2
Prevent producing real strange tablegen code by using
proper register sizes, alignments and hierarchy.

Also cleanup the unused definitions and add some comments.

v2: add SGPR 512 bit registers, stop registers from wrapping around,
    fix SGPR alignment

This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176098 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 17:52:03 +00:00
Christian Konig
a25b8d4c0b R600/SI: fix stupid typo
This is a candidate for the mesa-stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176097 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 17:51:57 +00:00
Renato Golin
37527d1943 Adding ARM as supported architecture
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176096 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 17:23:13 +00:00
Renato Golin
e57aaf038f Proper XFAILs for ARMv7 / v5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176095 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 17:16:27 +00:00
Bill Schmidt
3a42989d3d Fix PR15359.
The PowerPC TLS relocation types were not previously added to the
necessary list in MCELFStreamer::fixSymbolsInTLSFixups().  Now they are!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176094 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 16:41:03 +00:00
Renato Golin
86ab766ae9 GCC 4.6.3 O3 miscompiles on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176090 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 13:32:40 +00:00
Kostya Serebryany
8eec41fc77 Unify clang/llvm attributes for asan/tsan/msan (LLVM part)
These are two related changes (one in llvm, one in clang).
LLVM: 
- rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode)
- rename thread_safety => sanitize_thread
- rename no_uninitialized_checks -> sanitize_memory

CLANG: 
- add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis))
- add __attribute__((no_sanitize_thread))
- add __attribute__((no_sanitize_memory))

for S in address thread memory
If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not
set llvm attribute sanitize_S


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176075 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 06:58:09 +00:00
Michael Ilseman
ce522ee0a2 Use a DenseMap instead of a std::map for AnalysisID -> Pass* maps. This reduces the pass-manager overhead from FPPassManager::runOnFunction() by about 10%.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176072 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 01:31:59 +00:00
Akira Hatanaka
70cdcd5114 [mips] Use class RegDefsUses to track register defs and uses.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176070 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 01:30:05 +00:00
Chad Rosier
fe88aa0d14 [fast-isel] Make sure the FastLowerArguments function checks to make sure the
arguments type is a simple type.
rdar://13290455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176066 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-26 01:05:31 +00:00
Michael Liao
d09318f901 Refine fix to PR10499, no functionality change
- Put expensive checking after simple one



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176060 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 23:16:36 +00:00
Michael Liao
5e6e15caa7 Fix PR10499
- Check whether SSE is available before lowering all 1s vector building with
  PCMPEQD, which is only available from SSE2



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 23:01:03 +00:00
Andrew Kaylor
b90cc2fa0b Provide workaround for PR 15130.
This changes the RecordingMemoryManager in lli to use mapped memory rather than malloc to allocate memory for sections and uses a 'near' MemoryBlock to keep the allocations together.  This works around a problem in MCJIT where relocations are applied to a generated image immediately oupon generation, which isn't appropriate for the remote case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176057 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 23:00:19 +00:00
Chad Rosier
ffa1dbadaf Fix wording.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176055 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 22:20:00 +00:00
Chad Rosier
823e95d3cd Remove extraneous attribute number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176053 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 22:06:05 +00:00
Chad Rosier
fd3417d288 [fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 or
fewer scalar integer (i32 or i64) arguments. It completely eliminates the need
for SDISel for trivial functions.

Also, add the new llc -fast-isel-abort-args option, which is similar to
-fast-isel-abort option, but for formal argument lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176052 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 21:59:35 +00:00
Andrew Trick
029f4fd2ff pre-RA-sched fix: only reevaluate physreg interferences when necessary.
Fixes rdar:13279013: scheduler was blowing up on select instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176037 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 19:11:48 +00:00
Chad Rosier
dca83187b7 [ms-inline asm] Add support for the pushad/popad mnemonics.
rdar://13254235

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176036 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 19:06:27 +00:00
Renato Golin
035a1f41a2 ARM build docs easier for copy&paste
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176033 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 18:25:58 +00:00
Matt Beaumont-Gay
50e75bfc29 'Hexadecimal' has two 'a's and only one 'i'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176031 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 18:11:18 +00:00
Bill Schmidt
fc7695a653 Fix missing relocation for TLS addressing peephole optimization.
Report and fix due to Kai Nacke.  Testcase update by me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176029 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 16:44:35 +00:00
Chandler Carruth
7e6ffac9ab Fix spelling noticed by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176023 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 14:29:38 +00:00
Chandler Carruth
af23f8e403 Fix the root cause of PR15348 by correctly handling alignment 0 on
memory intrinsics in the SDAG builder.

When alignment is zero, the lang ref says that *no* alignment
assumptions can be made. This is the exact opposite of the internal API
contracts of the DAG where alignment 0 indicates that the alignment can
be made to be anything desired.

There is another, more explicit alignment that is better suited for the
role of "no alignment at all": an alignment of 1. Map the intrinsic
alignment to this early so that we don't end up generating aligned DAGs.

It is really terrifying that we've never seen this before, but we
suddenly started generating a large number of alignment 0 memcpys due to
the new code to do memcpy-based copying of POD class members. That patch
contains a bug that rounds bitfield alignments down when they are the
first field. This can in turn produce zero alignments.

This fixes weird crashes I've seen in library users of LLVM on 32-bit
hosts, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176022 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 14:20:21 +00:00
Reed Kotler
de89ecd011 Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 02:25:47 +00:00
David Blaikie
6172f02983 DIBuilder: support structs with vtable pointers in the same way as classes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176004 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-25 01:07:18 +00:00
Reed Kotler
29cb2591f9 Make psuedo FEXT_T8I816_ins into a custom emitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176002 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 23:17:51 +00:00
Bill Schmidt
4edd84da1b Fix PR14364.
This removes a const_cast hack from PPCRegisterInfo::hasReservedSpillSlot().
The proper place to save the frame index for the CR spill slot is in the
PPCFunctionInfo object, not the PPCRegisterInfo object.

No new test cases, as this just reimplements existing function.  Existing
tests such as test/CodeGen/PowerPC/crsave.ll are sufficient.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 17:34:50 +00:00
Benjamin Kramer
e8aa36a4af CVP: If we have a PHI with an incoming select, try to skip the select.
This is a common pattern with dyn_cast and similar constructs, when the
PHI no longer depends on the select it can often be turned into a simpler
construct or even get hoisted out of the loop.

PR15340.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175995 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 15:34:43 +00:00
Benjamin Kramer
bd4b21ea41 Fix invalid IR in test, missing incoming value for PHI node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175994 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 15:34:29 +00:00
Francois Pichet
f4aa644dff Typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175991 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 12:34:13 +00:00
Nadav Rotem
f8db4478f8 Revert r169638 because it broke Mesa llvmpipe tests.
Fix PR15239.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 07:09:35 +00:00
Reed Kotler
459d35cb79 Make psuedo FEXT_T8I816_ins a custom inserter. It should be expanded
as early as possible; which means during instruction selection.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175984 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 06:16:39 +00:00
Cameron Zwarich
cc6137e30b Add a use of an otherwise unused variable to remove a warning in non-Asserts
builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175981 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 01:26:05 +00:00
Cameron Zwarich
eb1b7254cf TwoAddressInstructionPass::tryInstructionTransform() only potentially returns
true when shouldOnlyCommute is false, so we can remove code that checks
otherwise.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175980 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 00:27:29 +00:00
Cameron Zwarich
c5a6349ae8 TwoAddrInstructionPass::tryInstructionTransform() has a case where it calls
itself recursively with a new instruction that has not been finalized, in order
to determine whether to keep the instruction. On 'make check' and test-suite the
only cases where the recursive invocation made any transformations were simple
instruction commutations, so I am restricting the recursive invocation to do
only this.

The other cases wouldn't work correctly when updating LiveIntervals, since the
new instructions don't have slot indices and LiveIntervals hasn't yet been
updated. If the other transformations were actually triggering in any test case
it would be possible to support it with a lot of effort, but since they don't
it's not worth it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175979 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-24 00:27:26 +00:00
Reed Kotler
e7c67492dd Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses
proper. Fixed this already a few days ago for slti.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175975 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 23:37:03 +00:00
Cameron Zwarich
1ea93c79bc TargetInstrInfo::commuteInstruction() doesn't actually return a new instruction
unless it was requested to with an optional parameter that defaults to false, so
we don't need to handle that case in TwoAddressInstructionPass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 23:13:28 +00:00
Renato Golin
abafaba4d5 Add global structure vectorization to docs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175965 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 13:25:41 +00:00
Renato Golin
4ff470e608 Some more tests for the global structure vectorizer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 12:48:30 +00:00
Benjamin Kramer
36bd16ef0b X86: Disable cmov-memory patterns on subtargets without cmov.
Fixes PR15115.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175962 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 10:40:58 +00:00
Cameron Zwarich
79f5ab1931 Make some fixes for LiveInterval repair with debug info. Debug value
MachineInstrs don't have a slot index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 10:25:25 +00:00
Cameron Zwarich
b4bd022731 Fix a bug with the LiveIntervals updating in the two-address pass found by
running ASCI_Purple/SMG2000 in the test-suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 04:49:22 +00:00
Cameron Zwarich
4c57942608 Make TwoAddressInstructionPass::sink3AddrInstruction() LiveIntervals-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175956 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 04:49:20 +00:00
Cameron Zwarich
80885e524f Make rescheduleMIBelowKill() and rescheduleKillAboveMI() LiveIntervals-aware in
TwoAddressInstructionPass. The code in rescheduleMIBelowKill() is a bit tricky,
since multiple instructions need to be moved down, one-at-a-time, in reverse
order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 04:49:13 +00:00
Reed Kotler
50354a3f4a Expand pseudos/macros for Selt. This is the last of the complex
macros.The rest is some small misc. stuff.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175950 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 03:09:56 +00:00
Jim Grosbach
1e8ed2537b ARM: Convenience aliases for 'srs*' instructions.
Handle an implied 'sp' operand.

rdar://11466783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175940 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 00:52:09 +00:00
Michael Gottesman
3603e9aa5e Fixed a careless mistake.
rdar://13273675.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175939 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-23 00:31:32 +00:00