Commit Graph

484 Commits

Author SHA1 Message Date
4360bdcf1f CALL node change (arg / sign pairs instead of just arguments).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28462 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:57:32 +00:00
d74ea2bbd8 Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov!  This is a step towards closing PR786.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 17:04:05 +00:00
2ef5e89dc9 Fix CodeGen/Generic/vector.ll:test_div with altivec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28445 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 00:15:25 +00:00
5734012375 Handle SETO* like we handle SET*, restoring behavior after Evan's setcc
change.  This fixes PowerPC/fnegsel.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28443 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-24 00:06:44 +00:00
c703a8fbf8 Make PPC call lowering more aggressive, making the isel matching code simple
enough to be autogenerated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28354 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 19:00:46 +00:00
9a2a497284 Switch PPC over to a call-selection model where the lowering code creates
the copyto/fromregs instead of making the PPCISD::CALL selection code create
them.  This vastly simplifies the selection code, and moves the ABI handling
parts into one place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 06:01:33 +00:00
c8b682ca19 3 changes, 2 of which are cleanup one of which changes codegen:
1. Rearrange code a bit so that the special case doesn't require indenting lots
   of code.
2. Add comments describing PPC calling convention.
3. Only round up to 56-bytes of stack space for an outgoing call if the callee
   is varargs.  This saves a bit of stack space.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28342 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 00:15:40 +00:00
c04ba7a97d implement passing/returning vector regs to calls, at least non-varargs calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28341 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 23:54:25 +00:00
abde460d4f Instead of implementing LowerCallTo directly, let the default impl produce an
ISD::CALL node, then custom lower that.  This means that we only have to handle
LEGAL call operands/results, not every possible type.  This allows us to
simplify the call code, shrinking it by about 1/3.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28339 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 22:56:08 +00:00
af4ec0c56d Simplify the argument counting logic by only incrementing the index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28335 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 18:58:15 +00:00
b375b5e629 Simplify the dead argument handling code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28334 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 18:54:32 +00:00
be4849aabe Vector args passed in registers don't reserve stack space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 18:51:52 +00:00
8ab5fe574a Switch the PPC backend over to using FORMAL_ARGUMENTS for formal argument
handling.  This makes the lower argument code significantly simpler (we
only need to handle legal argument types).

Incidentally, this also implements support for vector argument registers,
so long as they are not on the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28331 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 18:18:50 +00:00
00402c7ec3 Fit in 80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28311 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 04:20:24 +00:00
b65e7256ed Remove dead var, fix bad override.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28264 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 21:09:57 +00:00
25b8b8cb2c Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28017 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 21:56:10 +00:00
37efe67645 JumpTable support! What this represents is working asm and jit support for
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
0090120c2b Fix a crash on:
void foo2(vector float *A, vector float *B) {
  vector float C = (vector float)vec_cmpeq(*A, *B);
  if (!vec_any_eq(*A, *B))
    *B = (vector float){0,0,0,0};
  *A = C;
}


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27808 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 18:28:22 +00:00
f70f8d91a7 pretty print node name
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27806 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 18:05:58 +00:00
90564f26d1 Implement an important entry from README_ALTIVEC:
If an altivec predicate compare is used immediately by a branch, don't
use a (serializing) MFCR instruction to read the CR6 register, which requires
a compare to get it back to CR's.  Instead, just branch on CR6 directly. :)

For example, for:
void foo2(vector float *A, vector float *B) {
  if (!vec_any_eq(*A, *B))
    *B = (vector float){0,0,0,0};
}

We now generate:

_foo2:
        mfspr r2, 256
        oris r5, r2, 12288
        mtspr 256, r5
        lvx v2, 0, r4
        lvx v3, 0, r3
        vcmpeqfp. v2, v3, v2
        bne cr6, LBB1_2 ; UnifiedReturnBlock
LBB1_1: ; cond_true
        vxor v2, v2, v2
        stvx v2, 0, r4
        mtspr 256, r2
        blr
LBB1_2: ; UnifiedReturnBlock
        mtspr 256, r2
        blr

instead of:

_foo2:
        mfspr r2, 256
        oris r5, r2, 12288
        mtspr 256, r5
        lvx v2, 0, r4
        lvx v3, 0, r3
        vcmpeqfp. v2, v3, v2
        mfcr r3, 2
        rlwinm r3, r3, 27, 31, 31
        cmpwi cr0, r3, 0
        beq cr0, LBB1_2 ; UnifiedReturnBlock
LBB1_1: ; cond_true
        vxor v2, v2, v2
        stvx v2, 0, r4
        mtspr 256, r2
        blr
LBB1_2: ; UnifiedReturnBlock
        mtspr 256, r2
        blr

This implements CodeGen/PowerPC/vec_br_cmp.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27804 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 17:59:36 +00:00
cea2aa77eb Use vmladduhm to do v8i16 multiplies which is faster and simpler than doing
even/odd halves.  Thanks to Nate telling me what's what.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27793 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 04:28:57 +00:00
19a815238e Implement v16i8 multiply with this code:
vmuloub v5, v3, v2
        vmuleub v2, v3, v2
        vperm v2, v2, v5, v4

This implements CodeGen/PowerPC/vec_mul.ll.  With this, v16i8 multiplies are
6.79x faster than before.

Overall, UnitTests/Vector/multiplies.c is now 2.45x faster with LLVM than with
GCC.

Remove the 'integer multiplies' todo from the README file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27792 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 03:57:35 +00:00
72dd9bdcc5 Lower v8i16 multiply into this code:
li r5, lo16(LCPI1_0)
        lis r6, ha16(LCPI1_0)
        lvx v4, r6, r5
        vmulouh v5, v3, v2
        vmuleuh v2, v3, v2
        vperm v2, v2, v5, v4

where v4 is:
LCPI1_0:                                        ;  <16 x ubyte>
        .byte   2
        .byte   3
        .byte   18
        .byte   19
        .byte   6
        .byte   7
        .byte   22
        .byte   23
        .byte   10
        .byte   11
        .byte   26
        .byte   27
        .byte   14
        .byte   15
        .byte   30
        .byte   31

This is 5.07x faster on the G5 (measured) than lowering to scalar code +
loads/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 03:43:48 +00:00
e7c768ea24 Custom lower v4i32 multiplies into a cute sequence, instead of having legalize
scalarize the sequence into 4 mullw's and a bunch of load/store traffic.

This speeds up v4i32 multiplies 4.1x (measured) on a G5.  This implements
PowerPC/vec_mul.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-18 03:24:30 +00:00
dbce85dedf Make sure to check splats of every constant we can, handle splat(31) by
being a bit more clever, add support for odd splats from -31 to -17.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27764 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 18:09:22 +00:00
bdd558cd94 Teach the ppc backend to use rol and vsldoi to generate splatted constants.
This implements vec_constants.ll:test_vsldoi and test_rol


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 17:55:10 +00:00
6876e66e5d Make some code more general, adding support for constant formation of several
new patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27754 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 06:58:41 +00:00
c408382eca Learn how to make odd splatted constants in range [17,29]. This implements
PowerPC/vec_constants.ll:test_29.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 06:07:44 +00:00
4a998b9ca8 Pull some code out into a helper function.
Effeciently codegen even splats in the range [-32,30].

This allows us to codegen <30,30,30,30> as:

        vspltisw v0, 15
        vadduwm v2, v0, v0

instead of as a cp load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 06:00:21 +00:00
5913810b82 Implement a TODO: for any shuffle that can be viewed as a v4[if]32 shuffle,
if it can be implemented in 3 or fewer discrete altivec instructions, codegen
it as such.  This implements Regression/CodeGen/PowerPC/vec_perf_shuffle.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 05:28:54 +00:00
f3f69decca Implement a TODO: have the legalizer canonicalize a bunch of operations to
one type (v4i32) so that we don't have to write patterns for each type, and
so that more CSE opportunities are exposed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27731 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-16 01:37:57 +00:00
b17f1679e3 Make the BUILD_VECTOR lowering code much more aggressive w.r.t constant vectors.
Remove some done items from the todo list.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27729 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-16 01:01:29 +00:00
730b45694b Fix a crash when faced with a shuffle vector that has an undef in its mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27726 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-15 23:48:05 +00:00
b097aa9353 Allow undef in a shuffle mask
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 23:19:08 +00:00
1a635d617a Move the rest of the PPCTargetLowering::LowerOperation cases out into
separate functions, for simplicity and code clarity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27693 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 06:01:58 +00:00
f1b4708950 Pull the VECTOR_SHUFFLE and BUILD_VECTOR lowering code out into separate
functions, which makes the code much cleaner :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27692 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-14 05:19:18 +00:00
a39d798e0a Force non-darwin targets to use a static relo model. This fixes PR734,
tested by CodeGen/Generic/vector.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27657 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-13 17:10:48 +00:00
ac225ca051 Add a new way to match vector constants, which make it easier to bang bits of
different types.

Codegen spltw(0x7FFFFFFF) and spltw(0x80000000) without a constant pool load,
implementing PowerPC/vec_constants.ll:test1.  This compiles:

typedef float vf __attribute__ ((vector_size (16)));
typedef int vi __attribute__ ((vector_size (16)));
void test(vi *P1, vi *P2, vf *P3) {
  *P1 &= (vi){0x80000000,0x80000000,0x80000000,0x80000000};
  *P2 &= (vi){0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF,0x7FFFFFFF};
  *P3 = vec_abs((vector float)*P3);
}

to:

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        vspltisw v0, -1
        vslw v0, v0, v0
        lvx v1, 0, r3
        vand v1, v1, v0
        stvx v1, 0, r3
        lvx v1, 0, r4
        vandc v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vandc v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

instead of (with two constant pool entries):

_test:
        mfspr r2, 256
        oris r6, r2, 49152
        mtspr 256, r6
        li r6, lo16(LCPI1_0)
        lis r7, ha16(LCPI1_0)
        li r8, lo16(LCPI1_1)
        lis r9, ha16(LCPI1_1)
        lvx v0, r7, r6
        lvx v1, 0, r3
        vand v0, v1, v0
        stvx v0, 0, r3
        lvx v0, r9, r8
        lvx v1, 0, r4
        vand v1, v1, v0
        stvx v1, 0, r4
        lvx v1, 0, r5
        vand v0, v1, v0
        stvx v0, 0, r5
        mtspr 256, r2
        blr

GCC produces (with 2 cp entries):

_test:
        mfspr r0,256
        stw r0,-4(r1)
        oris r0,r0,0xc00c
        mtspr 256,r0
        lis r2,ha16(LC0)
        lis r9,ha16(LC1)
        la r2,lo16(LC0)(r2)
        lvx v0,0,r3
        lvx v1,0,r5
        la r9,lo16(LC1)(r9)
        lwz r12,-4(r1)
        lvx v12,0,r2
        lvx v13,0,r9
        vand v0,v0,v12
        stvx v0,0,r3
        vspltisw v0,-1
        vslw v12,v0,v0
        vandc v1,v1,v12
        stvx v1,0,r5
        lvx v0,0,r4
        vand v0,v0,v13
        stvx v0,0,r4
        mtspr 256,r12
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27624 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 19:07:14 +00:00
e87192a854 Rename get_VSPLI_elt -> get_VSPLTI_elt
Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each
form, eliminating a bunch of Pat patterns in the .td file and allowing us to
CSE stuff more aggressively.  This implements
PowerPC/buildvec_canonicalize.ll:VSPLTI


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 17:37:20 +00:00
2b1c3258d6 Ensure that zero vectors are always v4i32, which forces them to CSE with
each other.  This implements CodeGen/PowerPC/vxor-canonicalize.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27609 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-12 16:53:28 +00:00
bee9836c0f Vector function results go into V2 according to GCC. The darwin ABI doc
doesn't say where they go :-/


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27579 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 01:38:39 +00:00
06c24350a9 Move some return-handling code from lowerarguments to the ISD::RET handling stuff.
No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27577 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-11 01:21:43 +00:00
a1d95e16df properly mark vector selects as expanded to select_cc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27544 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 22:59:15 +00:00
710ff32983 Add VRRC select support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27543 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 22:45:08 +00:00
79d9a88165 Implement PowerPC/CodeGen/vec_splat.ll:spltish to use vsplish instead of a
constant pool load.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27538 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 07:14:26 +00:00
140a58f9df Change the interface to the predicate that determines if vsplti* can be used.
No functionality changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27536 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-08 06:46:53 +00:00
90217999bd Make sure to return the result in the right type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27469 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 23:12:19 +00:00
f24380e78e Match vpku[hw]um(x,x).
Convert vsldoi(x,x) to work the same way other (x,x) cases work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27467 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 22:28:36 +00:00
caad163496 Add support for matching vmrg(x,x) patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 22:02:42 +00:00
116cc48e30 Pattern match vmrg* instructions, which are now lowered by the CFE into shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27457 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-06 21:11:54 +00:00