Commit Graph

3978 Commits

Author SHA1 Message Date
Dan Gohman
ac963b3279 Add a testcase for r103135, explicitly representing unknown
locations in debug line info.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 17:49:17 +00:00
Chris Lattner
b4202dbb36 Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol twice!"' failed.
Users can write broken code that emits the same label twice with asm renaming,
detect this and emit a fatal backend error instead of aborting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103140 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-06 00:05:37 +00:00
Jim Grosbach
29402132f3 Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/pack
instructions to subtarget features and update tests to reflect.
PR5717.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103136 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 23:44:43 +00:00
Jakob Stoklund Olesen
51bfd452d5 Fix PR6520. An earlyclobber physreg must not be allocated to anything else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 23:07:41 +00:00
Jim Grosbach
bc1c98d538 fix copy/paste oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103122 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 21:07:46 +00:00
Jim Grosbach
3a548e717f Add tests for ARMV7M divide instruction use
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103120 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 20:47:15 +00:00
Jim Grosbach
9ad2aafef1 remove unneeded underscores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103114 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 19:55:58 +00:00
Jim Grosbach
ab42ec3e51 Convert to filecheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-05 19:41:11 +00:00
Chris Lattner
d4ac35b350 "on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
Patch by Kalle Raiskila!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 17:58:46 +00:00
Dale Johannesen
08673d2950 Implement builtin_return_address(x) and builtin_frame_address(x)
on PPC for x!=0.  7624113.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 22:59:34 +00:00
Jakob Stoklund Olesen
b98c549d13 Check that subregisters don't have independent values in RemoveCopyByCommutingDef().
This fixes PR6941.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 22:40:32 +00:00
Dan Gohman
d4d01154ef Fix tests to use fadd, fsub, and fmul, instead of add, sub, and mul,
when the type is floating-point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 22:36:46 +00:00
Dan Gohman
30fc5bbfd1 Fix a bug which prevented tail merging of return instructions in
beneficial cases. See the changes in test/CodeGen/X86/tail-opts.ll and
test/CodeGen/ARM/ifcvt2.ll for details.

The fix is to change HashEndOfMBB to hash at most one instruction,
instead of trying to apply heuristics about when it will be profitable to
consider more than one instruction. The regular tail-merging heuristics
are already prepared to handle the same cases, and they're more precise.

Also, make test/CodeGen/ARM/ifcvt5.ll and
test/CodeGen/Thumb2/thumb2-branch.ll slightly more complex so that they
continue to test what they're intended to test.

And, this eliminates the problem in
test/CodeGen/Thumb2/2009-10-15-ITBlockBranch.ll, the testcase from
PR5204. Update it accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102907 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-03 14:35:47 +00:00
Duncan Sands
57b6e9eb6c Remove the -enable-sjlj-eh option, which doesn't do anything.
Remove the -enable-eh option which is only used by the JIT,
and replace it with -jit-enable-eh.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102865 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-02 15:36:26 +00:00
Anton Korobeynikov
17458a786e Insert ANY_EXTEND node instead of invalid truncate during DAG Combining (X & 1),
when needed. This fixes PR7001

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102838 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 12:52:34 +00:00
Anton Korobeynikov
1b17614a72 Do folding for indirect branches, where possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102836 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 12:28:21 +00:00
Anton Korobeynikov
69d5b48bc3 Implement indirect branches on MSP430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102835 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 12:04:32 +00:00
Bill Wendling
3f755d7ec6 Test failing too much on too many platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-01 00:12:33 +00:00
Bill Wendling
1c2d7f1196 Maybe it needs sse2?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 23:19:29 +00:00
Bill Wendling
6c84fdeb9c Force 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102800 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 22:45:20 +00:00
Bill Wendling
d71bb56275 EXTRACT_VECTOR_ELT of an INSERT_VECTOR_ELT may have the same index, but the
indexes could be of a different value type. Or not even using the same SDNode
for the constant (weird, I know). Compare the actual values instead of the
pointers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 22:19:17 +00:00
Jakob Stoklund Olesen
8387d7db19 The local register allocator has to spill dirty callee saved registers before a
call that might throw. The landing pad assumes that all registers are in stack
slots.

We used to spill those dirty CSRs after the call, and the stack slots would be
wrong when arriving at the landing pad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102770 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 21:19:29 +00:00
Evan Cheng
f2d36d91e2 Fix test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 06:00:56 +00:00
Evan Cheng
1361796dd0 Another sibcall bug. If caller and callee calling conventions differ, then it's only safe to do a tail call if the results are returned in the same way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-30 01:12:32 +00:00
Jakob Stoklund Olesen
f07fc974d3 Reject really weird coalescer case when trying to merge identical subregisters
of different register classes. e.g.

  %reg1048:3<def> = EXTRACT_SUBREG %RAX<kill>, 3

Where %reg1048 is a GR32 register. This is not impossible to handle, but it is
pretty hard and very rare.

This should unbreak the dragonegg builder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 23:47:46 +00:00
Evan Cheng
3f54c64a98 Load folding tail call should not use ebp / rbp after it's popped. PEI
should use esp / rsp to reference frame instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102596 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-29 05:08:22 +00:00
Chris Lattner
e87f7bb50e Rework global alignment computation again. Now we do round up
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 19:58:07 +00:00
Evan Cheng
2bce5f4b56 Enable i16 to i32 promotion by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102493 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 08:30:49 +00:00
Evan Cheng
da3a8a647d Update tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102487 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 01:53:13 +00:00
Devang Patel
28ff35d030 Emit debug info for byval parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102486 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-28 01:39:28 +00:00
Evan Cheng
ed33b13a10 Do not count kill, implicit_def instructions as printed instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102453 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-27 19:38:45 +00:00
Chris Lattner
4c4d0c0cc5 round zero-byte .zerofill directives up to 1 byte. This
should fix some "g++.dg-struct-layout-1" failures, 
rdar://7886017


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102421 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-27 07:41:44 +00:00
Chris Lattner
ee9eb411ff on darwin empty functions need to codegen into something of non-zero length,
otherwise labels get incorrectly merged.  We handled this by emitting a 
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes.  Handle this by emitting a noop.  This
is more gross than it should be because arm/ppc are not fully mc'ized yet.

This fixes rdar://7908505



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102400 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 23:37:21 +00:00
Bob Wilson
5dfa87ecc6 Handle register-to-register copies within the tGPR class.
Radar 7896289


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 23:20:08 +00:00
Dan Gohman
948c8a3e3d When checking whether the special handling for an addrec increment which
doesn't dominate the header is needed, don't check whether the increment
expression has computable loop evolution. While the operands of an
addrec are required to be loop-invariant, they're not required to 
dominate any part of the loop. This fixes PR6914.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 21:46:36 +00:00
Chris Lattner
567dd1f5d0 fix PR6921 a different way. Intead of increasing the
alignment of globals with a specified alignment, we fix
common variables to obey their alignment.  Add a comment
explaining why this behavior is important.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102365 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 18:46:46 +00:00
Chris Lattner
f74e25f60c Revert r102300/102301, which serious broke objc apps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102359 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-26 18:30:45 +00:00
Chris Lattner
044698b39a Fix PR6921: globals were not getting correctly rounded up to their
preferred alignment unless they were common or some other special
case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102300 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-25 05:30:43 +00:00
Dan Gohman
1d367988e2 Generalize LSR's OptimizeMax to handle the new kinds of max expressions
that indvars may use, now that indvars is recognizing le and ge loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102235 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-24 03:13:44 +00:00
Stuart Hastings
56dda57679 Per Chris, fuse four trivial tests using grep (r102199) into one that uses FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102216 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23 22:12:57 +00:00
Dan Gohman
6e8fd90602 Change TargetData's algorithm for computing defualt vector type
alignment to match what's used in clang and GCC for __alignof, rather
than trying to guess what Legalize is going to be doing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23 19:41:15 +00:00
Stuart Hastings
e3ff9ba40c Add some missing x86 patterns for movdq2q. Fixes two (LLVM-)GCC DejaGNU testcases. Radar 6881029.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102199 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23 19:03:32 +00:00
Dan Gohman
fafb890ee2 Fix LSR to tolerate cases where ScalarEvolution initially
misses an opportunity to fold add operands, but folds them
after LSR has separated them out. This fixes rdar://7886751.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-23 01:55:05 +00:00
Jim Grosbach
3a1287b470 Update ARM DAGtoDAG for matching UBFX instruction for unsigned bitfield
extraction. This fixes PR5998.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102144 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-22 23:24:18 +00:00
Evan Cheng
e3dd8550c6 Do not try to optimize a copy that has already been marked for deletion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102027 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 20:57:54 +00:00
Evan Cheng
e566763b19 Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 03:18:23 +00:00
Evan Cheng
30fdb5c2ac - Clean up some crappy code which deals with coalescing of copies which look at
extract_subreg / insert_subreg, etc.
- Add support for more aggressive insert_subreg coalescing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 00:44:22 +00:00
Dan Gohman
bc7588eb68 Add another variant of this test which found a place where
CodeGen's ComputeMaskedBits was being over-conservative when computing
bits for an ADD.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101963 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-21 00:19:28 +00:00
Chris Lattner
d6139425f5 teach the x86 address matching stuff to handle
(shl (or x,c), 3) the same as (shl (add x, c), 3)
when x doesn't have any bits from c set.

This finishes off PR1135.  Before we compiled the block to:
to:

LBB0_3:                                 ## %bb
	cmpb	$4, %dl
	sete	%dl
	addb	%dl, %cl
	movb	%cl, %dl
	shlb	$2, %dl
	addb	%r8b, %dl
	shlb	$2, %dl
	movzbl	%dl, %edx
	movl	%esi, (%rdi,%rdx,4)
	leaq	2(%rdx), %r9
	movl	%esi, (%rdi,%r9,4)
	leaq	1(%rdx), %r9
	movl	%esi, (%rdi,%r9,4)
	addq	$3, %rdx
	movl	%esi, (%rdi,%rdx,4)
	incb	%r8b
	decb	%al
	movb	%r8b, %dl
	jne	LBB0_1

Now we produce:

LBB0_3:                                 ## %bb
	cmpb	$4, %dl
	sete	%dl
	addb	%dl, %cl
	movb	%cl, %dl
	shlb	$2, %dl
	addb	%r8b, %dl
	shlb	$2, %dl
	movzbl	%dl, %edx
	movl	%esi, (%rdi,%rdx,4)
	movl	%esi, 8(%rdi,%rdx,4)
	movl	%esi, 4(%rdi,%rdx,4)
	movl	%esi, 12(%rdi,%rdx,4)
	incb	%r8b
	decb	%al
	movb	%r8b, %dl
	jne	LBB0_1



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 23:18:40 +00:00
Bill Wendling
b545cde675 Move CodeGen/X86/2010-04-19-DAGCombineCrash.ll into CodeGen/X86/crash.ll. Also
reduce.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101925 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-20 18:14:47 +00:00