Daniel Dunbar
ae528f65ba
MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:24:18 +00:00
Daniel Dunbar
ee9102587e
MC/X86: Warn on scale factors > 1 without index register, instead of erroring,
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for 'as' compatibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:13:38 +00:00
Dan Gohman
92b651fb19
Fix X86's isLegalAddressingMode to recognize that static addresses
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need not be RIP-relative in small mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 15:55:12 +00:00
Bruno Cardoso Lopes
8878e21fe6
Use pshufhw and pshuflw in more cases and fix getTargetShuffleNode number of arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 01:16:15 +00:00
Bruno Cardoso Lopes
3efc0778c9
Start using target speficic nodes for shuffles: pshufhw and pshuflw
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111837 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 20:41:02 +00:00
Gabor Greif
11bc1652c9
tyops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111835 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 20:30:51 +00:00
Chris Lattner
d80c7e1232
Add a new llvm.x86.int intrinsic, allowing access to the
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x86 int and int3 instructions. Patch by Peter Housel!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111831 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 19:39:25 +00:00
Chris Lattner
b7f243a638
random improvement for variable shift codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111813 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 17:30:29 +00:00
Anton Korobeynikov
4654a07e25
Revert invalid r111792. Jump tables are not broken on x86-64 / coff,
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it's COFF emitter which does not support differences of two symbols
(and needs to be fixed). GAS is pretty fine with code produced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 07:38:51 +00:00
Michael J. Spencer
3464cec4d8
Workaround broken jump tables on x86-64 COFF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-23 04:45:37 +00:00
Anton Korobeynikov
699647cabc
Use rip-rel addressing on win64 by default. For this we just
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defaults to small pic code model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21 17:21:11 +00:00
Michael J. Spencer
da0bfcdaf9
MC: Add partial x86-64 support to COFF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21 05:58:13 +00:00
Dan Gohman
8bef744518
Fix x86 fast-isel's cmp+branch folding to avoid folding when the
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comparison is in a different basic block from the branch. In such
cases, the comparison's operands may not have initialized virtual
registers available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21 02:32:36 +00:00
Bruno Cardoso Lopes
bf8154a439
Prepare LowerVECTOR_SHUFFLEv8i16 to use x86 target specific nodes directly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-21 01:32:18 +00:00
Bruno Cardoso Lopes
3157ef1c13
This is the first step towards refactoring the x86 vector shuffle code. The
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general idea here is to have a group of x86 target specific nodes which are
going to be selected during lowering and then directly matched in isel.
The commit includes the addition of those specific nodes and a *bunch* of
patterns, and incrementally we're going to switch between them and what we
have right now. Both the patterns and target specific nodes can change as
we move forward with this work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-20 22:55:05 +00:00
Chris Lattner
59f8a6a666
fix PR7465, mishandling of lcall and ljmp: intersegment long
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call and jumps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 01:18:43 +00:00
Chris Lattner
efbdc8e236
minor progress towards fixing PR7465
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 01:00:34 +00:00
Bill Wendling
86b98b5874
Marked with ATTRIBUTE_USED so that clang doesn't complain.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111383 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18 18:40:57 +00:00
Chris Lattner
0d857cf8d1
remove some code that is dead now that lea's are modeled with segment registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18 02:40:44 +00:00
Anton Korobeynikov
5dad73cec8
Revert part of one of the prev. patches - tailjmp will follow later.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111291 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 21:08:28 +00:00
Anton Korobeynikov
3a1e54a6b9
More fixes for win64:
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- Do not clobber al during variadic calls, this is AMD64 ABI-only feature
- Emit wincall64, where necessary
Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111289 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 21:06:07 +00:00
Anton Korobeynikov
e9df15e65c
Enable more win64 calls folding opportunities.
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Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111288 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 21:06:01 +00:00
Eli Friedman
bc1fb2b6fa
Comment out some broken/unused/useless instructions which mess up disassembly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111185 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 21:18:51 +00:00
Eli Friedman
321473d51d
Don't attempt to SimplifyShortMoveForm in 64-bit mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 21:03:32 +00:00
Matt Fleming
453db50333
Hookup ELF support for X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111173 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 18:36:14 +00:00
Jakob Stoklund Olesen
de78f05cf7
Partially revert r111155. It looks like MSVC is calling an operator<() that
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clang says is unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 18:24:54 +00:00
Jakob Stoklund Olesen
a649ab542d
Remove unused functions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111155 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-16 17:18:18 +00:00
Argyrios Kyrtzidis
8c8b9ee8c8
Revert r111082. No warnings for this common pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111102 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-15 10:27:23 +00:00
Eric Christopher
c0b2a2018a
Rework how the non-sse2 memory barrier is lowered so that the
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encoding is correct for the built-in assembler.
Based on a patch from Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111083 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-14 21:51:50 +00:00
Argyrios Kyrtzidis
7268d97ae6
Add ATTRIBUTE_UNUSED to methods that are not supposed to be used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-14 21:35:10 +00:00
Chris Lattner
132929aa9e
improve indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-14 17:26:09 +00:00
Bruno Cardoso Lopes
30baa63474
Add comments to some pattern fragments in x86
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111041 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 20:39:01 +00:00
Dale Johannesen
1b4051095d
Revert 110491. While not wrong, it was based on a
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misanalysis and is undesirable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111028 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 18:43:45 +00:00
Bruno Cardoso Lopes
bb0a9489e0
Fix comment to reflect code, and remove an unused argument
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 17:50:47 +00:00
Bruno Cardoso Lopes
bbadd39bbb
Improve comment to make explicit why not to touch this could before JIT goes MC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 17:44:10 +00:00
Eric Christopher
63f02ac349
Revert last patch and r110954 as I meant to.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 02:37:50 +00:00
Eric Christopher
4404c00db6
Revert r110954 for now, pseudo instructions can't make it through to the JIT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111000 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 02:30:00 +00:00
Bruno Cardoso Lopes
64baddc0f2
Some small clean-up: use of pseudo instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:55:18 +00:00
Bruno Cardoso Lopes
642eb02045
- Teach SSEDomainFix to switch between different levels of AVX instructions. Here we guess that AVX will have domain issues, so just implement them for consistency and in the future we remove if it's unnecessary.
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- Make foldMemoryOperandImpl aware of 256-bit zero vectors folding and support the 128-bit counterparts of AVX too.
- Make sure MOV[AU]PS instructions are only selected when SSE1 is enabled, and duplicate the patterns to match AVX.
- Add a testcase for a simple 128-bit zero vector creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:20:53 +00:00
Bruno Cardoso Lopes
6da9cee0f1
Define AVX 128-bit pattern versions of SET0PS/PD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 18:20:59 +00:00
Bruno Cardoso Lopes
4d04362813
Fix comment order
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110898 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 02:08:52 +00:00
Bruno Cardoso Lopes
8c05a850f4
Begin to support some vector operations for AVX 256-bit intructions. The long
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term goal here is to be able to match enough of vector_shuffle and build_vector
so all avx intrinsics which aren't mapped to their own built-ins but to
shufflevector calls can be codegen'd. This is the first (baby) step, support
building zeroed vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 02:06:36 +00:00
Daniel Dunbar
09062b1672
MC/X86/AsmParser: Give an explicit error message when we reject an instruction
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because it could have an ambiguous suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:42 +00:00
Daniel Dunbar
f1e29d4c21
MC/AsmParser: Push the burdon of emitting diagnostics about unmatched
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instructions onto the target specific parser, which can do a better job.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110889 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:38 +00:00
Daniel Dunbar
4f98f83459
tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',
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target specific parsers can adapt the TargetAsmParser to this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110888 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:32 +00:00
Jakob Stoklund Olesen
d29583bd32
Fix <rdar://problem/8282498> even if it doesn't reproduce on trunk.
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When a register is defined by a partial load:
%reg1234:sub_32 = MOV32mr <fi#-1>; GR64:%reg1234
That load cannot be folded into an instruction using the full 64-bit register.
It would become a 64-bit load.
This is related to the recent change to have isLoadFromStackSlot return false on
a sub-register load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110874 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 23:08:22 +00:00
Dan Gohman
d881627d33
Use ISD::ADD instead of ISD::SUB with a negated constant. This
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avoids trouble if the return type of TD->getPointerSize() is
changed to something which doesn't promote to a signed type,
and is simpler anyway.
Also, use getCopyFromReg instead of getRegister to read a
physical register's value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110835 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 18:14:00 +00:00
Daniel Dunbar
b3cb696794
MCAsmParser: Add dump() hook to MCParsedAsmOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110790 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 06:37:04 +00:00
Bruno Cardoso Lopes
045573ce21
Add AVX matching patterns to Packed Bit Test intrinsics.
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Apply the same approach of SSE4.1 ptest intrinsics but
create a new x86 node "testp" since AVX introduces
vtest{ps}{pd} instructions which set ZF and CF depending
on sign bit AND and ANDN of packed floating-point sources.
This is slightly different from what the "ptest" does.
Tests comming with the other 256 intrinsics tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 23:25:42 +00:00
Bruno Cardoso Lopes
9f798e9a9e
Add AVX movnt{pd,ps,dq} 256-bit intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110650 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 02:49:24 +00:00