Commit Graph

956 Commits

Author SHA1 Message Date
Akira Hatanaka
2fd0475cdb Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates
nodes needed for multiplication. Add code for selecting 64-bit MULHS and MULHU
nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 23:10:57 +00:00
Akira Hatanaka
49d534bb3d Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:58:01 +00:00
Akira Hatanaka
8dc684d2a2 64-bit data directive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:52:19 +00:00
Akira Hatanaka
ef43c2de86 32-to-64-bit sext_inreg pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:40:40 +00:00
Akira Hatanaka
acb5a06f7a Add 64-bit extload patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:36:08 +00:00
Akira Hatanaka
ab05b6c227 Add patterns for matching extloads with 64-bit address. The patterns are enabled
only when the target ABI is N64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147001 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:33:53 +00:00
Akira Hatanaka
990d639f55 Add code in MipsDAGToDAGISel for selecting constant +0.0.
MIPS64 can generate constant +0.0 with a single DMTC1 instruction. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:25:50 +00:00
Akira Hatanaka
05c585319b Revert part of r146995 that was accidentally commmitted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:09:36 +00:00
Akira Hatanaka
403992dc58 32-to-64-bit sign extension pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 22:06:20 +00:00
Akira Hatanaka
caace8abdf Add a pattern for matching zero-store with 64-bit address. The pattern is enabled
only when the target ABI is N64. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146992 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 21:50:49 +00:00
Chandler Carruth
cfb75fba73 Fix up the CMake build for the new files added in r146960, they're
likely to stay either way that discussion ends up resolving itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 08:42:11 +00:00
David Blaikie
2d24e2a396 Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146960 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 02:50:00 +00:00
Akira Hatanaka
f06cb2b207 Add patterns for matching immediates whose lower 16-bit is cleared. These
patterns emit a single LUi instruction instead of a pair of LUi and ORi.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 20:21:18 +00:00
Akira Hatanaka
8209968306 Tidy up. Simplify logic. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:52:25 +00:00
Akira Hatanaka
ee973147ac Remove definitions of double word shift plus 32 instructions. Assembler or
direct-object emitter should emit the appropriate shift instruction depending
on the shift amount.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:44:09 +00:00
Akira Hatanaka
ed538b5271 Remove unused predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:32:20 +00:00
Akira Hatanaka
89dc8d790d Remove the restriction on the first operand of the add node in SelectAddr.
This change reduces the number of instructions generated.

For example, 
(load (add (sub $n0, $n1), (MipsLo got(s))))

results in the following sequence of instructions:
1. sub $n2, $n0, $n1
2. lw got(s)($n2)

Previously, three instructions were needed.
1. sub $n2, $n0, $n1
2. addiu $n3, $n2, got(s)
3. lw 0($n3)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-19 19:28:37 +00:00
Akira Hatanaka
3faac0a78c Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object
emission is not supported yet, but a patch that adds the support should follow
soon.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 18:26:41 +00:00
Akira Hatanaka
044a784fa5 Expand .cprestore directive to multiple instructions if the offset does not fit
in a 16-bit field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 03:09:05 +00:00
Chandler Carruth
63974b2144 Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.

Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.

Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146466 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-13 01:56:10 +00:00
Daniel Dunbar
b0c594fd42 LLVMBuild: Introduce a common section which currently has a list of the
subdirectories to traverse into.
 - Originally I wanted to avoid this and just autoscan, but this has one key
   flaw in that new subdirectories can not automatically trigger a rerun of the
   llvm-build tool. This is particularly a pain when switching back and forth
   between trees where one has added a subdirectory, as the dependencies will
   tend to be wrong. This will also eliminates FIXME implicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146436 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:45:54 +00:00
Akira Hatanaka
6e55ff56b8 Emit B (unconditional branch) when -relocation-model=pic and J (jump) when
-relocation-model=static.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:39:35 +00:00
Akira Hatanaka
bfcb83fa32 Fix indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146431 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 22:38:19 +00:00
Daniel Dunbar
4ab406d7fc LLVMBuild: Remove trailing newline, which irked me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146409 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 19:48:00 +00:00
Benjamin Kramer
5eccf67492 Mips: Don't create a dangling IR function just to get the address of a symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-11 12:21:34 +00:00
Akira Hatanaka
6df7e23f0c Rename WrapperPIC. It is now used for both pic and static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:53:17 +00:00
Akira Hatanaka
0dca9456c5 jalr should use t9 ($25) for indirect calls regardless of the relocation model
specified.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-09 01:45:12 +00:00
Akira Hatanaka
7a7194b529 Pass a GlobalAddress instead of an ExternalSymbol to LowerCallTo in
MipsTargetLowering::LowerGlobalTLSAddress. This is necessary to have
call16(__tls_get_addr) emitted instead of got_disp(__tls_get_addr) when the
target is Mips64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 21:05:38 +00:00
Akira Hatanaka
ca0747917d Implement 64-bit support for thread local storage handling.
- Modify lowering of global TLS address nodes.
- Modify isel of ThreadPointer.
- Wrap target global TLS address nodes that are operands of loads with WrapperPIC. 
- Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be
  substituted with other existing nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 20:34:32 +00:00
Akira Hatanaka
08a7d92da6 Modify class ReadHardware and add definition of 64-bit version of instruction
RDHWR. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:31:26 +00:00
Akira Hatanaka
f99c1e5a19 Add newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:26:03 +00:00
Akira Hatanaka
be7b67368c Add 64-bit HWR29 register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:23:52 +00:00
Akira Hatanaka
da86fa14f0 32 to 64-bit anyext pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:21:19 +00:00
Akira Hatanaka
0a18cdc372 32 to 64-bit zext pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:14:41 +00:00
Bruno Cardoso Lopes
d1bcf0dbc1 Variable cleanup. Based on past patch submittals variable names have
been normalized and more descriptive comments added. Patch by Reed
Kotler and Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:35:30 +00:00
Akira Hatanaka
2c78be01f6 64-bit WrapperPICPat patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:11:43 +00:00
Akira Hatanaka
20aa12ae5c Define base class for WrapperPICPat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:54:54 +00:00
Akira Hatanaka
7398bf01c2 Modify LowerFCOPYSIGN to handle Mips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:48:50 +00:00
Akira Hatanaka
bd15090aa2 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:15:01 +00:00
Akira Hatanaka
3bdc03a592 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:13:53 +00:00
Akira Hatanaka
4d0eb637f0 Fix 64-bit immediate patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:10:24 +00:00
Evan Cheng
5a96b3dad2 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 07:15:52 +00:00
Bruno Cardoso Lopes
e3d3572e28 Add a few moreLocal/Global R_MIPS_GOT related fixups and
make the addend fixup code a bit more generic

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 00:28:57 +00:00
Evan Cheng
7c2a4a30e0 First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 22:12:01 +00:00
Bruno Cardoso Lopes
ff452f5349 Use branches instead of jumps + variable cleanup. Testcase coming next. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 03:34:48 +00:00
Bruno Cardoso Lopes
2bcc789a9d Add register HWR29 numbering. Patch by Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145910 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 03:34:36 +00:00
NAKAMURA Takumi
6482e91149 MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:48:32 +00:00
Jim Grosbach
370b78d795 Move target-specific logic out of generic MCAssembler.
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:47:03 +00:00
Akira Hatanaka
d6bc5237d8 Add definitions of 64-bit extract and insert instrucions and make
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:26:34 +00:00
Akira Hatanaka
cee46abc16 Split ExtIns into two base classes and have instructions EXT and INS derive from
them.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145852 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:14:28 +00:00