Commit Graph

116659 Commits

Author SHA1 Message Date
Lang Hames af40164431 [Orc] It's not valid to pass a null resolver to addModuleSet. Use a no-op
resolver with a diagnostic instread.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236074 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 01:33:35 +00:00
Filipe Cabecinhas 3b4a565b8a Make sure that isValidElementType(Type) before calling {Array,Struct}Type::get(Type)
Bug found with AFL fuzz.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236073 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-29 01:27:01 +00:00
Matthias Braun 2d6f83dac9 RegisterCoalescer: hide terminal rule option by default
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236062 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 23:55:11 +00:00
Hans Wennborg bccc647eaa test-release.sh: Drop some unused command-line options.
These haven't done anything since before r142165.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236061 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 23:37:41 +00:00
Rafael Espindola 5acccb16a8 Map directly from signature symbol to group index. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236058 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:59:58 +00:00
Eric Christopher f506831ede Reuse a lookup in an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236054 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:38:35 +00:00
Rafael Espindola b89275550c Remove redundant temporary std::vector.
New sections are added to the end of the list, so the RelSections array was
redundant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236053 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:26:19 +00:00
Tim Northover 9f7d13868a ARM: fix peephole optimisation of TST
We were trying to look through COPY instructions, but only to the next
instruction in a BB and incorrectly anyway. The cases where that would actually
be a good idea are rare enough (and not even tested!) that it's not worth
trying to get right.

rdar://20721342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236050 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:03:55 +00:00
Rafael Espindola f75160b8d9 Avoid one more walk over all sections. NFC.
Set the group section index as they are created.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236049 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:03:22 +00:00
Andrew Kaylor 63ca5d6589 Style updates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 22:01:51 +00:00
Rafael Espindola 7aff72189a Use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:58:05 +00:00
Andrew Kaylor 0595a97817 [WinEH] Split blocks at calls to llvm.eh.begincatch
Differential Revision: http://reviews.llvm.org/D9311



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:54:14 +00:00
Rafael Espindola f23613a3cd Avoid an extra walk over the sections just to assign sections to groups.
Assign the sections in the same pass we compute the index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:52:33 +00:00
James Y Knight 642098ac59 Sparc: Add alternate aliases for conditional branch instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:27:31 +00:00
Reid Kleckner 9c5cacccb1 [SEH] Add an LLVM intrinsic for _exception_info
Eventually, we will lower this out during IR preparation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:20:42 +00:00
Rafael Espindola 923bffd675 Remove the GroupMapTy DenseMap. NFC.
Instead use the Group symbol of MCSectionELF.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:07:28 +00:00
Sanjay Patel 959b276771 transform fadd chains to increase parallelism
This is a compromise: with this simple patch, we should always handle a chain of exactly 3
operations optimally, but we're not generating the optimal balanced binary tree for a longer
sequence.

In general, this transform will reduce the dependency chain for a sequence of instructions
using N operands from a worst case N-1 dependent operations to N/2 dependent operations. 
The optimal balanced binary tree would reduce the chain to log2(N).

The trade-off for not dealing with longer sequences is: (1) we have less complexity in the
compiler, (2) we avoid unknown compile-time blowup calculating a balanced tree, and (3) we
don't need to worry about the increased register pressure required to parallelize longer
sequences. It also seems unlikely that we would ever encounter really long strings of
dependent ops like that in the wild, but I'm not sure how to verify that speculation.
FWIW, I see no perf difference for test-suite running on btver2 (x86-64) with -ffast-math
and this patch.

We can extend this patch to cover other associative operations such as fmul, fmax, fmin, 
integer add, integer mul.

This is a partial fix for:
https://llvm.org/bugs/show_bug.cgi?id=17305

and if extended:
https://llvm.org/bugs/show_bug.cgi?id=21768
https://llvm.org/bugs/show_bug.cgi?id=23116

The issue also came up in:
http://reviews.llvm.org/D8941

Differential Revision: http://reviews.llvm.org/D9232



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236031 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 21:03:22 +00:00
Alexei Starovoitov 04877fa7ff [bpf] fix build
Patch by Brenden Blanco.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:38:56 +00:00
Rafael Espindola 032f234969 Use range loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236028 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:23:35 +00:00
Filipe Cabecinhas 7acbf56112 Relax an assert when there's a type mismatch in forward references
Summary:
We don't seem to need to assert here, since this function's callers expect
to get a nullptr on error. This way we don't assert on user input.

Bug found with AFL fuzz.

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9308

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236027 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:18:47 +00:00
Rafael Espindola 5052130d6a Avoid adding to SectionIndexMap sections that we never lookup. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236026 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 20:09:13 +00:00
Daniel Berlin b1e1aa04ed Make getModRefInfo(Instruction *) not crash on certain types of instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236023 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 19:19:14 +00:00
Rafael Espindola 3813ef6886 Use a range loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236015 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 19:07:16 +00:00
Sanjay Patel f060668270 [x86] remove RCPPS and RSQRTPS intrinsic instruction definitions
We don't need codegen-only intrinsic instructions for the vector forms of these instructions.

This makes the reciprocal estimate instruction lowering identical to how we handle normal
square roots: (V)SQRTPS / (V)SQRTPD.

No existing regression tests fail with this patch.

Differential Revision: http://reviews.llvm.org/D9301



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 18:48:45 +00:00
Eric Christopher 5d88757074 Add a fixme to resetTargetOptions to explain why it needs to go
away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236009 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 18:09:05 +00:00
Eric Christopher a4944e5188 Fix a [-Werror,-Winconsistent-missing-override] problem in the
NVPTX overrides.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236007 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 18:06:27 +00:00
Tom Stellard 53fec21fbe R600: Fix up for AsmPrinter's OutStreamer being a unique_ptr
Fixes a crash with basically any OpenGL application using the radeonsi
driver.

Patch by: Michel Dänzer

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90176
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236004 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 17:37:03 +00:00
Tom Stellard 1630fbeb91 R600/SI: Add a lower case alias for subtarget feature: +DumpCode
llc converts all feature strings to lower case, while the LLVM C API
does not, so we need a lower case alias in order to test this with llc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 17:37:00 +00:00
Justin Holewinski 0292a66bb1 [NVPTX] Handle addrspacecast constant expressions in aggregate initializers
We need to track if an AddrSpaceCast expression was seen when
generating an MCExpr for a ConstantExpr.  This change introduces a
custom lowerConstant method to the NVPTX asm printer that will create
NVPTXGenericMCSymbolRefExpr nodes at the appropriate places to encode
the information that a given symbol needs to be casted to a generic
address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236000 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 17:18:30 +00:00
David Blaikie e48ac32ea2 [opaque pointer type] Encode the allocated type of an alloca rather than its pointer result type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 16:51:01 +00:00
Sanjay Patel 2a7841dd4d move IR-level optimization flags into their own struct
This is a preliminary step to using the IR-level floating-point fast-math-flags in the SDAG (D8900).

In this patch, we introduce the optimization flags as their own struct. As noted in the TODO comment, 
we should eventually share this data between the IR passes and the backend.

We also switch the existing nsw / nuw / exact bit functionality of the BinaryWithFlagsSDNode class to
use the new struct.

The tradeoff is that instead of using the free but limited space of SDNode's SubclassData, we add a
data member to the subclass. This means we don't have to repeat all of the get/set methods per flag,
but we're potentially adding size to all nodes of this subclassi type.

In practice on 64-bit systems (measured on Linux and MacOS X), there is no size difference between an
SDNode and BinaryWithFlagsSDNode after this change: they're both 80 bytes. This means that we had at
least one free byte to play with due to struct alignment.

Differential Revision: http://reviews.llvm.org/D9325



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235997 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 16:39:12 +00:00
Rafael Espindola a34b8b2e55 Use a std::vector to record the offsets of the sections. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235995 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 15:26:21 +00:00
Rafael Espindola 39dfabd785 Avoid an extra loop for computing the section size. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235994 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 15:04:09 +00:00
Elena Demikhovsky 83259d70bb Fixed crash of variable shift inst on AVX2
https://llvm.org/bugs/show_bug.cgi?id=22955



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235993 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:46:35 +00:00
Toma Tabacu 8bec0f9db1 [mips] [IAS] Do not generate redundant ORi in createLShiftOri.
Summary: If the immediate is 0, the ORi is pointless.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235990 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:06:35 +00:00
Sergey Dmitrouk 1f7a90d793 Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"
[DebugInfo] Add debug locations to constant SD nodes

This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235989 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 14:05:47 +00:00
Rafael Espindola 9924357175 Use CIE version 4 for dwarf4.
According to http://www.dwarfstd.org/doc/DWARF4.pdf appendix F the CIE
version for dwarf 4 is 4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 13:55:31 +00:00
Daniel Jasper 515cc265c9 Revert "[DebugInfo] Add debug locations to constant SD nodes"
This breaks a test:
http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/23870

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235987 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 13:38:35 +00:00
Toma Tabacu f9fc545757 [mips] [IAS] Rename the createShiftOr function to createLShiftOri. NFC.
Summary: The new name is more accurate with regard to the functionality.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8968

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 13:16:06 +00:00
Toma Tabacu c3adf30a03 [mips] [IAS] Store the expandLoadImm destination register in a variable. NFC.
Summary: This removes multiple calls to getReg() and saves us column space in the source file.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8924

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235978 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 12:04:53 +00:00
Sergey Dmitrouk 716c5d8a30 [DebugInfo] Add debug locations to constant SD nodes
This adds debug location to constant nodes of Selection DAG and updates
all places that create constants to pass debug locations
(see PR13269).

Can't guarantee that all locations are correct, but in a lot of cases choice
is obvious, so most of them should be. At least all tests pass.

Tests for these changes do not cover everything, instead just check it for
SDNodes, ARM and AArch64 where it's easy to get incorrect locations on
constants.

This is not complete fix as FastISel contains workaround for wrong debug
locations, which drops locations from instructions on processing constants,
but there isn't currently a way to use debug locations from constants there
as llvm::Constant doesn't cache it (yet). Although this is a bit different
issue, not directly related to these changes.

Differential Revision: http://reviews.llvm.org/D9084

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 11:56:37 +00:00
Elena Demikhovsky 44a0c9071a AVX-512: Added "pandn" intrinsics set
by Asaf Badouh (asaf.badouh@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235971 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 08:12:42 +00:00
Elena Demikhovsky 8dfda019a0 Masked gather and scatter: Added code for SelectionDAG.
All other patches, including tests will follow.

http://reviews.llvm.org/D7665



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235970 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 07:57:37 +00:00
David Blaikie 974d5d32c8 [opaque pointer type] Encode the pointee type in the bitcode for 'cmpxchg'
As a space optimization, this instruction would just encode the pointer
type of the first operand and use the knowledge that the second and
third operands would be of the pointee type of the first. When typed
pointers go away, this assumption will no longer be available - so
encode the type of the second operand explicitly and rely on that for
the third.

Test case added to demonstrate the backwards compatibility concern,
which only comes up when the definition of the second operand comes
after the use (hence the weird basic block sequence) - at which point
the type needs to be explicitly encoded in the bitcode and the record
length changes to accommodate this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235966 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 04:30:29 +00:00
Ahmed Bougacha e1f835ab59 [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.
This matches other assemblers and is less unexpected (e.g. PR23227).
On ELF, I tried binutils gas v2.24 and nasm 2.10.09, and they both
agree on LShr.  On COFF, I couldn't get my hands on an assembler yet,
so don't change the behavior.  For now, don't change it on non-AArch64
Darwin either, as the other assembler is gas v1.38, which does an AShr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235963 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 01:37:11 +00:00
Duncan P. N. Exon Smith fef483667f DebugInfo: Support up to 2^16 arguments in a subprogram
Support up to 2^16 arguments to a function.  If we do hit the limit,
assert out rather than restarting at 0 as we've done historically.

This fixes PR23332.  A clang test will follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235955 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 01:07:33 +00:00
Matthias Braun 0dff695ba9 Cleanup, remove unused return value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 00:37:05 +00:00
Ahmed Bougacha dac39b1fef [MC] Split MCBinaryExpr::Shr into LShr and AShr.
Defaulting to AShr without consulting the target MCAsmInfo isn't OK.
Add a flag to fix that.  Keep it off for now: target migrations will
follow in separate commits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235951 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 00:21:32 +00:00
Ahmed Bougacha 07bcfe929e [MC] Move getBinOpPrecedence into AsmParser. NFC.
In preparation for a future patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235950 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-28 00:17:39 +00:00
Hans Wennborg 5d004276ec Switch lowering: use uint32_t for weights everywhere
I previously thought switch clusters would need to use uint64_t in case
the weights of multiple cases overflowed a 32-bit int. It turns
out that the weights on a terminator instruction are capped to allow for
being added together, so using a uint32_t should be safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235945 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-27 23:52:19 +00:00