1
0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00
Commit Graph

75049 Commits

Author SHA1 Message Date
Mark Heffernan
b10837d169 Clarify HowFarToZero computation when the step is a positive power of two. Functionally this should be identical to the existing code except for the case where Step is maximally negative (eg, INT_MIN). We now punt in that one corner case to make reasoning about the code easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224274 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:19:53 +00:00
Colin LeMahieu
1eb5ad1ecd [Hexagon] Adding misc multiply encodings and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224273 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:17:03 +00:00
Matthias Braun
6097277eef LiveRangeCalc: Rewrite subrange calculation
This changes subrange calculation to calculate subranges sequentially
instead of in parallel. The code is easier to understand that way and
addresses the code review issues raised about LiveOutData being
hard to understand/needing more comments by removing them :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224272 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:16:21 +00:00
Colin LeMahieu
8e7359d3a7 [Hexagon] Adding doubleworld accumulating multiplies of halfwords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224267 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 20:17:46 +00:00
Colin LeMahieu
f8396b83c6 [Hexagon] Adding accumulating half word multiplies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 20:10:28 +00:00
Colin LeMahieu
c3449d705b [Hexagon] Adding multiply with rnd/sat/rndsat
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224265 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 20:01:59 +00:00
Matthias Braun
908d623dff LiveRangeCalc: use more range based for loops; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224263 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:40:46 +00:00
Colin LeMahieu
e9e8f1fe77 [Hexagon] Adding encoding bits for halfword multiplies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224261 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:22:07 +00:00
Ahmed Bougacha
77effd8d7e [X86] Also pretty-print shuffle mask for INSERTPS rm variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224260 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:17:54 +00:00
Duncan P. N. Exon Smith
1ef70ff39b IR: Make metadata typeless in assembly
Now that `Metadata` is typeless, reflect that in the assembly.  These
are the matching assembly changes for the metadata/value split in
r223802.

  - Only use the `metadata` type when referencing metadata from a call
    intrinsic -- i.e., only when it's used as a `Value`.

  - Stop pretending that `ValueAsMetadata` is wrapped in an `MDNode`
    when referencing it from call intrinsics.

So, assembly like this:

    define @foo(i32 %v) {
      call void @llvm.foo(metadata !{i32 %v}, metadata )
      call void @llvm.foo(metadata !{i32 7}, metadata )
      call void @llvm.foo(metadata , metadata )
      call void @llvm.foo(metadata , metadata )
      call void @llvm.foo(metadata !{metadata !3}, metadata )
      ret void, !bar 
    }
     = metadata !{metadata !2}
     = metadata !{i32* @global}
     = metadata !{metadata !3}
     = metadata !{}

turns into this:

    define @foo(i32 %v) {
      call void @llvm.foo(metadata i32 %v, metadata )
      call void @llvm.foo(metadata i32 7, metadata )
      call void @llvm.foo(metadata i32* @global, metadata )
      call void @llvm.foo(metadata , metadata )
      call void @llvm.foo(metadata !{!3}, metadata )
      ret void, !bar 
    }
     = !{!2}
     = !{i32* @global}
     = !{!3}
     = !{}

I wrote an upgrade script that handled almost all of the tests in llvm
and many of the tests in cfe (even handling many `CHECK` lines).  I've
attached it (or will attach it in a moment if you're speedy) to PR21532
to help everyone update their out-of-tree testcases.

This is part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224257 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:07:53 +00:00
Michael Ilseman
9ecdca9115 Silence more static analyzer warnings.
Add in definedness checks for shift operators, null checks when
pointers are assumed by the code to be non-null, and explicit
unreachables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224255 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 18:48:43 +00:00
Vladimir Medic
77b6849e61 Add disassembler tests for mips3 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224253 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 16:19:34 +00:00
Aaron Ballman
bfba3894f3 Changing a cast from unsigned to uint64_t, should be NFC in practice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224249 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 14:25:12 +00:00
Elena Demikhovsky
2f6d42351a Sink store based on alias analysis
- by Ella Bolshinsky
The alias analysis is used define whether the given instruction
is a barrier for store sinking. For 2 identical stores, following
instructions are checked in the both basic blocks, to determine
whether they are sinking barriers.

http://reviews.llvm.org/D6420



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224247 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 14:09:53 +00:00
Michael Kuperstein
299e0d4c24 [X86] Break false dependencies before partial register updates when the source operand is in memory
Adds the various "rm" instruction variants into the list of instructions that have a partial register update. Also adds all variants of SQRTSD that were missing in the original list.

Differential Revision: http://reviews.llvm.org/D6620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224246 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 13:18:21 +00:00
Elena Demikhovsky
3f2027522c AVX-512: Added EXPAND instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224241 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 10:03:52 +00:00
Alexey Bataev
0bf492d3c1 Fix line mapping information in LLVM JIT profiling with Vtune
The line mapping information for dynamic code is reported incorrectly. It causes VTune to map LLVM generated code to source lines incorrectly. This patch fix this issue.
Patch by Denis Pravdin.
Differential Revision: http://reviews.llvm.org/D6603


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224229 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 04:45:43 +00:00
David Majnemer
1691fa27d7 ThreadLocal: Move Unix-specific code out of Support/ThreadLocal.cpp
Just a cleanup, no functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224227 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 01:19:53 +00:00
David Majnemer
1f59bf4441 ThreadLocal: Return a mutable pointer if templated with a non-const type
It makes more sense for ThreadLocal<const T>::get to return a const T*
and ThreadLocal<T>::get to return a T*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224225 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 01:04:45 +00:00
Elena Demikhovsky
1c3a1516f8 Loop Vectorizer minor changes in the code -
some comments, function names, identation.

Reviewed here: http://reviews.llvm.org/D6527


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224218 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 09:43:50 +00:00
David Majnemer
a53d2268a9 APInt: udivrem should use machine instructions for single-word APInts
This mirrors the behavior of APInt::udiv and APInt::urem.  Some
architectures, like X86, have a single instruction which can compute
both division and remainder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224217 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 09:41:56 +00:00
David Majnemer
fabf5cc5d9 ScalarEvolution: Remove SCEVUDivision, it's unused
This is just a code simplification, no functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224216 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 09:12:33 +00:00
Hal Finkel
0b19b561e0 [PowerPC] Handle cmp op promotion for SELECT[_CC] nodes in PPCTL::DAGCombineExtBoolTrunc
PPCTargetLowering::DAGCombineExtBoolTrunc contains logic to remove unwanted
truncations and extensions when dealing with nodes of the form:
  zext(binary-ops(binary-ops(trunc(x), trunc(y)), ...)

There was a FIXME in the implementation (now removed) regarding the fact that
the function would abort the transformations if any of the non-output operands
of a SELECT or SELECT_CC node would need to be promoted (because they were
also output operands, for example). As a result, we continued to generate
unnecessary zero-extends for code such as this:

  unsigned foo(unsigned a, unsigned b) {
    return  (a <= b) ? a : b;
  }

which would produce:

  cmplw 0, 3, 4
  isel 3, 4, 3, 1
  rldicl 3, 3, 0, 32
  blr

and now we produce:

  cmplw 0, 3, 4
  isel 3, 4, 3, 1
  blr

which is better in the obvious way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224213 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 05:53:19 +00:00
Ahmed Bougacha
780a093afb Reapply "[ARM] Combine base-updating/post-incrementing vector load/stores."
r223862 tried to also combine base-updating load/stores.
r224198 reverted it, as "it created a regression on the test-suite
on test MultiSource/Benchmarks/Ptrdist/anagram by scrambling the order
in which the words are shown."
Reapply, with a fix to ignore non-normal load/stores.
Truncstores are handled elsewhere (you can actually write a pattern for
those, whereas for postinc loads you can't, since they return two values),
but it should be possible to also combine extloads base updates, by checking
that the memory (rather than result) type is of the same size as the addend.

Original commit message:
We used to only combine intrinsics, and turn them into VLD1_UPD/VST1_UPD
when the base pointer is incremented after the load/store.

We can do the same thing for generic load/stores.

Note that we can only combine the first load/store+adds pair in
a sequence (as might be generated for a v16f32 load for instance),
because other combines turn the base pointer addition chain (each
computing the address of the next load, from the address of the last
load) into independent additions (common base pointer + this load's
offset).

Differential Revision: http://reviews.llvm.org/D6585


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 23:22:12 +00:00
Renato Golin
1e173b7139 Revert "[ARM] Combine base-updating/post-incrementing vector load/stores."
This reverts commit r223862, as it created a regression on the test-suite
on test MultiSource/Benchmarks/Ptrdist/anagram by scrambling the order
in which the words are shown. We'll investigate the issue and re-apply
when safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224198 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 20:23:18 +00:00
Aaron Ballman
eefc8cb6c0 Silencing a -Wsign-compare warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224195 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 16:55:02 +00:00
Akira Hatanaka
ce9b37c087 Rename argument strings of codegen passes to avoid collisions with command line
options.

This commit changes the command line arguments (PassInfo::PassArgument) of two
passes, MachineFunctionPrinter and MachineScheduler, to avoid collisions with
command line options that have the same argument strings.

This bug manifests when the PassList construct (defined in opt.cpp) is used
in a tool that links with codegen passes. To reproduce the bug, paste the
following lines into llc.cpp and run llc.

#include "llvm/IR/LegacyPassNameParser.h"
static llvm:🆑:list<const llvm::PassInfo*, bool, llvm::PassNameParser>
PassList(llvm:🆑:desc("Optimizations available:"));

rdar://problem/19212448


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224186 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 04:52:04 +00:00
Hal Finkel
4e703f82f2 [PowerPC] Add a DAGToDAG peephole to remove unnecessary zero-exts
On PPC64, we end up with lots of i32 -> i64 zero extensions, not only from all
of the usual places, but also from the ABI, which specifies that values passed
are zero extended. Almost all 32-bit PPC instructions in PPC64 mode are defined
to do *something* to the higher-order bits, and for some instructions, that
action clears those bits (thus providing a zero-extended result). This is
especially common after rotate-and-mask instructions. Adding an additional
instruction to zero-extend the results of these instructions is unnecessary.

This PPCISelDAGToDAG peephole optimization examines these zero-extensions, and
looks back through their operands to see if all instructions will implicitly
zero extend their results. If so, we convert these instructions to their 64-bit
variants (which is an internal change only, the actual encoding of these
instructions is the same as the original 32-bit ones) and remove the
unnecessary zero-extension (changing where the INSERT_SUBREG instructions are
to make everything internally consistent).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224169 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 23:59:36 +00:00
David Majnemer
3b7e6d27d2 ValueTracking: Don't recurse too deeply in computeKnownBitsFromAssume
Respect the MaxDepth recursion limit, doing otherwise will trigger an
assert in computeKnownBits.

This fixes PR21891.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224168 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 23:59:29 +00:00
Chad Rosier
f05fc43036 [ARMConstantIsland] Insert tbb/tbh optimization where previous jump table resided.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224165 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 23:27:40 +00:00
Yaron Keren
27d4d1c7bf Pass EC by reference to MemoryBufferMMapFile to return error code.
Patch by Kim Grasman!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224159 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 22:27:53 +00:00
Michael Ilseman
3f0e8837be Clean up static analyzer warnings.
Clang's static analyzer found several potential cases of undefined
behavior, use of un-initialized values, and potentially null pointer
dereferences in tablegen, Support, MC, and ADT. This cleans them up
with specific assertions on the assumptions of the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224154 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 21:48:03 +00:00
Colin LeMahieu
5271cab7c9 [Hexagon] Adding double word add/min/minu/max/maxu instructions and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224153 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 21:29:25 +00:00
Colin LeMahieu
365cfbc3f0 [Hexagon] Adding J class call instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224150 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 21:12:27 +00:00
Duncan P. N. Exon Smith
85cbe57fc5 IR: Don't track nullptr on metadata RAUW
The RAUW support in `Metadata` supports going to `nullptr` specifically
to handle values being deleted, causing `ValueAsMetadata` to be deleted.

Fix the case where the reference is from a `TrackingMDRef` (as opposed
to an `MDOperand` or a `MetadataAsValue`).

This is surprisingly rare -- metadata tracked by `TrackingMDRef` going
to null -- but it came up in an openSUSE bootstrap during inlining.  The
tracking ref was held by the `ValueMap` because it was referencing a
local, the basic block containing the local became dead after it had
been merged in, and when the local was deleted, the tracking ref
asserted in an `isa`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224146 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 19:24:33 +00:00
Rafael Espindola
8ef835e3dc MAP_FILE is the default. We don't need to add it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224144 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 19:12:42 +00:00
Steven Wu
ac42de8ef0 More code format fix from r224133, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224140 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 18:48:37 +00:00
Rafael Espindola
879b54621e Remove silly left over from the Windows resize_file implementation.
I didn't notice the problem first because on a non debug build the CRT was
just exiting the process without any message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224139 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 18:37:43 +00:00
Rafael Espindola
7f4b22e7de Move the resize file feature from mapped_file_region to the only user.
This removes a duplicated stat on every file that llvm-ar looks at.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224138 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 18:13:23 +00:00
Rafael Espindola
e1136e38a7 Pass a FD to resise_file and add a testcase.
I will add a real use in another commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224136 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 17:55:12 +00:00
Rafael Espindola
7291e0706e Remove unused feature. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224135 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 17:35:34 +00:00
Steven Wu
00b3170e70 Restructure code from r224097. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224133 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 17:21:54 +00:00
Robert Khasanov
5dc8ac87f1 [AVX512] Enabling bit logic lowering
Added lowering tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224132 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 17:02:18 +00:00
Vasileios Kalintiris
7db2065236 [mips] Enable code generation for MIPS-III.
Summary:
This commit enables the MIPS-III target and adds support for code
generation of SELECT nodes. We have to use pseudo-instructions with
custom inserters for these nodes as MIPS-III CPUs do not have
conditional-move instructions.

Depends on D6212

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224128 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 15:16:46 +00:00
Robert Khasanov
a4f5a5525d [AVX512] Enabling MIN/MAX lowering.
Added lowering tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224127 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 15:10:43 +00:00
Andrea Di Biagio
de48903a20 Reapply "[MachineScheduler] Fix for PR21807: minor code difference building with/without -g."
This reapplies r224118 with a fix for test 'misched-code-difference-with-debug.ll'.
That test was failing on some buildbots because it was x86 specific but it was
missing a target triple.
Added an explicit triple to test misched-code-difference-with-debug.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224126 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 15:09:58 +00:00
Chad Rosier
5400fd6d79 [Reassociate] Use dbgs() instead of errs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224125 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 14:44:12 +00:00
Vasileios Kalintiris
31f9936bf5 [mips] Support SELECT nodes for targets that don't have conditional-move instructions.
Summary:
For Mips targets that do not have conditional-move instructions, ie. targets
before MIPS32 and MIPS-IV, we have to insert a diamond control-flow
pattern in order to support SELECT nodes. In order to do that, we add
pseudo-instructions with a custom inserter that emits the necessary
control-flow that selects the correct value.

With this patch we add complete support for code generation of Mips-II targets
based on the LLVM test-suite.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6212

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224124 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 14:41:37 +00:00
Robert Khasanov
b59ec5ad50 [AVX512] Minor fix in lowering pattern for broadcast intrustions.
No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224122 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 14:21:30 +00:00
Andrea Di Biagio
bf72e14565 Revert: [MachineScheduler] Fix for PR21807: minor code difference building with/without -g.
Test 'misched-code-difference-with-debug.ll' was failing on some buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224121 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 13:34:03 +00:00