Because the instcombine has to scan the entire function when it starts up
to begin with, we might as well do it in DFO so we can nuke unreachable code.
This fixes: Transforms/InstCombine/2005-07-07-DeadPHILoop.ll
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module to the ELF file. Test it by adding support for emitting common
symbols. This allows us to compile this:
%X = weak global int 0
%Y = weak global int 0
%Z = weak global int 0
to an elf file that 'readelf's this:
Symbol table '.symtab' contains 4 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000004 4 OBJECT GLOBAL DEFAULT COM X
2: 00000004 4 OBJECT GLOBAL DEFAULT COM Y
3: 00000004 4 OBJECT GLOBAL DEFAULT COM Z
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XMM registers. There are many known deficiencies and fixmes, which will be
addressed ASAP. The major benefit of this work is that it will allow the
LLVM register allocator to allocate FP registers across basic blocks.
The x86 backend will still default to x87 style FP. To enable this work,
you must pass -enable-sse-scalar-fp and either -sse2 or -sse3 to llc.
An example before and after would be for:
double foo(double *P) { double Sum = 0; int i; for (i = 0; i < 1000; ++i)
Sum += P[i]; return Sum; }
The inner loop looks like the following:
x87:
.LBB_foo_1: # no_exit
fldl (%esp)
faddl (%eax,%ecx,8)
fstpl (%esp)
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
SSE2:
addsd (%eax,%ecx,8), %xmm0
incl %ecx
cmpl $1000, %ecx
#FP_REG_KILL
jne .LBB_foo_1 # no_exit
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1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
4. Now that we have Value*'s available in the lowering methods, pass them
into any load/stores from the valist that are emitted
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1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
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1: Legalize operand in UINT_TO_FP expanision
2: SRA x, const i8 was not promoting the constant to shift amount type.
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is at least overloading the right virtual methods. The implementations
are currently wrong though. This fixes Ptrdist/bc, but not other programs
(e.g. siod).
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The optimization for locally used allocas was not safe for allocas that
were read before they were written. This change disables that optimization
in that case.
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is a mismatch in their character type pointers (i.e. fprintf() prints an
array of ubytes while fwrite() takes an array of sbytes).
We can probably do better than this (such as casting the ubyte to an
sbyte).
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rather than relying on the assembler. Only a few more pseudo instructions
left. Also merge load code paths.
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is to use RA, which assumes the called function uses RA for the register
holding the return address when it issues a ret.
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working. The instruction selector changes will hopefully be coming later
this week once they are debugged. This is necessary to support the darwin
x86 FP model, and is recommended by intel as the replacement for x87. As
a bonus, the register allocator knows how to deal with these registers
across basic blocks, unliky the FP stackifier. This leads to significantly
better codegen in several cases.
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