Daniel Dunbar
7e06af85d1
MC/Mach-O: Use fixup info instead of hard coded list.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121970 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 15:42:31 +00:00
Frits van Bommel
01abcf339f
Fix a bug in the loop in JumpThreading::ProcessThreadableEdges() where it could falsely produce a MultipleDestSentinel value if the first predecessor ended with an 'indirectbr'. If that happened, it caused an unnecessary FindMostPopularDest() call.
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This wasn't a correctness problem, but it broke the fast path for single-predecessor blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121966 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 12:16:00 +00:00
Duncan Sands
ebef48ea4b
Speculatively revert commit 121905 since it looks like it might have broken the
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dragonegg self-host buildbot. Original commit message:
Add an InstCombine transform to recognize instances of manual overflow-safe addition
(performing the addition in a wider type and explicitly checking for overflow), and
fold them down to intrinsics. This currently only supports signed-addition, but could
be generalized if someone works out the magic constant formulas for other operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121965 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 09:40:54 +00:00
Michael J. Spencer
3ff9563c3e
MemoryBuffer now return an error_code and returns a OwningPtr<MemoryBuffer> via an out parm.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121958 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:29:14 +00:00
Daniel Dunbar
2761fc4270
MC: Move target specific fixup info descriptors to TargetAsmBackend instead of
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the MCCodeEmitter, which seems like a better organization.
- Also, cleaned up some magic constants while in the area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121953 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:20:06 +00:00
Jason W Kim
f13743bb3c
1. ARM/MC/ELF: A few more ELF relocs for .o
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2. Fixed EmitLocalCommonSymbol for ELF (Yes, they exist. :)
Test added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:12:17 +00:00
Daniel Dunbar
745dacc91d
MC: Make TargetAsmBackend available to the AsmStreamer.
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- Treaty talks on the non-proliferation of MC objects broke down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 03:05:59 +00:00
Dan Gohman
326faecc35
Update a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 02:55:10 +00:00
Dan Gohman
387f28aff4
Make memcpyopt TBAA-aware.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 02:51:19 +00:00
NAKAMURA Takumi
ad3ea3d85f
lib/Support/regexec.c: Let Regex LLP64-aware.
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On LLP64 Win64, 'states1' (for small version) was expanded to 'char *' for large version. Thus small version would be mischosen when nstates > 32 regardless of sizeof(long) on Win64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121942 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 01:48:15 +00:00
Matt Beaumont-Gay
656b3d22f7
Delete an extra "Imm5 = ", caught by GCC's -Wsequence-point but not by Clang
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(see PR4579).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121939 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 01:34:26 +00:00
Bill Wendling
6baf46dbea
Remove fixup_arm_thumb_ldst. The code was never calling the "fixup" stuff for
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it. I.e., it was always an immediate value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:50:33 +00:00
Bill Wendling
5a54516adf
Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi
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respectively.
It may be a bug that these opcodes are getting this far into machine code
generation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121931 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:49:54 +00:00
Bill Wendling
dedec2b89d
Add encodings for Thumb1 Spill and Restore pseudos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-16 00:38:41 +00:00
Dan Gohman
d67ca9de89
Enable TBAA by default.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:58:44 +00:00
Dan Gohman
f4177aa019
Preserve TBAA tags when doing load PRE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121921 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:53:55 +00:00
Jim Grosbach
3e333637f1
Thumb1 had two patterns for the same load-from-constant-pool instruction.
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Canonicalize on tLDRpci and remove tLDRcp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121920 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:52:36 +00:00
Eric Christopher
836c6245ad
Don't handle -arm-long-calls in fast isel for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:47:29 +00:00
Jakob Stoklund Olesen
d0bb5e2ca0
Start using SplitKit and MachineLoopRanges in RegAllocGreedy in preparation of
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live range splitting around loops guided by register pressure.
So far, trySplit() simply prints a lot of debug output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121918 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:46:13 +00:00
Jakob Stoklund Olesen
ceadc01e91
Add MachineLoopRanges analysis.
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A MachineLoopRange contains the intervals of slot indexes covered by the blocks
in a loop. This representation of the loop blocks is more efficient to compare
against interfering registers during register coalescing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:41:23 +00:00
Bill Wendling
7a905a82f7
If we're changing the frame register to a physical register other than SP, we
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need to use tLDRi and tSTRi instead of tLDRspi and tSTRspi respectively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:32:27 +00:00
Bill Wendling
dc3813750e
Whitespace cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121914 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:31:24 +00:00
Matt Beaumont-Gay
818b5f5dd7
Better fix for opt build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121910 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:14:45 +00:00
Evan Cheng
f735f2da6e
Only rr forms of ADD*_DB are commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121908 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:57:36 +00:00
Owen Anderson
12984de314
Add an InstCombine transform to recognize instances of manual overflow-safe addition
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(performing the addition in a wider type and explicitly checking for overflow), and
fold them down to intrinsics. This currently only supports signed-addition, but could
be generalized if someone works out the magic constant formulas for other operations.
Fixes <rdar://problem/8558713>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:32:38 +00:00
Matt Beaumont-Gay
e194b26ffd
Fix opt -Werror build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:21:20 +00:00
Evan Cheng
a63cde26ff
Teach machine cse to commute instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:16:21 +00:00
Bob Wilson
0406356cd4
Add Neon VCVT instructions for f32 <-> f16 conversions.
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Clang is now providing intrinsics for these and so we need to support them
in the backend. Radar 8068427.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121902 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 22:14:12 +00:00
Dan Gohman
c01895c7db
Reapply r121886, and also update DecomposeGEPExpression to keep
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it in sync.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121895 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:49:55 +00:00
Dan Gohman
3928d13808
Revert r121886. DecomposeGEPExpression needs to be kept
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in sync.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121892 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:39:25 +00:00
Wesley Peck
dc9d87a9bb
Lower the MBlaze target specific calling conventions for "interrupt_handler"
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and "save_volatiles" correctly. This completes the custom calling convention
functionality changes for the MBlaze backend that were started in 121888.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121891 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:27:28 +00:00
Dan Gohman
243712720a
Strengthen GetUnderlyingObject using InstructionSimplify.
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While LLVM's main design is that analysis code shouldn't
go out of its way to understand code which hasn't been
InstCombined, analysis utility routines like this can
find themselves being called in the middle of transform
passes when instcombine hasn't had a chance to run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:10:26 +00:00
Dan Gohman
5034dd318a
Move Value::getUnderlyingObject to be a standalone
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function so that it can live in Analysis instead of
VMCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121885 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:02:24 +00:00
Wesley Peck
d5f4bc2c33
Add some special purpose register definitions to the MBlaze backend and cleanup some old, unused floating point register definitions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121882 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 19:35:36 +00:00
Owen Anderson
d18e011cbb
Fix typo in r121875.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 19:24:24 +00:00
Jim Grosbach
d481110ef7
Tweak a few pseudo-inst pattern base classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121878 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 19:03:16 +00:00
Nick Lewycky
69bfdf5a24
Clean up some of LVI:
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* mergeIn now uses constant folding for constants that are provably not-equal.
* sink some sanity checks from the get*() methods into the mark*() methods, to ensure that we never have a constant/notconstant ConstantInt
* some textual cleanups, whitespace changes, removing "else" after return, that sort of thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121877 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 18:57:18 +00:00
Jim Grosbach
41b1d4e472
The new t2LEApcrel* pseudo instructions need the size specified.
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rdar://8768390
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 18:48:45 +00:00
Owen Anderson
47dbd429da
Implement cleanups suggested by Daniel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 18:48:27 +00:00
Jakob Stoklund Olesen
6203295473
Fix build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121872 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 18:07:48 +00:00
Jakob Stoklund Olesen
697483addf
Detect and enumerate bypass loops.
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Bypass loops have the current live range live through, but contain no uses or
defs. Splitting around a bypass loop can free registers for other uses inside
the loop by spilling the split range.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121871 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 17:49:52 +00:00
Jakob Stoklund Olesen
521a453721
Separate SplitAnalysis::getSplitLoops().
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This method returns the set of loops with uses that are candidates for
splitting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 17:41:19 +00:00
Duncan Sands
fea3b218d6
Move Sub simplifications and additional Add simplifications out of
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instcombine and into InstructionSimplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 14:07:39 +00:00
Duncan Sands
f8b1a5ea96
If we detect that the instruction we are simplifying is unreachable, arrange for
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it to be replaced by undef rather than not replaced at all, the idea being that
this may reduce the amount of work done by whoever called InstructionSimplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 11:02:22 +00:00
Frits van Bommel
26e097ca4b
Teach jump threading to "look through" a select when the branch direction of a terminator depends on it.
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When it sees a promising select it now tries to figure out whether the condition of the select is known in any of the predecessors and if so it maps the operands appropriately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 09:51:20 +00:00
Bill Wendling
22447ae54b
Add fixups for Thumb LDR/STR instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 08:51:02 +00:00
Rafael Espindola
2bf6afc277
Relax alignment fragments.
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With this we don't need the EffectiveSize field anymore. Without that field
LayoutFragment only updates offsets and we don't need to invalidate the
current fragment when it is relaxed (only the ones following it).
This is also a very small improvement in the accuracy of the layout info as
we now use the after relaxation size immediately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 08:45:53 +00:00
Rafael Espindola
f9a4476173
Patch by David Meyer to avoid a O(N^2) behaviour when relaxing fragments.
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Since we now don't update addresses so early, we might relax a bit more than
we need to. This is simillar to the issue in PR8467.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:39:29 +00:00
Chris Lattner
9448184b99
add another overflow idiom
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:28:58 +00:00
Chris Lattner
08859ffa63
add a note about overflow idiom recognition.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121853 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:25:55 +00:00
Rafael Espindola
b35d56c2fe
Generalize an assert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:12:24 +00:00
Chris Lattner
ef17f08dbc
add a shift/imul missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 07:10:43 +00:00
Chris Lattner
2fc36e19b1
add a note about a SPEC hack that gcc mainline does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 06:38:24 +00:00
Chris Lattner
33e77d3cb9
take care of some todos, transforming [us]mul_lohi into
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a wider mul if the wider mul is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121848 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 06:04:19 +00:00
Chris Lattner
1a0fbe2cf4
when transforming a MULHS into a wider MUL, there is no need to SRA the
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result, the top bits are truncated off anyway, just use SRL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 05:51:39 +00:00
Chris Lattner
ba3c815570
make qsort predicate more conformant by returning 0 for equal values.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121838 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 04:52:41 +00:00
Bill Wendling
bc4224bc6b
Reapply r121808 now that the missing patterns have been supplied.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 01:03:19 +00:00
Bill Wendling
415af3452e
Add some missing patterns now that tLDRB and tLDRH are split into reg and
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immediate versions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121819 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 00:58:57 +00:00
Owen Anderson
86e8a700f5
Fix PR8790, another instance where unreachable code can cause instruction simplification to fail,
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this case involve a select that simplifies to itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121817 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 00:55:35 +00:00
Owen Anderson
93f83deba1
Cleanup trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 00:52:44 +00:00
Bill Wendling
7d1d8db54a
Revert r121808 until I can fix the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 00:04:00 +00:00
Jim Grosbach
9d04dc52a5
thumb adr fixup needs alignment just like the t2 version.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:47:35 +00:00
Bill Wendling
345cdb6475
Comments and cleaning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121809 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:42:48 +00:00
Bill Wendling
2af0fd3fee
Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In
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particular, we want
ldr r2, [r3]
to be equivalent to
ldr r2, [r3, #0 ]
and not
ldr r2, [r3, r0]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:40:49 +00:00
Jakob Stoklund Olesen
257c556d85
Simplify RegAllocGreedy's use of register aliases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121807 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:38:19 +00:00
Jakob Stoklund Olesen
eb7464ebda
Simplify CCState's use of register aliases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:28:01 +00:00
Jakob Stoklund Olesen
597faa8f1f
Simplify AggressiveAntiDepBreaker's use of register aliases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121805 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:23:15 +00:00
Jakob Stoklund Olesen
16999da951
Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 23:10:48 +00:00
Jim Grosbach
d40963c406
Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121798 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 22:28:03 +00:00
Bill Wendling
ee2b350d83
Fix comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121797 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 22:26:49 +00:00
Bill Wendling
b6faf65215
Multiclassify the LDR/STR encoding patterns. The only functionality difference
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is the addition of the FoldableAsLoad & Rematerializable flags to some of the
load instructions. ARM has these flags set for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 22:10:49 +00:00
Evan Cheng
bbc726d624
Fix a minor bug in two-address pass. It was missing a commute opportunity.
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regB = move RCX
regA = op regB, regC
RAX = move regA
where both regB and regC are killed. If regB is constrainted to non-compatible
physical registers but regC is not constrainted at all, then it's better to
commute the instruction.
movl %edi, %eax
shlq $32, %rcx
leaq (%rcx,%rax), %rax
=>
movl %edi, %eax
shlq $32, %rcx
orq %rcx, %rax
rdar://8762995
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121793 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 21:34:53 +00:00
Jim Grosbach
8d6d7d6e30
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 21:28:29 +00:00
Matt Beaumont-Gay
3ef9f3da39
Move debugging code entirely within DEBUG(). Silences an unused variable
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warning in the opt build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121791 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 21:14:55 +00:00
Jim Grosbach
40edf73a62
Refactor a bit for legibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121790 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 21:10:47 +00:00
Jim Grosbach
00f25fa43e
trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 20:46:39 +00:00
Jim Grosbach
eb61272150
Make sure to propagate the predicate operands for LEApcrel to ADR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 20:45:47 +00:00
Owen Anderson
86abd48fd0
Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121784 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 19:42:53 +00:00
Jakob Stoklund Olesen
bfce678de7
Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121783 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 19:38:49 +00:00
Jakob Stoklund Olesen
4a84cce3ed
Use TRI::printReg instead of AbstractRegisterDescription when printing
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LiveIntervalUnions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121781 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 18:53:47 +00:00
Jakob Stoklund Olesen
414e5023f8
Add TargetRegisterInfo::printReg() to pretty-print registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121780 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 18:53:39 +00:00
Jim Grosbach
4750020788
ARM Fixups relative to thumb functions need to have the low bit of the value
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set for interworking to work properly. rdar://8755956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121778 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 18:46:57 +00:00
Jakob Stoklund Olesen
d84de8cf62
Q.seenAllInterferences() must be called after Q.collectInterferingVRegs().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 17:47:36 +00:00
Daniel Dunbar
abfbac52df
MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121772 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 17:37:16 +00:00
Jim Grosbach
e8eb1ea6ac
Trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 16:25:15 +00:00
Bill Wendling
971321bb70
Use the integer scheduling intrinsic for integer loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 12:33:05 +00:00
Chris Lattner
3aff13b82a
- Insert new instructions before DomBlock's terminator,
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which is simpler than finding a place to insert in BB.
- Don't perform the 'if condition hoisting' xform on certain
i1 PHIs, as it interferes with switch formation.
This re-fixes "example 7", without breaking the world hopefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121764 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 08:46:09 +00:00
Chris Lattner
60d410d7bb
fix two significant issues with FoldTwoEntryPHINode:
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first, it can kick in on blocks whose conditions have been
folded to a constant, even though one of the edges will be
trivially folded.
second, it doesn't clean up the "if diamond" that it just
eliminated away. This is a problem because other simplifycfg
xforms kick in depending on the order of block visitation,
causing pointless work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 08:01:53 +00:00
Chris Lattner
071edc81f2
remove the instsimplify logic I added in r121754. It is apparently
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breaking the selfhost builds, though I can't fathom how.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 07:53:03 +00:00
Chris Lattner
44da7ca421
clean up logic, convert std::set to SmallPtrSet, handle the case
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when all 2-entry phis are simplified away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121760 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 07:41:39 +00:00
Chris Lattner
e0b18e5912
tidy up a bit, move DEBUG down to when we commit to doing the transform so we
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don't print it unless the xform happens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121758 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 07:23:10 +00:00
Chris Lattner
07ff3539f5
use SimplifyInstruction instead of reimplementing part of it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121757 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 07:20:29 +00:00
Chris Lattner
995ba1bd49
simplify GetIfCondition by using getSinglePredecessor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 07:15:21 +00:00
Chris Lattner
6de0a28dfb
use AddPredecessorToBlock in 3 places instead of a manual loop.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 07:09:42 +00:00
Chris Lattner
73c50a68a7
make FoldTwoEntryPHINode use instsimplify a bit, make
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GetIfCondition faster by avoiding pred_iterator. No
really interesting change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 07:00:00 +00:00
Chris Lattner
2112bbc42d
remove the dead (and terrible) llvm::RemoveSuccessor function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 06:51:55 +00:00
Chris Lattner
302ba6fc1c
improve DEBUG's a bit, switch to eraseFromParent() to simplify
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code a bit, switch from constant folding to instsimplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121751 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 06:17:25 +00:00
Chris Lattner
117f8cffc5
reapply my recent change that disables a piece of the switch formation
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work, but fixes 400.perlbmk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121749 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 05:57:30 +00:00
Bill Wendling
f4caf69720
The tLDR et al instructions were emitting either a reg/reg or reg/imm
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instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.
The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.
There are some obvious cleanups here, which will happen shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 03:36:38 +00:00
Evan Cheng
0c1aec1891
bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-14 03:22:07 +00:00