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Author SHA1 Message Date
Rafael Espindola
b35d56c2fe Generalize an assert. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121851 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 07:12:24 +00:00
Chris Lattner
ef17f08dbc add a shift/imul missed optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121850 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 07:10:43 +00:00
Chris Lattner
2fc36e19b1 add a note about a SPEC hack that gcc mainline does. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121849 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 06:38:24 +00:00
Chris Lattner
33e77d3cb9 take care of some todos, transforming [us]mul_lohi into 
a wider mul if the wider mul is legal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121848 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 06:04:19 +00:00
Chris Lattner
1a0fbe2cf4 when transforming a MULHS into a wider MUL, there is no need to SRA the 
result, the top bits are truncated off anyway, just use SRL.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121846 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 05:51:39 +00:00
Chris Lattner
ba3c815570 make qsort predicate more conformant by returning 0 for equal values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121838 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 04:52:41 +00:00
Bill Wendling
bc4224bc6b Reapply r121808 now that the missing patterns have been supplied. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121820 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 01:03:19 +00:00
Bill Wendling
415af3452e Add some missing patterns now that tLDRB and tLDRH are split into reg and 
immediate versions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121819 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 00:58:57 +00:00
Owen Anderson
86e8a700f5 Fix PR8790, another instance where unreachable code can cause instruction simplification to fail, 
this case involve a select that simplifies to itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121817 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 00:55:35 +00:00
Owen Anderson
93f83deba1 Cleanup trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121816 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 00:52:44 +00:00
Bill Wendling
7d1d8db54a Revert r121808 until I can fix the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121815 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-15 00:04:00 +00:00
Jim Grosbach
9d04dc52a5 thumb adr fixup needs alignment just like the t2 version. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121812 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 23:47:35 +00:00
Bill Wendling
345cdb6475 Comments and cleaning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121809 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 23:42:48 +00:00
Bill Wendling
2af0fd3fee Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In 
particular, we want

   ldr r2, [r3]

to be equivalent to

   ldr r2, [r3, #0]

and not

   ldr r2, [r3, r0]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121808 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 23:40:49 +00:00
Jakob Stoklund Olesen
257c556d85 Simplify RegAllocGreedy's use of register aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121807 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 23:38:19 +00:00
Jakob Stoklund Olesen
eb7464ebda Simplify CCState's use of register aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121806 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 23:28:01 +00:00
Jakob Stoklund Olesen
597faa8f1f Simplify AggressiveAntiDepBreaker's use of register aliases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121805 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 23:23:15 +00:00
Jakob Stoklund Olesen
16999da951 Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121801 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 23:10:48 +00:00
Jim Grosbach
d40963c406 Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121798 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 22:28:03 +00:00
Bill Wendling
ee2b350d83 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121797 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 22:26:49 +00:00
Bill Wendling
b6faf65215 Multiclassify the LDR/STR encoding patterns. The only functionality difference 
is the addition of the FoldableAsLoad & Rematerializable flags to some of the
load instructions. ARM has these flags set for them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121794 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 22:10:49 +00:00
Evan Cheng
bbc726d624 Fix a minor bug in two-address pass. It was missing a commute opportunity. 
regB = move RCX
regA = op regB, regC
RAX  = move regA
where both regB and regC are killed. If regB is constrainted to non-compatible
physical registers but regC is not constrainted at all, then it's better to
commute the instruction.
       movl    %edi, %eax
       shlq    $32, %rcx
       leaq    (%rcx,%rax), %rax
=>
       movl    %edi, %eax
       shlq    $32, %rcx
       orq     %rcx, %rax
rdar://8762995


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121793 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 21:34:53 +00:00
Jim Grosbach
8d6d7d6e30 trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121792 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 21:28:29 +00:00
Matt Beaumont-Gay
3ef9f3da39 Move debugging code entirely within DEBUG(). Silences an unused variable 
warning in the opt build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121791 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 21:14:55 +00:00
Jim Grosbach
40edf73a62 Refactor a bit for legibility. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121790 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 21:10:47 +00:00
Jim Grosbach
00f25fa43e trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121789 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 20:46:39 +00:00
Jim Grosbach
eb61272150 Make sure to propagate the predicate operands for LEApcrel to ADR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121788 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 20:45:47 +00:00
Owen Anderson
86abd48fd0 Fix a small bug (typo?) in the fixup for Thumb1 CBZ/CBNZ instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121784 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 19:42:53 +00:00
Jakob Stoklund Olesen
bfce678de7 Add LiveIntervalUnion print methods, RegAllocGreedy::trySplit debug spew. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121783 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 19:38:49 +00:00
Jakob Stoklund Olesen
4a84cce3ed Use TRI::printReg instead of AbstractRegisterDescription when printing 
LiveIntervalUnions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121781 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 18:53:47 +00:00
Jakob Stoklund Olesen
414e5023f8 Add TargetRegisterInfo::printReg() to pretty-print registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121780 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 18:53:39 +00:00
Jim Grosbach
4750020788 ARM Fixups relative to thumb functions need to have the low bit of the value 
set for interworking to work properly. rdar://8755956

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121778 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 18:46:57 +00:00
Jakob Stoklund Olesen
d84de8cf62 Q.seenAllInterferences() must be called after Q.collectInterferingVRegs(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121774 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 17:47:36 +00:00
Daniel Dunbar
abfbac52df MC/ARM: Fix-up fixup offset for fixup_arm_branch target specific fixup. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121772 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 17:37:16 +00:00
Jim Grosbach
e8eb1ea6ac Trailing whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121769 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 16:25:15 +00:00
Bill Wendling
971321bb70 Use the integer scheduling intrinsic for integer loads and stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121765 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 12:33:05 +00:00
Chris Lattner
3aff13b82a - Insert new instructions before DomBlock's terminator, 
which is simpler than finding a place to insert in BB.
 - Don't perform the 'if condition hoisting' xform on certain
   i1 PHIs, as it interferes with switch formation.

This re-fixes "example 7", without breaking the world hopefully.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121764 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 08:46:09 +00:00
Chris Lattner
60d410d7bb fix two significant issues with FoldTwoEntryPHINode: 
first, it can kick in on blocks whose conditions have been
folded to a constant, even though one of the edges will be
trivially folded.

second, it doesn't clean up the "if diamond" that it just 
eliminated away.  This is a problem because other simplifycfg
xforms kick in depending on the order of block visitation,
causing pointless work.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121762 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 08:01:53 +00:00
Chris Lattner
071edc81f2 remove the instsimplify logic I added in r121754. It is apparently 
breaking the selfhost builds, though I can't fathom how.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121761 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 07:53:03 +00:00
Chris Lattner
44da7ca421 clean up logic, convert std::set to SmallPtrSet, handle the case 
when all 2-entry phis are simplified away.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121760 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 07:41:39 +00:00
Chris Lattner
e0b18e5912 tidy up a bit, move DEBUG down to when we commit to doing the transform so we 
don't print it unless the xform happens.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121758 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 07:23:10 +00:00
Chris Lattner
07ff3539f5 use SimplifyInstruction instead of reimplementing part of it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121757 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 07:20:29 +00:00
Chris Lattner
995ba1bd49 simplify GetIfCondition by using getSinglePredecessor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121756 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 07:15:21 +00:00
Chris Lattner
6de0a28dfb use AddPredecessorToBlock in 3 places instead of a manual loop. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121755 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 07:09:42 +00:00
Chris Lattner
73c50a68a7 make FoldTwoEntryPHINode use instsimplify a bit, make 
GetIfCondition faster by avoiding pred_iterator.  No
really interesting change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121754 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 07:00:00 +00:00
Chris Lattner
2112bbc42d remove the dead (and terrible) llvm::RemoveSuccessor function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121753 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 06:51:55 +00:00
Chris Lattner
302ba6fc1c improve DEBUG's a bit, switch to eraseFromParent() to simplify 
code a bit, switch from constant folding to instsimplify.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121751 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 06:17:25 +00:00
Chris Lattner
117f8cffc5 reapply my recent change that disables a piece of the switch formation 
work, but fixes 400.perlbmk.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121749 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 05:57:30 +00:00
Bill Wendling
f4caf69720 The tLDR et al instructions were emitting either a reg/reg or reg/imm 
instruction based on the t_addrmode_s# mode and what it returned. There is some
obvious badness to this. In particular, it's hard to do MC-encoding when the
instruction may change out from underneath you after the t_addrmode_s# variable
is finally resolved.

The solution is to revert a long-ago change that merged the reg/reg and reg/imm
versions. There is the addition of several new addressing modes. They no longer
have extraneous operands associated with them. I.e., if it's reg/reg we don't
have to have a dummy zero immediate tacked on to the SDNode.

There are some obvious cleanups here, which will happen shortly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121747 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 03:36:38 +00:00
Evan Cheng
0c1aec1891 bfi A, (and B, C1), C2) -> bfi A, B, C2 iff C1 & C2 == C1. rdar://8458663 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 03:22:07 +00:00
Jakob Stoklund Olesen
885b3283ea Remove unused vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121741 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 00:58:47 +00:00
Jakob Stoklund Olesen
46c83c80c5 Try reassigning all virtual register interferences, not just those with lower 
spill weight. Filter out fixed registers instead.

Add support for reassigning an interference that was assigned to an alias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121737 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 00:37:49 +00:00
Jakob Stoklund Olesen
b64d92e29f Add stub for RAGreedy::trySplit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121736 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 00:37:44 +00:00
Owen Anderson
a838a25d59 Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering much later, which makes the entire 
process cleaner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121735 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-14 00:36:49 +00:00
Owen Anderson
2d9220e8f5 Fix recent buildbot breakage by pulling SimplifyCFG back to its state as of r121694, the most recent state 
where I'm confident there were no crashes or miscompilations.  XFAIL the test added since then for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121733 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 23:49:28 +00:00
Jason W Kim
3fa4c1dc95 First cut of ARM/MC/ELF PIC relocations. 
Test has fixme, to move to .s -> .o test when AsmParser works better.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121732 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 23:16:07 +00:00
Bob Wilson
4711d5cda3 Remove the rest of the *_sfp Neon instruction patterns. 
Use the same COPY_TO_REGCLASS approach as for the 2-register *_sfp instructions.
This change made a big difference in the code generated for the
CodeGen/Thumb2/cross-rc-coalescing-2.ll test: The coalescer is still doing
a fine job, but some instructions that were previously moved outside the loop
are not moved now.  It's using fewer VFP registers now, which is generally
a good thing, so I think the estimates for register pressure changed and that
affected the LICM behavior.  Since that isn't obviously wrong, I've just
changed the test file.  This completes the work for Radar 8711675.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121730 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 23:02:37 +00:00
Bob Wilson
0e6d540d17 Simplify N2VSPat, removing some unnecessary type arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121729 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 23:02:31 +00:00
Chris Lattner
f9a1b2a4cf temporarily disable part of my previous patch, which causes an iterator invalidation issue, causing a crash on some versions of perlbmk. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121728 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 23:02:19 +00:00
Dan Gohman
c1f1efdd1a Update a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121727 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 22:53:18 +00:00
Owen Anderson
6b8719fd7d Revert r121721, which broke buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121726 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 22:51:08 +00:00
Dan Gohman
0f7f194416 Reapply r121520, PartialAlias implementation for BasicAA, now that 
memdep is updated to handle it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121725 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 22:50:24 +00:00
Dan Gohman
2cd1952917 Update memdep to handle PartialAlias as MayAlias. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121723 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 22:47:57 +00:00
Owen Anderson
e8d02539d7 Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provide correct fixups for Thumb2 ADR, 
which is _of course_ different from ARM ADR fixups, or any other Thumb2 fixup.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121721 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 22:29:52 +00:00
Bob Wilson
4dedddce93 Delete a line that I forgot to revert previously. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121719 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 22:05:55 +00:00
Bob Wilson
1e6f59608b Use COPY_TO_REGCLASS instead of pseudo instructions for Neon FP patterns. 
Jakob Olesen suggested that we can avoid the need for separate pseudo
instructions here by using COPY_TO_REGCLASS in the patterns.  The pattern
gets pretty ugly but it seems to work well.  Partial fix for Radar 8711675.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121718 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 21:58:05 +00:00
Bob Wilson
3a6756cb1c Use pseudo instructions for 2-register Neon instructions for scalar FP. 
Partial fix for Radar 8711675.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121716 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 21:05:52 +00:00
Bob Wilson
6dbcea1f8e Remove unused instruction class arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121715 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 21:05:44 +00:00
Evan Cheng
30fb13f97a Generalize BFI isel lowering a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121714 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 20:32:54 +00:00
Chris Lattner
94c58a0906 add some DEBUG's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121711 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 19:55:30 +00:00
Owen Anderson
c266600bec In Thumb2, direct branches can be encoded as either a "short" conditional branch with a null predicate, or 
as a "long" direct branch.  While the mnemonics are the same, they encode the branch offset differently, and
the Darwin assembler appears to prefer the "long" form for direct branches.  Thus, in the name of bitwise
equivalence, provide encoding and fixup support for it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121710 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 19:31:11 +00:00
Jim Grosbach
56a2535474 Use 32-bit types for 32-bit values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121709 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 19:25:46 +00:00
Jim Grosbach
7e294cfcf9 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121708 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 19:18:13 +00:00
Benjamin Kramer
cf8b3257c0 Fix sort predicate. qsort(3)'s predicate semantics differ from std::sort's. Fixes PR 8780. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121705 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 18:20:38 +00:00
Chris Lattner
de1c3605a6 Add a couple dag combines to transform mulhi/mullo into a wider multiply 
when the wider type is legal.  This allows us to compile:

define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
	%div = udiv i16 %x, 33
	ret i16 %div
}

into:

test1:                                  # @test1
	movzwl	4(%esp), %eax
	imull	$63551, %eax, %eax      # imm = 0xF83F
	shrl	$21, %eax
	ret

instead of:

test1:                                  # @test1
        movw    $-1985, %ax             # imm = 0xFFFFFFFFFFFFF83F
        mulw    4(%esp)
        andl    $65504, %edx            # imm = 0xFFE0
        movl    %edx, %eax
        shrl    $5, %eax
        ret

Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320

We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121696 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 08:39:01 +00:00
Chris Lattner
a9f6bbea62 reinstate my patch: the miscompile was caused by an inverted branch in the 
'and' case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121695 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 08:12:19 +00:00
Chris Lattner
92407e5895 Completely disable the optimization I added in r121680 until 
I can track down a miscompile.  This should bring the buildbots
back to life


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121693 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 07:41:29 +00:00
Chris Lattner
11ae9e29a9 remove the verbose-asm "constant pool double" comments that we were printing 
for each constant pool entry.  Using WriteTypeSymbolic here takes time
proportional to the size of the module, for each constant pool entry.

This speeds up -verbose-asm llc on 252.eon (a random testcase at my disposal)
from 4.4s to 2.137s.  llc takes 2.11s with asm-verbose off, so this is now a
pretty reasonable cost for verbose comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121691 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 07:35:47 +00:00
Chris Lattner
daa02ab70c Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions 
when simplifying, allowing them to be eagerly turned into switches.  This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320

On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:

_crud:                                  ## @crud
## BB#0:                                ## %entry
	cmpb	$33, %dil
	jb	LBB0_4
## BB#1:                                ## %switch.early.test
	addb	$-34, %dil
	cmpb	$58, %dil
	ja	LBB0_3
## BB#2:                                ## %switch.early.test
	movzbl	%dil, %eax
	movabsq	$288230376537592865, %rcx ## imm = 0x400000017001421
	btq	%rax, %rcx
	jb	LBB0_4
LBB0_3:                                 ## %lor.rhs
	xorl	%eax, %eax
	ret
LBB0_4:                                 ## %lor.end
	movl	$1, %eax
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121690 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 07:00:06 +00:00
Chris Lattner
021c9d3bd4 make this logic a bit simpler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121689 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 06:36:51 +00:00
Chris Lattner
3d5121314a split all the guts of SimplifyCFGOpt::run out into one function 
per terminator kind.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121688 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 06:25:44 +00:00
Chris Lattner
97bd89ece3 fix a bug in r121680 that upset the various buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121687 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 05:34:18 +00:00
Chris Lattner
979b8f1d8c refactor the speculative execution logic to be factored into the cond branch code instead of 
doing a cfg search for every block simplified.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121686 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 05:26:52 +00:00
Chris Lattner
eff7edf126 simplify a bunch of code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121685 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 05:20:28 +00:00
Chris Lattner
ef5002ba85 move HoistThenElseCodeToIf up to a more logical and efficient-to-handle place. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121684 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 05:15:29 +00:00
Chris Lattner
ddb97a2bf1 move 'MergeBlocksIntoPredecessor' call earlier. Use 
getSinglePredecessor to simplify code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121683 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 05:10:48 +00:00
Chris Lattner
97fdb898f5 factor new code out to a SimplifyBranchOnICmpChain helper function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121681 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 05:03:41 +00:00
Chris Lattner
7312a22ed6 enhance the "change or icmp's into switch" xform to handle one value in an 
'or sequence' that it doesn't understand.  This allows us to optimize
something insane like this:

int crud (unsigned char c, unsigned x)
 {
   if(((((((((( (int) c <= 32 ||
                    (int) c == 46) || (int) c == 44)
                  || (int) c == 58) || (int) c == 59) || (int) c == 60)
               || (int) c == 62) || (int) c == 34) || (int) c == 92)
            || (int) c == 39) != 0)
     foo();
 }

into:

define i32 @crud(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
entry:
  %cmp = icmp ult i8 %c, 33
  br i1 %cmp, label %if.then, label %switch.early.test

switch.early.test:                                ; preds = %entry
  switch i8 %c, label %if.end [
    i8 39, label %if.then
    i8 44, label %if.then
    i8 58, label %if.then
    i8 59, label %if.then
    i8 60, label %if.then
    i8 62, label %if.then
    i8 46, label %if.then
    i8 92, label %if.then
    i8 34, label %if.then
  ]

by pulling the < comparison out ahead of the newly formed switch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121680 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 04:50:38 +00:00
Chris Lattner
0aa749bde7 merge two very similar functions into one that has a bool argument. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121678 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 04:26:26 +00:00
Evan Cheng
de7f920835 Disable auto-detection of AVX support since AVX codegen support is not ready. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121677 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 04:23:53 +00:00
Chris Lattner
662269d2ab don't bother handling non-canonical icmp's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121676 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 04:18:32 +00:00
Chris Lattner
803a29d19f inline a function, making the result much simpler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121675 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 04:15:19 +00:00
Chris Lattner
abf706703f Fix my previous patch to handle a degenerate case that the llvm-gcc 
bootstrap buildbot tripped over.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121674 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 03:43:57 +00:00
Chris Lattner
28acc13548 convert some methods to be static functions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121673 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 03:30:12 +00:00
Chris Lattner
fca20f507c zap two more std::sorts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121672 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 03:24:30 +00:00
Chris Lattner
61c77449c7 fix a fairly serious oversight with switch formation from 
or'd conditions.  Previously we'd compile something like this:

int crud (unsigned char c) {
   return c == 62 || c == 34 || c == 92;
}

into:

  switch i8 %c, label %lor.rhs [
    i8 62, label %lor.end
    i8 34, label %lor.end
  ]

lor.rhs:                                          ; preds = %entry
  %cmp8 = icmp eq i8 %c, 92
  br label %lor.end

lor.end:                                          ; preds = %entry, %entry, %lor.rhs
  %0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
  %lor.ext = zext i1 %0 to i32
  ret i32 %lor.ext

which failed to merge the compare-with-92 into the switch.  With this patch
we simplify this all the way to:

  switch i8 %c, label %lor.rhs [
    i8 62, label %lor.end
    i8 34, label %lor.end
    i8 92, label %lor.end
  ]

lor.rhs:                                          ; preds = %entry
  br label %lor.end

lor.end:                                          ; preds = %entry, %entry, %entry, %lor.rhs
  %0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
  %lor.ext = zext i1 %0 to i32
  ret i32 %lor.ext

which is much better for codegen's switch lowering stuff.  This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121671 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 03:18:54 +00:00
Chris Lattner
e991b5fdd5 simplify code and reduce indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121670 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 02:38:13 +00:00
Chris Lattner
6d4d21e29d convert an std::sort to array_pod_sort. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 02:00:58 +00:00
Chris Lattner
cd4b709d73 move the "br (X == 0 | X == 1), T, F" -> switch optimization to a new 
location in simplifycfg.  In the old days, SimplifyCFG was never run on
the entry block, so we had to scan over all preds of the BB passed into
simplifycfg to do this xform, now we can just check blocks ending with
a condbranch.  This avoids a scan over all preds of every simplified 
block, which should be a significant compile-time perf win on functions
with lots of edges.  No functionality change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121668 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 01:57:34 +00:00
Chris Lattner
9a2b72acc9 reduce indentation and generally simplify code, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121667 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 01:47:07 +00:00
Chris Lattner
dcb54ce3da use getFirstNonPHIOrDbg to simplify this code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121664 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 01:28:06 +00:00
Chris Lattner
d5b4db9824 reduce indentation by using continue, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121662 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 01:11:17 +00:00
Chris Lattner
a97c91f014 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121656 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-13 00:15:25 +00:00
Wesley Peck
638f7a9a5e Missed some ADDI <-> ADDIK conversions in 121649. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-12 22:53:14 +00:00
Wesley Peck
8f40b24ca1 MBlaze delay slot filler was not capable of using ADDK and variants to fill delay slots. This broke several test cases when 121649 was committed. This fixes the regression. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-12 22:22:49 +00:00
Wesley Peck
a7c7b9dccb The ADD and ADDK (and all variants) instructions where flip-flopped in the MBlaze backend. This bug fix makes 64-bit math work on the MBlaze backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-12 22:02:31 +00:00
Tobias Grosser
d713acb631 Remove useless dynamic_cast<>(). 
Thanks Peter for pointing me to something that should have never been
committed to the llvm code base.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-12 21:58:28 +00:00
Wesley Peck
eb13382333 1. Change MBlaze indirect branches to use absolute branch BRALD instead of pc relative branch BRLD. 
2. Make sure that the MBlaze stack is aligned to 4-byte boundaries.
3. Determine frame indexes that should be placed in the callers stack frame, as per the MBlaze ABI, and place them in the correct locations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121639 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-12 20:52:31 +00:00
Duncan Sands
a30b7d2c70 Catch attempts to remove a deleted node from the CSE maps. Better to 
catch this here rather than later after accessing uninitialized memory
etc.  Fires when compiling the testcase in PR8237.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121635 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-12 13:22:50 +00:00
Benjamin Kramer
2f7228b80c Generalize the and-icmp-select instcombine further by allowing selects of the form 
(x & 2^n) ? 2^m+C : C

we can offset both arms by C to get the "(x & 2^n) ? 2^m : 0" form, optimize the
select to a shift and apply the offset afterwards.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121609 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-11 10:49:22 +00:00
Benjamin Kramer
20e3b4b380 Factor the (x & 2^n) ? 2^m : 0 instcombine into its own method and generalize it 
to catch cases where n != m with a shift.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121608 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-11 09:42:59 +00:00
Evan Cheng
a9688c4b57 (or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == #shamt. rdar://8752056 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121606 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-11 04:11:38 +00:00
Jakob Stoklund Olesen
533f58ecdd Add named timer groups for the different stages of register allocation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121604 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-11 00:19:56 +00:00
Jakob Stoklund Olesen
4680dec5fb Move MRI into RegAllocBase. Clean up debug output a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121599 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 23:49:00 +00:00
Jim Grosbach
092e2cd569 Add FIXME 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121598 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 23:41:10 +00:00
Nick Lewycky
a0bb037283 Remove extraneous close parenthesis. 
Fix build breakage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 23:14:35 +00:00
Nick Lewycky
5a4308bca8 Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing 
lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 23:05:10 +00:00
Owen Anderson
63ee22065d Attempt to get Thumb2 branch fixups working properly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121593 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 23:02:28 +00:00
Jakob Stoklund Olesen
f6dff84d4e Force the greedy register allocator to always use the inline spiller. 
Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121591 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:54:44 +00:00
Jakob Stoklund Olesen
3bda29eb4f Rip out live range splitting support from the inline spiller. 
The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121590 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:54:40 +00:00
Owen Anderson
5fd873d8e8 Fix merge error in my last fix to Thumb2 vldr fixups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121588 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:53:48 +00:00
Owen Anderson
e2e0f58809 Fixups for Thumb2 vldr's need to have the effective PC aligned as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121587 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:46:47 +00:00
Bill Wendling
1591b293d6 The MCFixupKindInfo table needs to be in the order that the enums were 
declared. Add a note specifying this and spruce up the list a bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121586 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:37:19 +00:00
Owen Anderson
ac00e96273 Provide the necessary post-encoder hook for Thumb2 encodings of VMOV and friends. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121585 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:32:08 +00:00
Jakob Stoklund Olesen
dd479e9769 Use AllocationOrder in RegAllocGreedy, fix a bug in the hint calculation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121584 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:21:05 +00:00
Bob Wilson
746fa17d59 Add float patterns for Neon vld1-lane/dup and vst1-lane operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121583 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:13:32 +00:00
Bob Wilson
20d5515aa5 Remove unused arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121582 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:13:24 +00:00
Owen Anderson
0f4b60d43a Fix encoding of Thumb1 LDRB and STRB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121581 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 22:11:13 +00:00
Jim Grosbach
7bf4c02789 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121580 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 21:57:34 +00:00
Owen Anderson
808c7d1482 Fix Thumb2 encodings of STREX and LDREX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121579 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 21:52:38 +00:00
Dan Gohman
839c092548 Revert r121520, which may have introduced miscompilations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121573 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 21:48:28 +00:00
Jim Grosbach
0be099da79 Correct encoding of rotation immediate for Thumb2 instructions. rdar://8755999 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121525 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 21:24:18 +00:00
Jim Grosbach
90cc533fda Fix encoding of 'U' bit for Thumb2 STRD/LDRD instructions. rdar://8755726 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121524 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 21:05:07 +00:00
Jim Grosbach
683fc3e9af More trivial cleanup. No need to define the EncoderMethod property type. Can 
just assign to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121523 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 20:53:44 +00:00
Jim Grosbach
04da9bf9f1 Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121522 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 20:51:35 +00:00
Jim Grosbach
a79bd0e1e0 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121521 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 20:47:29 +00:00
Dan Gohman
3bd5e52676 Implement PartialAlias checking in BasicAA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121520 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 20:47:03 +00:00
Jakob Stoklund Olesen
6ce219ec64 Fix miscompilation caused by trivial logic error in the reassignVReg() 
interference check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 20:45:04 +00:00
Dan Gohman
d891acd184 Minimally update this code to handle PartialAlias. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121518 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 20:14:49 +00:00
Dan Gohman
4a2a3eab2d Use PartialAlias to do better noalias lint checking. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121514 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 20:04:06 +00:00
Dan Gohman
91d747569a Teach AliasAnalysisCounter about PartialAlias. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 19:53:05 +00:00
Dan Gohman
3d9f1ca5af Teach AliasAnalysisEvaluator about PartialAlias. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121512 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 19:52:40 +00:00
Dan Gohman
2c2f4c8247 Update this code to handle PartialAlias as MayAlias. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121508 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 19:40:47 +00:00
Bob Wilson
a92bac64cb Fix some invalid alignments for Neon vld-dup and vld/st-lane instructions. 
Alignments smaller than the total size of the memory being loaded or stored,
unless the alignment is 8 bytes, are not allowed.  Add tests for this, too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121506 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 19:37:42 +00:00
Jim Grosbach
568f528c99 Teach isCSRestore() that ARM/Thumb2 functions will use post-modify LDR 
instructions to restore a single register rather than an LDM instruction.
rdar://8754999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121498 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 18:41:15 +00:00
Jakob Stoklund Olesen
c9672cb8be Add an AllocationOrder class that can iterate over the allocatable physical 
registers for a given virtual register.

Reserved registers are filtered from the allocation order, and any valid hint is
returned as the first suggestion.

For target dependent hints, a number of arcane target hooks are invoked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121497 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 18:36:02 +00:00
Jim Grosbach
e246717c3a Thumb unconditional branch binary encoding. rdar://8754994 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121496 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 18:21:33 +00:00
Jim Grosbach
0108645139 Thumb conditional branch binary encodings. rdar://8745367 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121493 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 17:13:40 +00:00
Rafael Espindola
89b9372605 Fixed version of 121434 with no new memory leaks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121471 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 07:39:47 +00:00
Daniel Dunbar
a87d7ec234 Mach-O: Tweak field name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121465 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 06:19:39 +00:00