Commit Graph

216 Commits

Author SHA1 Message Date
Zoran Jovanovic
b71fd20f2d Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 09:44:49 +00:00
Matheus Almeida
947fa5b7b7 [mips] Making sure that a '.set noreorder' directive is correctly parsed
and emitted and that no NOPs are emitted in a 'noreorder section'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204250 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 16:20:19 +00:00
Sasa Stankovic
ff73a2bf86 [mips] Implement NaCl sandboxing of function calls:
* Add masking instructions before indirect calls (in MC layer).
  * Align call + branch delay to the bundle end (in MC layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D3032


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203606 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 21:23:40 +00:00
Sasa Stankovic
754aaee387 [mips] Implement NaCl sandboxing of loads, stores and SP changes:
* Add masking instructions before loads and stores (in MC layer).
  * Add masking instructions after SP changes (in MC layer).
  * Forbid loads, stores and SP changes in delay slots (in MI layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D2904


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203484 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 20:34:23 +00:00
Matheus Almeida
ffb6f6ed2a [mips] Assembly parser must invoke the target streamer to handle .set reorder macro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 13:21:10 +00:00
Sasa Stankovic
fa14948a11 Moved test file from test/MC/Mips to test/CodeGen/Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203298 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 22:08:46 +00:00
Vladimir Medic
6844c3f234 This patch implements .set dsp directive and sets appropriate feature bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202966 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-05 11:05:09 +00:00
Vladimir Medic
7650bc0fd2 This patch implements .set mips32r2 directive and sets appropriate feature bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202807 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 09:54:09 +00:00
Ed Maste
c1e634da0c [mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug data
This fixes invalid lengths in .debug_aranges on big-endian mips64
(lengths appear to be left-shifted by 32 bits) and in .debug_loc.

Differential Revision: http://llvm-reviews.chandlerc.com/D2517


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202716 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-03 14:27:49 +00:00
Vladimir Medic
afa6150f04 This patch implements jalx instruction for Mips architecture.This instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202706 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-03 13:12:59 +00:00
Sasa Stankovic
9b1add5551 Add missing FileCheck in test command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202594 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 16:14:29 +00:00
Zoran Jovanovic
5d945dbe5e Fixed encoding of SYSCALL microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202523 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:17:08 +00:00
Zoran Jovanovic
8f883ae9d3 Revert revision 202518 because of wrong commit message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202521 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:14:16 +00:00
Zoran Jovanovic
60f8980545 Fix operand of SC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202518 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 18:02:17 +00:00
Sasa Stankovic
068a8c145a [mips] Implement NaCl sandboxing of indirect jumps:
* Align targets of indirect jumps to instruction bundle boundaries (in MI layer).
  * Add masking instructions before indirect jumps (in MC layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D2847


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202479 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-28 10:00:38 +00:00
Daniel Sanders
5c86661f15 [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.
Summary:
This removes the need to coerce UnknownABI to the default ABI (O32 for
MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser.

Clang has been updated to disable both possible default ABI's before enabling
the ABI it intends to use.

[*] N64 being the default for MIPS64 is not actually correct.
    However N32 is not fully implemented/tested yet.

Depends on: D2830

Reviewers: jacksprat, matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2832
Differential Revision: http://llvm-reviews.chandlerc.com/D2846



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201792 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-20 14:58:19 +00:00
Daniel Sanders
210edf5559 [mips] Add explicit N32 and N64 tests to nabi-regs.s test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201684 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-19 15:30:54 +00:00
Matheus Almeida
3f14ca5e30 [mips][msa] Add DLSA instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201081 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-10 12:05:17 +00:00
Sasa Stankovic
fba9c104b9 Changed comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200969 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-07 11:16:02 +00:00
Petar Jovanovic
7f15e90281 [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions
Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS
by creating target expression class MipsMCExpr.

Patch by Sasa Stankovic.

Differential Revision: http://llvm-reviews.chandlerc.com/D2592


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200783 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-04 18:41:57 +00:00
Rafael Espindola
ac9f143a69 Remove another hasRawTextSupport.
To remove this one simply move the end of file logic from the asm printer to
the target mc streamer.

This removes the last call to hasRawTextSupport from lib/Target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200590 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 23:10:26 +00:00
Matheus Almeida
9c45241485 [mips][msa] Add insert.d instruction.
This instruction is only available on Mips64 cores that implement the MSA ASE.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200543 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 13:31:20 +00:00
Matheus Almeida
72d4223ff5 [mips][msa] Add fill.d instruction.
This instruction is only available on Mips64 cores
that implement the MSA ASE.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200400 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-29 15:12:02 +00:00
Matheus Almeida
ba67c2a4ee [mips][msa] Add copy_{u,s}.d.
These instructions are only available on Mips64 cores
that implement the MSA ASE.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-29 14:05:28 +00:00
Matheus Almeida
4ed4bd0fee [mips] Fix ELF header flags.
As opposed to GCC/GAS the default ABI for Mips64 is n64.
Compatibility bit should be set if o32 ABI is used when targeting Mips64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200332 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-28 19:24:11 +00:00
Rafael Espindola
5356e75b5b Implement the missing bits corresponding to .mips_hack_elf_flags.
These were:
* noreorder handling on the target object streamer and asm parser.
* setting the initial flag bits based on the enabled features.
* setting the elf header flag for micromips

It is *really* depressing I am the one doing this instead of someone at
mips actually taking the time to understand the infrastructure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200138 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-26 06:57:13 +00:00
Rafael Espindola
d41a30ed8c Move tests that just use llc from test/MC/Mips to test/MC/Codegen.
This is an expanded version of r200064.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200115 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-26 04:08:47 +00:00
Rafael Espindola
86b535b085 This reverts commit r200064 and r200051.
r200064 depends on r200051.

r200051 is broken: I tries to replace .mips_hack_elf_flags, which is a good
thing, but what it replaces it with is even worse.

The new emitMipsELFFlags it adds corresponds to no assembly directive, is not
marked as a hack and is not even printed to the .s file.

The patch also introduces more uses of hasRawTextSupport.

The correct way to remove .mips_hack_elf_flags is to have the mips target
streamer handle the default flags (and command line options). That way the
same code path is used for asm and obj. The streamer interface should *really*
correspond to what is printed in the .s file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200078 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 15:06:56 +00:00
Jack Carter
8fe060da52 [Mips] Move 2 test cases from MC to CodeGen.
No code changes. Just reassignment of test case files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200064 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 02:14:14 +00:00
Jack Carter
998052555a [Mips] TargetStreamer ELF flag Support for default and commandline options.
This patch uses a common MipsTargetSteamer interface for both 
MipsAsmPrinter and MipsAsmParser for recording default and commandline
driven directives that affect ELF header flags.

It has been noted that the .ll tests affected by this patch belong in
test/Codegen/Mips. I will move them in a separate patch.

Also, a number of directives do not get expressed by AsmPrinter in the 
resultant .s assembly such as setting the correct ASI. I have noted this
in the tests and they will be addressed in later patches.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200051 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 00:24:07 +00:00
Jack Carter
2ccf523ce7 [Mips] TargetStreamer Support for .set mips16.
This patch updates .set mips16 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that the assembler uses for
both ELF and ASCII output for these directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199851 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 23:08:42 +00:00
Zoran Jovanovic
f5c2d3896b Added support for LWU microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199315 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 13:01:18 +00:00
Rafael Espindola
f6cb056e41 Only mark functions as micromips.
The GNU as behavior is a bit different and very strange. It will mark any
label that contains an instruction. We can implement that, but using the
type looks more natural since gas will not mark a function if a .word is
used to output the instructions!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-15 03:07:12 +00:00
Zoran Jovanovic
bb34ce84fd Test case micromips-load-effective-address.s renamed to micromips-load-effective-address.ll and moved to test/CodeGen/Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199221 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 16:26:47 +00:00
Rafael Espindola
3c733ea064 Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips".
This matches what gnu as does and implementing this is easier than arguing
about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199181 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-14 04:25:13 +00:00
Jack Carter
063564c4c5 [Mips] TargetStreamer Support for .abicalls and .set pic0.
This patch adds .abicalls and .set pic0 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that both the integrated and standalone
assemblers will use for the output for these directives.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198646 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 23:27:31 +00:00
Zoran Jovanovic
7dc193619e Support for microMIPS load effective address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 10:14:07 +00:00
Zoran Jovanovic
ae3597c141 Support for microMIPS FPU instructions 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198009 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-25 10:09:27 +00:00
Zoran Jovanovic
1ef2ca6994 Support for microMIPS FPU instructions 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197815 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-20 15:44:08 +00:00
Zoran Jovanovic
bd2926b056 Support for microMIPS control instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 16:25:00 +00:00
Zoran Jovanovic
4267b16e78 Support for microMIPS LL and SC instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 16:12:56 +00:00
Zoran Jovanovic
44dc232eae Support for microMIPS TLS relocations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197685 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-19 16:02:32 +00:00
Matheus Almeida
0f040daba7 [mips][msa] Update format of RUN lines for every MSA MC test.
1. The arch directive now appears before the cpu directive
2. Long run lines were split across multiple lines
    
No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197588 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-18 17:31:21 +00:00
Matheus Almeida
d0ee4c5302 [mips][msa] Remove unneeded triple directive in MSA MC tests.
No functional changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197559 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-18 11:06:13 +00:00
Matheus Almeida
24c63679d7 [mips] Fix off by one issue when applying a fixup.
The branch offset for a R_MIPS_PC16 relocation is indeed a 16-bit signed
immediate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197506 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-17 17:10:00 +00:00
Matheus Almeida
b90ed644fc [mips] Add checks for alignment and maximum displacements for most of the
branch instructions for mips and micromips instruction sets thus avoiding
the situation of generating branches to undesired locations if offsets
cannot be encoded.

This patch also checks if a fixup cannot be applied and returns a fatal error
if that's the case.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-13 11:11:02 +00:00
Vladimir Medic
84744f6916 Method parseSetAssignment treats every operand with '$' sign as register and the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps)
As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example:
   .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196773 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 11:03:25 +00:00
Matheus Almeida
4faa2b38fb [mips][msa] Fix issue with immediate fields of LD/ST instructions
not being correctly encoded/decoded.
In more detail, immediate fields of LD/ST instructions should be
divided/multiplied by the size of the data format before encoding and
after decoding, respectively.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196494 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 11:06:22 +00:00
Zoran Jovanovic
082ac1ffdb Test case for issue with microMIPS long branch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-30 19:13:15 +00:00
Zoran Jovanovic
eb47ca4561 Revert revision 195965.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-29 22:10:02 +00:00