Commit Graph

73 Commits

Author SHA1 Message Date
Jim Grosbach
bb16824dc3 A few 80 column cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116069 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-08 18:13:57 +00:00
Chris Lattner
32c685cb67 attempt to appease msvc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113198 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 06:10:48 +00:00
Gabor Greif
e53ee3b112 fix comment typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113197 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 06:06:06 +00:00
Chris Lattner
9bb9fa19a5 generalize my previous operand loc info hack. If the same operand
is busted for all variants, report it as the location.  This allows
us to get the operand right for bugs like:

t.s:3:12: error: invalid operand for instruction
	outb %al, %gs
	          ^

Even though there are reg/imm and reg/reg forms of this instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113183 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:37:39 +00:00
Chris Lattner
ce4a3355d9 in the case where an instruction only has one implementation
of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 22:11:18 +00:00
Chris Lattner
a008e8ac73 Now that we know if we had a total fail on the instruction mnemonic,
give a more detailed error.  Before:

t.s:11:4: error: unrecognized instruction
   addl $1, $1
   ^
t.s:12:4: error: unrecognized instruction
   f2efqefa $1
   ^

After:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^
t.s:12:4: error: invalid instruction mnemonic 'f2efqefa'
   f2efqefa $1
   ^

This fixes rdar://8017912 - llvm-mc says "unrecognized instruction" when it means "invalid operands"


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113176 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:54:15 +00:00
Chris Lattner
fa0d74d58e simplify DEBUG_WITH_TYPE usage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:28:52 +00:00
Chris Lattner
44b0daad44 this if can now be an assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113173 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:25:43 +00:00
Chris Lattner
80db4e51d2 ;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113172 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:23:43 +00:00
Chris Lattner
2b1f943444 now that the opcode is trivially exposed, start matching instructions
by doing a binary search over the mnemonic instead of doing a linear
search through all possible instructions.  This implements rdar://7785064


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113171 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:22:45 +00:00
Chris Lattner
96352e5ceb emit the match table at global scope instead of within the
MatchInstructionImpl. This makes it easier to read/understand
MatchInstructionImpl.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113170 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:08:38 +00:00
Chris Lattner
e206fcf0e9 special case the mnemonic operand of the instruction in the
generated matcher, emiting it as a column in the MatchEntry
table instead of forcing it to go through classification and
everything else.  Making it be classified caused tblgen to
produce a ton of one-off classes for each mneumonic.  This
should reduce the size of the generated matcher significantly
while paving the way for future improvements.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 21:01:37 +00:00
Chris Lattner
87410368e1 The "ambiguous instructions" check only produces anything with -debug,
so only do the N^2 loop with debug mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:21:47 +00:00
Chris Lattner
ec6789f4f9 have tblgen detect when an instruction would have matched, but
failed because a subtarget feature was not enabled.  Use this to
remove a bunch of hacks from the X86AsmParser for rejecting things
like popfl in 64-bit mode.  Previously these hacks weren't needed,
but were important to get a message better than "invalid instruction"
when used in the wrong mode.

This also fixes bugs where pushal would not be rejected correctly in
32-bit mode (just pusha).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 20:08:02 +00:00
Chris Lattner
79ed3f77e8 change MatchInstructionImpl to return an enum instead of bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113165 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:22:17 +00:00
Chris Lattner
0692ee676f have AsmMatcherEmitter.cpp produce the hunk of code that gets included
into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 19:11:01 +00:00
Chris Lattner
5845e5c62b factor the snazzy string matcher code that Daniel hates
out of AsmMatcherEmitter.cpp into its own class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113137 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 02:01:51 +00:00
Daniel Dunbar
4f98f83459 tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',
target specific parsers can adapt the TargetAsmParser to this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110888 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:32 +00:00
Daniel Dunbar
4d39b6728d tblgen/AsmMatcher: Treat '.' in assembly strings as a token separator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 06:36:59 +00:00
Daniel Dunbar
a9ba5fe2bd tblgen/AsmMatcher: Downgrade instructions with tied operands to a debug-only warning, for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110779 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 04:46:08 +00:00
Daniel Dunbar
54074b5f04 TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> attributes as part of the matcher.
- Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 05:44:09 +00:00
Duncan Sands
3472766f9e Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 08:16:59 +00:00
Daniel Dunbar
368a456503 AsmMatcher: Ensure classes are totally ordered, so we can std::sort them reliably.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-27 05:31:32 +00:00
Daniel Dunbar
54ddf3d9c7 tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104452 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-22 21:02:29 +00:00
Daniel Dunbar
4f83e73a6d MC/Matcher: Add support for over-riding the default MatchInstruction function
name (for example, to allow targets to interpose the actual MatchInstruction
function).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-04 00:33:13 +00:00
Chris Lattner
f65027842e change Target.getInstructionsByEnumValue to return a reference
to a vector that CGT stores instead of synthesizing it on every 
call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98910 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:34:35 +00:00
Chris Lattner
b61e09de6d don't go through getInstructions().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:18:23 +00:00
Daniel Dunbar
8cc9c0c487 MC/AsmMatcher: Add support for target specific "instruction cleanup" functions,
to allow custom post-processing of matched instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:05:56 +00:00
Daniel Dunbar
3b6910dcd4 MC: Fix bug where trailing tied operands were forgotten; the X86 assembler
matcher is now free of implicit operands!
 - Still need to clean up the code now that we don't to worry about implicit
   operands, and to make it a hard error if an instruction fails to specify all
   of its operands for some reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95956 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:46:54 +00:00
Daniel Dunbar
bef529182f MC/AsmMatcher: Tweak conversion function name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95802 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 21:00:47 +00:00
Daniel Dunbar
af61681ced MC/AsmMatcher: Add support for creating tied operands when constructing MCInsts.
- Pretty messy, but we need to rework how we handle tied operands in MCInst
   anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-10 08:15:48 +00:00
Chris Lattner
b8d6e98e56 pass stringref by value instead of by const&
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95627 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-09 00:34:28 +00:00
Daniel Dunbar
e1f6de3fbd AsmMatcherEmitter: Use stable_sort when reordering instructions, so that order
is still deterministic even amongst ambiguous instructions (eventually ambiguous
match orders will be a hard error, but we aren't there yet).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95157 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-02 23:46:36 +00:00
Daniel Dunbar
a2f5e00347 AsmMatcher: Create operand classes before use, apparently records aren't visited
in the order they were declared.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-30 01:02:37 +00:00
Sean Callanan
e9b466d4f0 Modified the register matcher function in AsmMatcher to
be static.  Also made it possible for clients to get it
and no other functions from ...GenAsmMatcher.inc by
defining REGISTERS_ONLY before including GenAsmMatcher.inc.
This sets the stage for target-specific lexers that can
identify registers and return AsmToken::Register as
appropriate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94266 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 00:40:33 +00:00
Daniel Dunbar
1402f0b2ca AsmMatcher: Add a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94261 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-23 00:26:16 +00:00
Chris Lattner
9898671a74 Split the TargetAsmParser "ParseInstruction" interface in half:
the new ParseInstruction method just parses and returns a list of
target operands.  A new MatchInstruction interface is used to
turn the operand list into an MCInst.

This requires new/deleting all the operands, but it also gives 
targets the ability to use polymorphic operands if they want to. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93469 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-14 22:21:20 +00:00
Daniel Dunbar
1095f2ae26 llvm-mc/AsmParser: Match hard coded registers (e.g. 'shldl %cl, %eax, %eax')
We now match all of 403.gcc (as emitted by clang). :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78750 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 23:23:44 +00:00
Daniel Dunbar
7417b761c2 Add 'isCodeGenOnly' bit to Instruction .td records.
- Used to mark fake instructions which don't correspond to an actual machine
   instruction (or are duplicates of a real instruction). This is to be used for
   "special cases" in the .td files, which should be ignored by things like the
   assembler and disassembler. We still need a good solution to handle pervasive
   duplication, like with the Int_ instructions.

 - Set the bit on fake "mov 0" style instructions, which allows turning an
   assembler matcher warning into a hard error.

 - -2 FIXMEs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 22:17:52 +00:00
Daniel Dunbar
59fc42debd llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be
used to strip hard coded comments out of .td assembly strings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78716 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:59:47 +00:00
Daniel Dunbar
8409bfbbc3 llvm-mc/AsmMatcher: Fix two thinkos in determining whether two classes are
related.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78706 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 20:10:07 +00:00
Daniel Dunbar
ea6408f8cd llvm-mc/AsmParser: Implement automatic classification of RegisterClass operands.
- This drops us to 123 ambiguous instructions (previously ~500) on X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78636 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-11 02:59:53 +00:00
Daniel Dunbar
5c468e3d70 llvm-mc/AsmParser: Allow .td users to redefine the names of the methods to call
on target specific operands for testing class membership and converting to
MCInst operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78597 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 21:00:45 +00:00
Daniel Dunbar
ac6b4f2c0c llvm-mc/AsmMatcher: Remove some code which has been obsoleted by move to
explicit parser match classes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78588 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 19:08:50 +00:00
Daniel Dunbar
338825c192 llvm-mc/AsmMatcher: Change assembler parser match classes to their own record
structure.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78581 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 18:41:10 +00:00
Daniel Dunbar
fdb1f493ab llvm-mc/AsmParser: Check for matches with super classes when matching
instruction operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78565 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-10 16:05:47 +00:00
Daniel Dunbar
db2ddb5dc5 llvm-mc/AsmParser: Fix thinko in ClassInfo::operator<.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78533 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 08:23:23 +00:00
Daniel Dunbar
72fa87f0cf llvm-mc/AsmParser: Add hack to ignore Int_* and *_Int instructions for now, to
make it easier to see interesting ambiguities.
 - Also, check that user doesn't try to redefine the super class. This is a wart
   in the current design, in that assembler match classes aren't explicitly
   declared somewhere (so there isn't a unique place to declare the super
   class). This should probably be fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78532 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 08:19:00 +00:00
Daniel Dunbar
5fe6338ac8 llvm-mc/AsmParser: Implement user defined super classes.
- We can now discriminate SUB32ri8 from SUB32ri, for example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78530 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 07:20:21 +00:00
Daniel Dunbar
2b54481a77 llvm-mc/AsmParser: Separate instruction ordering for ambiguity detection.
- We want the ordering operation to be simple, since we run it on every
   match. The old ordering is also not a strict weak ordering when there are
   ambiguities, which makes MSVC unhappy.

 - While we are at it, detect all ambiguities instead of just the adjacent
   ones. There are actually 655, for X86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78526 91177308-0d34-0410-b5e6-96231b3b80d8
2009-08-09 06:05:33 +00:00