Commit Graph

111284 Commits

Author SHA1 Message Date
David Majnemer
bd64447bf3 PowerPC: CTR shouldn't fire if a TLS call is in the loop
Determining the address of a TLS variable results in a function call in
certain TLS models.  This means that a simple ICmpInst might actually
result in invalidating the CTR register.

In such cases, do not attempt to rely on the CTR register for loop
optimization purposes.

This fixes PR22034.

Differential Revision: http://reviews.llvm.org/D6786

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-27 19:45:38 +00:00
Aaron Ballman
22376afd76 Fixing another -Wunused-variable warning, this time in release builds without asserts. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224889 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-27 19:17:53 +00:00
Aaron Ballman
88e25192c2 Removing a variable that is set but never used, to silence a -Wunused-but-set-variable warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224888 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-27 19:01:19 +00:00
Craig Topper
d840bf4ba9 [x86] Prevent instruction selection of AVX512 cmp.ps/pd/ss/sd intrinsics with illegal immediates. Forgot to do this when I did SSE/SSE2/AVX/AVX2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224887 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-27 18:51:06 +00:00
Craig Topper
3e9bf4c0d0 [x86] Assert on invalid immediates in the instruction printer for cmp.ps/pd/ss/sd instead of truncating the immediate. The assembly parser and instruction selection shouldn't generate invalid immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224886 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-27 18:11:00 +00:00
Craig Topper
6ba84e58da [x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selected with bad immediates. The frontend now checks this when the builtin is used. This will allow the instruction printer to not have to deal with invalid immediates on these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-27 18:10:56 +00:00
Keno Fischer
cc80af1b4f [FastIsel][X86] Fix invalid register replacement for bool args
Summary:
Consider the following IR:

  %3 = load i8* undef
  %4 = trunc i8 %3 to i1
  %5 = call %jl_value_t.0* @foo(..., i1 %4, ...)
  ret %jl_value_t.0* %5

Bools (that are the result of direct truncs) are lowered as whatever
the argument to the trunc was and a "and 1", causing the part of the
MBB responsible for this argument to look something like this:

  %vreg8<def,tied1> = AND8ri %vreg7<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg8,%vreg7

Later, when the load is lowered, it will insert

  %vreg15<def> = MOV8rm %vreg14, 1, %noreg, 0, %noreg; mem:LD1[undef] GR8:%vreg15 GR64:%vreg14

but remember to (at the end of isel) replace vreg7 by vreg15. Now for
the bug. In fast isel lowering, we mistakenly mark vreg8 as the result
of the load instead of the trunc. This adds a fixup to have
vreg8 replaced by whatever the result of the load is as well, so
we end up with

  %vreg15<def,tied1> = AND8ri %vreg15<kill,tied0>, 1, %EFLAGS<imp-def>; GR8:%vreg15

which is an SSA violation and causes problems later down the road.

This fixes PR21557.

Test Plan: Test test case from PR21557 is added to the test suite.

Reviewers: ributzka

Reviewed By: ributzka

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224884 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-27 13:10:15 +00:00
Rafael Espindola
aceb47b808 Convert test to llvm-readobj. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224872 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 22:47:39 +00:00
Colin LeMahieu
17946361cc [Hexagon] Adding auto-incrementing loads with and without byte reversal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224871 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 21:09:25 +00:00
Colin LeMahieu
de2cee5556 [Hexagon] Adding locked loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224870 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 20:42:27 +00:00
Colin LeMahieu
6ff5e4862d [Hexagon] Adding deallocframe and circular addressing loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224869 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 20:30:58 +00:00
Colin LeMahieu
ffba450190 [Hexagon] Adding remaining post-increment instruction variants. Removing unused classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224868 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 19:31:46 +00:00
Colin LeMahieu
a46bee194d [Hexagon] Adding post-increment unsigned byte loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 19:12:11 +00:00
Colin LeMahieu
3c52b7b9f2 [Hexagon] Adding post-increment signed byte loads with tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 18:57:13 +00:00
Rafael Espindola
21b9b20f36 Use llvm-readobj. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224864 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 18:22:05 +00:00
Craig Topper
a996db696b [X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references to them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224862 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 18:20:05 +00:00
Craig Topper
6eb3e3ce10 [X86] Don't fail disassembly if REX.R/REX.B is used on an MMX register. Similar fix to not fail to disassembler CR9-CR15 references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224861 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 18:19:44 +00:00
Timur Iskhodzhanov
f4076dc995 Band-aid fix for PR22032: don't emit DWARF debug info if AddressSanitizer is enabled on Windows
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224860 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 17:00:51 +00:00
Rafael Espindola
3bea6d7604 No need to run llvm-as. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 16:42:47 +00:00
David Majnemer
7627d9c229 InstCombine: Infer nuw for multiplies
A multiply cannot unsigned wrap if there are bitwidth, or more, leading
zero bits between the two operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224849 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 09:50:35 +00:00
David Majnemer
597e1ab1aa ValueTracking: Small cleanup in ComputeNumSignBits
Constant contains the isAllOnesValue and isNullValue predicates, not
ConstantInt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224848 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 09:20:17 +00:00
David Majnemer
998ae69abe InstCombe: Infer nsw for multiplies
We already utilize this logic for reducing overflow intrinsics, it makes
sense to reuse it for normal multiplies as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 09:10:14 +00:00
Craig Topper
654a66dbd3 Teach disassembler to handle illegal immediates on (v)cmpps/pd/ss/sd instructions. Instead of rejecting we'll just generate the _alt forms that don't try to alter the mnemonic. While I'm here, merge some common code in the Instruction printers for the condition code replacement and fix the mask on SSE to be 3-bits instead of 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224846 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 06:36:28 +00:00
Craig Topper
50d894e4d3 Use MCPhysReg for table of register encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224845 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-26 06:36:23 +00:00
Hal Finkel
d7b2788e51 [PowerPC] [FastISel] i1 constants must be zero extended
When materializing constant i1 values, they must be zero extended. We represent
i1 values as [0, 1], not [0, -1], in i32 registers. As it turns out, this code
path was dead for i1 values prior to r216006 (which is why this did not manifest in
miscompiles until recently).

Fixes -O0 self-hosting on PPC64/Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224842 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-25 23:08:25 +00:00
David Majnemer
b582949103 Silence GCC's -Wparentheses warning
No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224833 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-25 10:03:23 +00:00
Elena Demikhovsky
773f64844d Documentation for Masked Load and Store intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224832 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-25 09:29:13 +00:00
Elena Demikhovsky
b31322328a Masked Load/Store - Changed the order of parameters in intrinsics.
No functional changes.
The documentation is coming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224829 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-25 07:49:20 +00:00
David Majnemer
e277a13a71 CodeGen: Error on redefinitions instead of asserting
It's possible to have a prior definition of a symbol in module asm.
Raise an error instead of crashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224828 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 23:06:55 +00:00
David Majnemer
d36cad9914 CodeGen: Allow aliases to be overridden by variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 22:44:29 +00:00
Saleem Abdulrasool
0f1bf97d04 MC: address some comments in deprecation checks
Bob Wilson pointed out the unnecessary checks that had been committed to the
instruction check predicates.  The check was meant to ensure that the check was
not accidentally applied to non-ARM instructions.  This is better served as an
assertion rather than a condition check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224825 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 18:40:42 +00:00
David Majnemer
e54eacce75 MC: Label definitions are permitted after .set directives
.set directives may be overridden by other .set directives as well as
label definitions.

This fixes PR22019.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 10:27:50 +00:00
Saleem Abdulrasool
3681929e11 IAS: correct debug line info for asm macros
Correct the line information generation for preprocessed assembly.  Although we
tracked the source information for the macro instantiation, we failed to account
for the fact that we were instantiating a macro, which is populated into a new
buffer and that the line information would be relative to the definition rather
than the actual instantiation location.  This could cause the line number
associated with the statement to be very high due to wrapping of the difference
calculated for the preprocessor line information emitted into the stream.
Properly calculate the line for the macro instantiation, referencing the line
where the macro is actually used as GCC/gas do.

The test case uses x86, though the same problem exists on any other target using
the LLVM IAS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224810 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 06:32:43 +00:00
Craig Topper
3bc4397f1f [X86] Remove the single AdSize indicator and replace it with separate AdSize16/32/64 flags.
This removes a hardcoded list of instructions in the CodeEmitter. Eventually I intend to remove the predicates on the affected instructions since in any given mode two of them are valid if we supported addr32/addr16 prefixes in the assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224809 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 06:05:22 +00:00
David Majnemer
4714bfa1db MC: Don't emit .no_dead_strip on targets which don't support it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224808 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 04:11:42 +00:00
Matthias Braun
13a193db05 LiveInterval: Remove accidentally committed debug code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224807 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 02:35:07 +00:00
Matthias Braun
8882414a11 LiveInterval: Introduce createMainRangeFromSubranges().
This function constructs the main liverange by merging all subranges if
subregister liveness tracking is available. This should be slightly
faster to compute instead of performing the liveness calculation again
for the main range. More importantly it avoids cases where the main
liverange would cover positions where no subrange was live. These cases
happened for partial definitions where the actual defined part was dead
and only the undefined parts used later.

The register coalescing requires that every part covered by the main
live range has at least one subrange live.

I also expect this function to become usefull later for places where the
subranges are modified in a way that it is hard to correctly fix the
main liverange in the machine scheduler, we can simply reconstruct it
from subranges then.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224806 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 02:11:51 +00:00
Matthias Braun
02add3f1a6 RegisterCoalescer: With subrange liveness there may be no RedefVNI for unused lanes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224805 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 02:11:48 +00:00
Matthias Braun
a2fd5b5fd0 LiveRangeEdit: Check for completely empy subranges after removing ValNos.
Completely empty subranges are not allowed and must be removed when
subreg liveness is enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224804 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 02:11:46 +00:00
Matthias Braun
94daeceeac LiveIntervalAnalysis: Fix performance bug that I introduced in r224663.
Without a reference the code did not remember when moving the iterators
of the subranges/registerunit ranges forward and instead would scan from
the beginning again at the next position.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224803 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 02:11:43 +00:00
Peter Zotov
e6ac2bc5fa [OCaml] PR21901: Update tests.
This finishes the fix partially applied by r224782.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224802 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 01:58:45 +00:00
Peter Zotov
0357f8735e [OCaml] Expose Llvm_executionengine.get_{global_value,function}_address.
Patch by Ramkumar Ramachandra <artagnon@gmail.com>.

Also remove Llvm_executionengine.get_pointer_to_global, as it
is actually deprecated and didn't appear in a stable release.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224801 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 01:52:51 +00:00
Chandler Carruth
43e17cfe85 [SROA] Update the documentation and names for accessing the slices
within a partition of an alloca in SROA.

This reflects the fact that the organization of the slices isn't really
ideal for analysis, but is the naive way in which the slices are
available while we're processing them in the core partitioning
algorithm.

It is possible we could improve matters, and I've left a FIXME with
one of my ideas for how to do this, but it is a lot of work, the benefit
is somewhat minor, and it isn't clear that it would be strictly better.
=/ Not really satisfying, but I'm out of really good ideas.

This also improves one place where the debug logging failed to mark some
split partitions. Now we log in one place, slightly later, and with
accurate information about whether the slice is split by the partition
being rewritten.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224800 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 01:48:09 +00:00
Adrian Prantl
34f81e8bec Debug Info: In symmetry to DW_TAG_pointer_type, do not emit the byte size
of a DW_TAG_ptr_to_member_type.
This restores the behavior from before r224780-r224781.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224799 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 01:17:51 +00:00
Chandler Carruth
c807870534 [SROA] Refactor the integer and vector promotion testing logic to
operate in terms of the new Partition class, and generally have a more
clear set of arguments. No functionality changed.

The most notable improvements here are consistently using the
terminology of 'partition' for a collection of slices that will be
rewritten together and 'slice' for a region of an alloca that is used by
a particular instruction.

This also makes it more clear that the split things are actually slices
as well, just ones that will be split by the proposed partition.

This doesn't yet address the confusing aspects of the partition's
interface where slices that will be split by the partition and start
prior to the partition are accesssed via Partition::splitSlices() while
the core range of slices exposed by a Partition includes both unsplit
slices and slices which will be split by the end, but started within the
offset range of the partition. This is particularly hard to address
because the algorithm which computes partitions quite literally doesn't
know which slices these will end up being until too late. I'm looking at
whether I can fix that or not, but I'm not optimistic. I'll update the
comments and/or names to further explain this either way. I've also
added one FIXME in this patch relating to this confusion so that I don't
forget about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224798 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 01:05:14 +00:00
Colin LeMahieu
3545994ffe [Hexagon] Removing old classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224795 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 00:43:00 +00:00
Kevin Enderby
0e6cb8a8d9 Another attempt to fix the LLVM Windows build bot lld-x86_64-win7, one last place to fix I think.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224794 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-24 00:16:51 +00:00
Kevin Enderby
4bc0635654 Attempt to fix the LLVM Windows build bot lld-x86_64-win7.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224793 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-23 23:43:59 +00:00
Kevin Enderby
9a516cdc3e Add printing the LC_THREAD load commands with llvm-objdump’s -private-headers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224792 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-23 22:56:39 +00:00
Kostya Serebryany
b69d796590 [asan] change the coverage collection scheme so that we can easily emit coverage for the entire process as a single bit set, and if coverage_bitset=1 actually emit that bitset
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224789 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-23 22:32:17 +00:00