Commit Graph

108209 Commits

Author SHA1 Message Date
Chandler Carruth
bdecfeb723 [x86] Implement v16i16 support with AVX2 in the new vector shuffle
lowering.

This also implements the fancy blend lowering for v16i16 using AVX2 and
teaches the X86 backend to print shuffle masks for 256-bit PSHUFB
and PBLENDW instructions. It also makes the mask decoding correct for
PBLENDW instructions. The yaks, they are legion.

Tests are updated accordingly. There are some missing tests for the
VBLENDVB lowering, but I'll add those in a follow-up as this commit has
accumulated enough cruft already.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218430 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-25 00:24:19 +00:00
Kevin Enderby
e793862979 Flush out enough of llvm-objdump’s SymbolizerSymbolLookUp() for Mach-O files to
get the literal string “Hello world” printed as a comment on the instruction
that loads the pointer to it. For now this is just for x86_64. So for object
files with relocation entries it produces things like:

	leaq	L_.str(%rip), %rax      ## literal pool for: "Hello world\n"

and similar for fully linked images like executables:

	leaq	0x4f(%rip), %rax        ## literal pool for: "Hello world\n"

Also to allow testing against darwin’s otool(1), I hooked up the existing 
-no-show-raw-insn option to the Mach-O parser code, added the new Mach-O
only -full-leading-addr option to match otool(1)'s printing of addresses and
also added the new -print-imm-hex option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218423 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 23:08:22 +00:00
Kostya Serebryany
0e9d114865 [asan] don't instrument module CTORs that may be run before asan.module_ctor. This fixes asan running together -coverage
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218421 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 22:41:55 +00:00
Renato Golin
d4c244f2eb Removing empty ARM tests from failed revert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218419 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 21:58:04 +00:00
Renato Golin
ae3027caf5 Removing empty tests from failed revert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218417 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 21:45:26 +00:00
Renato Golin
bb994f55a4 Revert 218406 - Refactor the RelocVisitor::visit method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218416 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 21:30:43 +00:00
Renato Golin
450403a79e Revert 218407 - Add support for ARM and AArch64 BE object files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218415 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 21:30:14 +00:00
Renato Golin
6c34b467be Revert 218408 - Report endianness in output of {dwarf, obj}dump
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218414 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 21:29:45 +00:00
Renato Golin
7fff39a194 Revert 218411 - XFAIL reloc test on x86/hexagon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218413 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 21:28:53 +00:00
Renato Golin
ebf023f5bf XFAIL reloc test on x86/hexagon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218411 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 21:00:30 +00:00
Akira Hatanaka
d3d620b33d Revert r218380. This was breaking Apple internal build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218409 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 20:37:14 +00:00
Renato Golin
329e09f08c Report endianness in output of {dwarf, obj}dump
For biendian targets like ARM and AArch64, it is useful to have the
output of the llvm-dwarfdump and llvm-objdump report the endianness
used when the object files were generated.

Patch by Charlie Turner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218408 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 20:07:41 +00:00
Renato Golin
bc7101b134 Add support for ARM and AArch64 BE object files
This change fixes the ARM and AArch64 relocation visitors in
RelocVisitor.  They were unconditionally assuming the object data are
little-endian.  Tests have been added to ensure that the
llvm-dwarfdump utility does not crash when processing big-endian
object files.

Patch by Charlie Turner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218407 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 20:07:30 +00:00
Renato Golin
c0104e4001 Refactor the RelocVisitor::visit method
This change replaces the brittle if/else chain of string comparisons
with a switch statement on the detected target triple, removing the
need for testing arbitrary architecture names returned from
getFileFormatName, whose primary purpose seems to be for display
(user-interface) purposes. The visitor now takes a reference to the
object file, rather than its arbitrary file format name to figure out
whether the file is a 32 or 64-bit object file and what the detected
target triple is.

A set of tests have been added to help show that the refactoring processes
relocations for the same targets as the original code.

Patch by Charlie Turner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218406 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 20:07:22 +00:00
Scott Douglass
f14380a2e8 pass environment when invoking llvm-config from lit.cfg
Use the same environment when invoking llvm-config from lit.cfg as
will be used when running tests, so that ASAN_OPTIONS, INCLUDE, etc.
are present.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218403 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 18:37:48 +00:00
Chris Bieneman
4bb780af42 Adding #ifdef around TermColorMutex based on feedback from Craig Topper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 18:35:58 +00:00
Chandler Carruth
c88ae9687b [x86] Factor out the logic to generically decombose a vector shuffle
into unblended shuffles and a blend.

This is the consistent fallback for the lowering paths that have fast
blend operations available, and its getting quite repetitive.

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 18:20:09 +00:00
Kaelyn Takata
9917d2e7ad Revert "Add support for ARM and AArch64 BE object files"
This reverts commit r218389 as it depends on r218388.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218398 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 18:00:20 +00:00
Kaelyn Takata
48ac014ac1 Revert "Report endianness in output of {dwarf, obj}dump"
This reverts commit r218391 as it depends on r218388 and r218389

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218397 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 18:00:17 +00:00
Kaelyn Takata
a0d6422afe Revert "Refactor the RelocVisitor::visit method"
This reverts commit faac033f73.

The test depends on all targets to be enabled in llc in order to pass,
and needs to be rewritten/refactored to not have that dependency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218393 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 17:49:07 +00:00
Renato Golin
c3a1f3e136 Report endianness in output of {dwarf, obj}dump
For biendian targets like ARM and AArch64, it is useful to have the
output of the llvm-dwarfdump and llvm-objdump report the endianness
used when the object files were generated.

Patch by Charlie Turner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218391 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 17:01:33 +00:00
Renato Golin
1513681a0b Add support for ARM and AArch64 BE object files
This change fixes the ARM and AArch64 relocation visitors in
RelocVisitor.  They were unconditionally assuming the object data are
little-endian.  Tests have been added to ensure that the
llvm-dwarfdump utility does not crash when processing big-endian
object files.

Patch by Charlie Turner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218389 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 17:01:06 +00:00
Renato Golin
faac033f73 Refactor the RelocVisitor::visit method
This change replaces the brittle if/else chain of string comparisons
with a switch statement on the detected target triple, removing the
need for testing arbitrary architecture names returned from
getFileFormatName, whose primary purpose seems to be for display
(user-interface) purposes. The visitor now takes a reference to the
object file, rather than its arbitrary file format name to figure out
whether the file is a 32 or 64-bit object file and what the detected
target triple is.

A set of tests have been added to help show that the refactoring processes
relocations for the same targets as the original code.

Patch by Charlie Turner.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218388 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 17:00:42 +00:00
David Peixotto
cfc42962c8 Fix assertion in LICM doFinalization()
The doFinalization method checks that the LoopToAliasSetMap is
empty. LICM populates that map as it runs through the loop nest,
deleting the entries for child loops as it goes. However, if a child
loop is deleted by another pass (e.g. unrolling) then the loop will
never be deleted from the map because LICM walks the loop nest to
find entries it can delete.

The fix is to delete the loop from the map and free the alias set
when the loop is deleted from the loop nest.

Differential Revision: http://reviews.llvm.org/D5305


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218387 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 16:48:31 +00:00
Moritz Roth
8c4e64af8a [Thumb] Make load/store optimizer less conservative.
If it's safe to clobber the condition flags, we can do a few extra things:
it's then possible to reset the base register writeback using a SUBS, so
we can try to merge even if the base register isn't dead after the merged
instruction.

This is effectively a (heavily bug-fixed) rewrite of r208992.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 16:35:50 +00:00
Oliver Stannard
43c6b6be8f [Thumb] 32-bit encodings of 'cps' are not valid for v7M
v7M only allows the 16-bit encoding of the 'cps' (Change Processor
State) instruction, and does not have the 32-bit encoding which is
valid from v6T2 onwards.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 14:20:01 +00:00
Aaron Ballman
6a07014c57 Silencing an "enumeral and non-enumeral type in conditional expression" warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 13:54:56 +00:00
Benjamin Kramer
7a27231780 Replace a hand-written suffix compare with std::lexicographical_compare.
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218380 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 13:19:28 +00:00
Chandler Carruth
10cd8098a7 [x86] Teach the instruction lowering to add comments describing constant
pool data being loaded into a vector register.

The comments take the form of:

  # ymm0 = [a,b,c,d,...]
  # xmm1 = <x,y,z...>

The []s are used for generic sequential data and the <>s are used for
specifically ConstantVector loads. Undef elements are printed as the
letter 'u', integers in decimal, and floating point values as floating
point values. Suggestions on improving the formatting or other aspects
of the display are very welcome.

My primary use case for this is to be able to FileCheck test masks
passed to vector shuffle instructions in-register. It isn't fantastic
for that (no decoding special zeroing semantics or other tricks), but it
at least puts the mask onto an instruction line that could reasonably be
checked. I've updated many of the new vector shuffle lowering tests to
leverage this in their test cases so that we're actually checking the
shuffle masks remain as expected.

Before implementing this, I tried a *bunch* of different approaches.
I looked into teaching the MCInstLower code to scan up the basic block
and find a definition of a register used in a shuffle instruction and
then decode that, but this seems incredibly brittle and complex.
I talked to Hal a lot about the "right" way to do this: attach the raw
shuffle mask to the instruction itself in some form of unencoded
operands, and then use that to emit the comments. I still think that's
the optimal solution here, but it proved to be beyond what I'm up for
here. In particular, it seems likely best done by completing the
plumbing of metadata through these layers and attaching the shuffle mask
in metadata which could have fully automatic dropping when encoding an
actual instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218377 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 09:39:41 +00:00
Michael Liao
35fdc092e0 Allow BB duplication threshold to be adjusted through JumpThreading's ctor
- BB duplication may not be desired on targets where there is no or small
  branch penalty and code duplication needs restrict control.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218375 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 04:59:06 +00:00
NAKAMURA Takumi
bfb2b180bf Windows/Host.inc: Reformat the header to fit 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 04:45:14 +00:00
NAKAMURA Takumi
d968b05f4d Unix/Host.inc: Remove <cstdlib>. It has been unused for a long time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218373 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 04:45:02 +00:00
NAKAMURA Takumi
4921f68311 Unix/Host.inc: Wrap a comment line in 80-col.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 04:44:50 +00:00
NAKAMURA Takumi
c44f94d681 Unix/Host.inc: Remove leading whitespace. It had been here since r56942!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218370 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 04:44:37 +00:00
NAKAMURA Takumi
6b3719716a valgrind/x86_64-pc-linux-gnu.supp: Suppress also /bin/bash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218369 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 04:38:20 +00:00
NAKAMURA Takumi
80b7979eba valgrind/x86_64-pc-linux-gnu.supp: Tweak /bin/sed to let calloc recognized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218368 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 04:38:09 +00:00
Jiangning Liu
1fe409e347 Clear PreferredExtendType for in each function-specific state FunctionLoweringInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 03:22:56 +00:00
Chandler Carruth
f00b50b6ef [x86] More refactoring of the shuffle comment emission. The previous
attempt didn't work out so well. It looks like it will be much better
for introducing extra logic to find a shuffle mask if the finding logic
is totally separate. This also makes it easy to sink the opcode logic
completely out of the routine so we don't re-dispatch across it.

Still no functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218363 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 03:06:37 +00:00
Chandler Carruth
db5e1dafa4 [x86] Bypass the shuffle mask comment generation when not using verbose
asm. This can be somewhat expensive and there is no reason to do it
outside of tests or debugging sessions. I'm also likely to make it
significantly more expensive to support more styles of shuffles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218362 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 03:06:34 +00:00
Chandler Carruth
7e0f903c6c [x86] Hoist the logic for extracting the relevant bits of information
from the MachineInstr into the caller which is already doing a switch
over the instruction.

This will make it more clear how to compute different operands to feed
the comment selection for example.

Also, in a drive-by-fix, don't append an empty comment string (which is
a no-op ultimately).

No functionality changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218361 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 02:24:41 +00:00
Matt Arsenault
59da3f04ca R600/SI: Add new helper isSGPRClassID
Move these into header since they are trivial

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218360 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 02:17:12 +00:00
Matt Arsenault
2e67962e9b R600/SI: Fix hardcoded and wrong operand numbers.
Also fix leftover debug printing

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218359 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 02:17:09 +00:00
Matt Arsenault
9b50273e54 R600/SI: Enable named operand table for SALU instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218358 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 02:17:06 +00:00
Chandler Carruth
5f671bae7c [x86] Start refactoring the comment printing logic in the MC lowering of
vector shuffles.

This is just the beginning by hoisting it into its own function and
making use of early exit to dramatically simplify the flow of the
function. I'm going to be incrementally refactoring this until it is
a bit less magical how this applies to other instructions, and I can
teach it how to dig a shuffle mask out of a register. Then I plan to
hook it up to VPERMD so we get our mask comments for it.

No functionality changed yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218357 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 02:16:12 +00:00
Matt Arsenault
0bb38df86c R600/SI: Fix weird CHECK-DAG usage
This prevents these from failing in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218356 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 02:14:26 +00:00
Tom Stellard
81c6c9690a R600/SI: Enable selecting SALU inside branches
We can do this now that the FixSGPRLiveRanges pass is working.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218353 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:33:28 +00:00
Tom Stellard
abe9b2274d R600/SI: Move PHIs that define SGPRs to the VALU in most cases
This fixes a bug that is uncovered by a future commit and will
be tested by the test/CodeGen/R600/sgpr-control-flow.ll test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218352 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:33:26 +00:00
Tom Stellard
36ba7962a4 R600/SI: Fix the FixSGPRLiveRanges pass
The previous implementation was extending the live range of SGPRs
by modifying the live intervals directly.  This was causing a lot
of machine verification errors when the machine scheduler was enabled.

The new implementation adds pseudo instructions with implicit uses to
extend the live ranges of SGPRs, which works much better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218351 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:33:24 +00:00
Tom Stellard
90d1726693 R600/SI: Mark EXEC_LO and EXEC_HI as reserved
These registers can be allocated and used like other 32-bit registers,
but it seems like a likely source for bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218350 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:33:23 +00:00
Tom Stellard
b8112412cf R600/SI: Fix SIRegisterInfo::getPhysRegSubReg()
Correctly handle special registers: EXEC, EXEC_LO, EXEC_HI, VCC_LO,
VCC_HI, and M0.  The previous implementation would assertion fail
when passed these registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:33:22 +00:00